fnetbsd.S revision 1.1
1 # 2 # $NetBSD: fnetbsd.S,v 1.1 1996/05/15 21:06:22 is Exp $ 3 # 4 #~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 5 # MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP 6 # M68000 Hi-Performance Microprocessor Division 7 # M68060 Software Package Production Release 8 # 9 # M68060 Software Package Copyright (C) 1993, 1994, 1995, 1996 Motorola Inc. 10 # All rights reserved. 11 # 12 # THE SOFTWARE is provided on an "AS IS" basis and without warranty. 13 # To the maximum extent permitted by applicable law, 14 # MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 15 # INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS 16 # FOR A PARTICULAR PURPOSE and any warranty against infringement with 17 # regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF) 18 # and any accompanying written materials. 19 # 20 # To the maximum extent permitted by applicable law, 21 # IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER 22 # (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, 23 # BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) 24 # ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. 25 # 26 # Motorola assumes no responsibility for the maintenance and support 27 # of the SOFTWARE. 28 # 29 # You are hereby granted a copyright license to use, modify, and distribute the 30 # SOFTWARE so long as this entire notice is retained without alteration 31 # in any modified and/or redistributed versions, and that such modified 32 # versions are clearly identified as such. 33 # No licenses are granted by implication, estoppel or otherwise under any 34 # patents or trademarks of Motorola, Inc. 35 #~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 36 # 37 # Derived from: 38 # fskeleton.s 39 # 40 # This file contains: 41 # (1) example "Call-out"s 42 # (2) example package entry code 43 # (3) example "Call-out" table 44 # 45 46 47 ################################# 48 # (1) EXAMPLE CALL-OUTS # 49 # # 50 # _060_fpsp_done() # 51 # _060_real_ovfl() # 52 # _060_real_unfl() # 53 # _060_real_operr() # 54 # _060_real_snan() # 55 # _060_real_dz() # 56 # _060_real_inex() # 57 # _060_real_bsun() # 58 # _060_real_fline() # 59 # _060_real_fpu_disabled() # 60 # _060_real_trap() # 61 ################################# 62 63 # 64 # _060_fpsp_done(): 65 # 66 # This is the main exit point for the 68060 Floating-Point 67 # Software Package. For a normal exit, all 060FPSP routines call this 68 # routine. The operating system can do system dependent clean-up or 69 # simply execute an "rte" as with the sample code below. 70 # 71 .global _060_fpsp_done 72 _060_fpsp_done: 73 rte 74 75 # 76 # _060_real_ovfl(): 77 # 78 # This is the exit point for the 060FPSP when an enabled overflow exception 79 # is present. The routine below should point to the operating system handler 80 # for enabled overflow conditions. The exception stack frame is an overflow 81 # stack frame. The FP state frame holds the EXCEPTIONAL OPERAND. 82 # 83 # The sample routine below simply clears the exception status bit and 84 # does an "rte". 85 # 86 .global _060_real_ovfl 87 _060_real_ovfl: 88 fsave sp@- 89 movew #0x6000,sp@(0x2) 90 frestore sp@+ 91 jmp _fpfault 92 93 # 94 # _060_real_unfl(): 95 # 96 # This is the exit point for the 060FPSP when an enabled underflow exception 97 # is present. The routine below should point to the operating system handler 98 # for enabled underflow conditions. The exception stack frame is an underflow 99 # stack frame. The FP state frame holds the EXCEPTIONAL OPERAND. 100 # 101 # The sample routine below simply clears the exception status bit and 102 # does an "rte". 103 # 104 .global _060_real_unfl 105 _060_real_unfl: 106 fsave sp@- 107 movew #0x6000,sp@(0x2) 108 frestore sp@+ 109 jmp _fpfault 110 111 # 112 # _060_real_operr(): 113 # 114 # This is the exit point for the 060FPSP when an enabled operand error exception 115 # is present. The routine below should point to the operating system handler 116 # for enabled operand error exceptions. The exception stack frame is an operand error 117 # stack frame. The FP state frame holds the source operand of the faulting 118 # instruction. 119 # 120 # The sample routine below simply clears the exception status bit and 121 # does an "rte". 122 # 123 .global _060_real_operr 124 _060_real_operr: 125 fsave sp@- 126 movew #0x6000,sp@(0x2) 127 frestore sp@+ 128 jmp _fpfault 129 130 # 131 # _060_real_snan(): 132 # 133 # This is the exit point for the 060FPSP when an enabled signalling NaN exception 134 # is present. The routine below should point to the operating system handler 135 # for enabled signalling NaN exceptions. The exception stack frame is a signalling NaN 136 # stack frame. The FP state frame holds the source operand of the faulting 137 # instruction. 138 # 139 # The sample routine below simply clears the exception status bit and 140 # does an "rte". 141 # 142 .global _060_real_snan 143 _060_real_snan: 144 fsave sp@- 145 movew #0x6000,sp@(0x2) 146 frestore sp@+ 147 jmp _fpfault 148 149 # 150 # _060_real_dz(): 151 # 152 # This is the exit point for the 060FPSP when an enabled divide-by-zero exception 153 # is present. The routine below should point to the operating system handler 154 # for enabled divide-by-zero exceptions. The exception stack frame is a divide-by-zero 155 # stack frame. The FP state frame holds the source operand of the faulting 156 # instruction. 157 # 158 # The sample routine below simply clears the exception status bit and 159 # does an "rte". 160 # 161 .global _060_real_dz 162 _060_real_dz: 163 fsave sp@- 164 movew #0x6000,sp@(0x2) 165 frestore sp@+ 166 jmp _fpfault 167 168 # 169 # _060_real_inex(): 170 # 171 # This is the exit point for the 060FPSP when an enabled inexact exception 172 # is present. The routine below should point to the operating system handler 173 # for enabled inexact exceptions. The exception stack frame is an inexact 174 # stack frame. The FP state frame holds the source operand of the faulting 175 # instruction. 176 # 177 # The sample routine below simply clears the exception status bit and 178 # does an "rte". 179 # 180 .global _060_real_inex 181 _060_real_inex: 182 fsave sp@- 183 movew #0x6000,sp@(0x2) 184 frestore sp@+ 185 jmp _fpfault 186 187 # 188 # _060_real_bsun(): 189 # 190 # This is the exit point for the 060FPSP when an enabled bsun exception 191 # is present. The routine below should point to the operating system handler 192 # for enabled bsun exceptions. The exception stack frame is a bsun 193 # stack frame. 194 # 195 # The sample routine below clears the exception status bit, clears the NaN 196 # bit in the FPSR, and does an "rte". The instruction that caused the 197 # bsun will now be re-executed but with the NaN FPSR bit cleared. 198 # 199 .global _060_real_bsun 200 _060_real_bsun: 201 fsave sp@- 202 203 fmovel fpsr,sp@- 204 andib #0xfe,sp@ 205 fmovel sp@+,fpsr 206 207 addl #0xc,sp 208 jmp _fpfault 209 210 # 211 # _060_real_fline(): 212 # 213 # This is the exit point for the 060FPSP when an F-Line Illegal exception is 214 # encountered. Three different types of exceptions can enter the F-Line exception 215 # vector number 11: FP Unimplemented Instructions, FP implemented instructions when 216 # the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module 217 # _fpsp_fline() distinguishes between the three and acts appropriately. F-Line 218 # Illegals branch here. 219 # 220 .global _060_real_fline 221 _060_real_fline: 222 jmp _fpfault 223 224 # 225 # _060_real_fpu_disabled(): 226 # 227 # This is the exit point for the 060FPSP when an FPU disabled exception is 228 # encountered. Three different types of exceptions can enter the F-Line exception 229 # vector number 11: FP Unimplemented Instructions, FP implemented instructions when 230 # the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module 231 # _fpsp_fline() distinguishes between the three and acts appropriately. FPU disabled 232 # exceptions branch here. 233 # 234 # The sample code below enables the FPU, sets the PC field in the exception stack 235 # frame to the PC of the instruction causing the exception, and does an "rte". 236 # The execution of the instruction then proceeds with an enabled floating-point 237 # unit. 238 # 239 .global _060_real_fpu_disabled 240 _060_real_fpu_disabled: 241 movel d0,sp@- |# enabled the fpu 242 243 .short 0x4e7a,0x0808 |* movec.l pcr,d0 244 bclr #0x1,d0 245 .short 0x4e7b,0x0808 |* movec.l d0,pcr 246 movel sp@+,d0 247 248 movel sp@(0xc),sp@(0x2) |# set "Current PC" 249 rte 250 251 # 252 # _060_real_trap(): 253 # 254 # This is the exit point for the 060FPSP when an emulated "ftrapcc" instruction 255 # discovers that the trap condition is true and it should branch to the operating 256 # system handler for the trap exception vector number 7. 257 # 258 # The sample code below simply executes an "rte". 259 # 260 .global _060_real_trap 261 _060_real_trap: 262 rte 263 264 ############################################################################# 265 266 ################################## 267 # (2) EXAMPLE PACKAGE ENTRY CODE # 268 ################################## 269 270 .global _060_fpsp_snan 271 _060_fpsp_snan: 272 bral _FP_CALL_TOP+0x80+0x00 273 274 .global _060_fpsp_operr 275 _060_fpsp_operr: 276 bral _FP_CALL_TOP+0x80+0x08 277 278 .global _060_fpsp_ovfl 279 _060_fpsp_ovfl: 280 bral _FP_CALL_TOP+0x80+0x10 281 282 .global _060_fpsp_unfl 283 _060_fpsp_unfl: 284 bral _FP_CALL_TOP+0x80+0x18 285 286 .global _060_fpsp_dz 287 _060_fpsp_dz: 288 bral _FP_CALL_TOP+0x80+0x20 289 290 .global _060_fpsp_inex 291 _060_fpsp_inex: 292 bral _FP_CALL_TOP+0x80+0x28 293 294 .global _060_fpsp_fline 295 _060_fpsp_fline: 296 bral _FP_CALL_TOP+0x80+0x30 297 298 .global _060_fpsp_unsupp 299 _060_fpsp_unsupp: 300 bral _FP_CALL_TOP+0x80+0x38 301 302 .global _060_fpsp_effadd 303 _060_fpsp_effadd: 304 bral _FP_CALL_TOP+0x80+0x40 305 306 ############################################################################# 307 308 ################################ 309 # (3) EXAMPLE CALL-OUT SECTION # 310 ################################ 311 312 # The size of this section MUST be 128 bytes!!! 313 314 .global _FP_CALL_TOP 315 _FP_CALL_TOP: 316 .long _060_real_bsun-_FP_CALL_TOP 317 .long _060_real_snan-_FP_CALL_TOP 318 .long _060_real_operr-_FP_CALL_TOP 319 .long _060_real_ovfl-_FP_CALL_TOP 320 .long _060_real_unfl-_FP_CALL_TOP 321 .long _060_real_dz-_FP_CALL_TOP 322 .long _060_real_inex-_FP_CALL_TOP 323 .long _060_real_fline-_FP_CALL_TOP 324 .long _060_real_fpu_disabled-_FP_CALL_TOP 325 .long _060_real_trap-_FP_CALL_TOP 326 .long _060_real_trace-_FP_CALL_TOP 327 .long _060_real_access-_FP_CALL_TOP 328 .long _060_fpsp_done-_FP_CALL_TOP 329 330 .long 0x00000000,0x00000000,0x00000000 331 332 .long _060_imem_read-_FP_CALL_TOP 333 .long _060_dmem_read-_FP_CALL_TOP 334 .long _060_dmem_write-_FP_CALL_TOP 335 .long _060_imem_read_word-_FP_CALL_TOP 336 .long _060_imem_read_long-_FP_CALL_TOP 337 .long _060_dmem_read_byte-_FP_CALL_TOP 338 .long _060_dmem_read_word-_FP_CALL_TOP 339 .long _060_dmem_read_long-_FP_CALL_TOP 340 .long _060_dmem_write_byte-_FP_CALL_TOP 341 .long _060_dmem_write_word-_FP_CALL_TOP 342 .long _060_dmem_write_long-_FP_CALL_TOP 343 344 .long 0x00000000 345 346 .long 0x00000000,0x00000000,0x00000000,0x00000000 347 348 ############################################################################# 349 350 # 060 FPSP KERNEL PACKAGE NEEDS TO GO HERE!!! 351 352 .include "fpsp.s" 353 354
Indexes created Thu Oct 02 14:10:14 GMT 2025