fnetbsd.S revision 1.5
1 /* 2 # 3 # $NetBSD: fnetbsd.S,v 1.5 2000/11/30 21:00:51 scw Exp $ 4 # 5 #~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 6 # MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP 7 # M68000 Hi-Performance Microprocessor Division 8 # M68060 Software Package Production Release 9 # 10 # M68060 Software Package Copyright (C) 1993, 1994, 1995, 1996 Motorola Inc. 11 # All rights reserved. 12 # 13 # THE SOFTWARE is provided on an "AS IS" basis and without warranty. 14 # To the maximum extent permitted by applicable law, 15 # MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 16 # INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS 17 # FOR A PARTICULAR PURPOSE and any warranty against infringement with 18 # regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF) 19 # and any accompanying written materials. 20 # 21 # To the maximum extent permitted by applicable law, 22 # IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER 23 # (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, 24 # BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) 25 # ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. 26 # 27 # Motorola assumes no responsibility for the maintenance and support 28 # of the SOFTWARE. 29 # 30 # You are hereby granted a copyright license to use, modify, and distribute the 31 # SOFTWARE so long as this entire notice is retained without alteration 32 # in any modified and/or redistributed versions, and that such modified 33 # versions are clearly identified as such. 34 # No licenses are granted by implication, estoppel or otherwise under any 35 # patents or trademarks of Motorola, Inc. 36 #~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 37 # 38 # Derived from: 39 # fskeleton.s 40 # 41 # This file contains: 42 # (1) example "Call-out"s 43 # (2) example package entry code 44 # (3) example "Call-out" table 45 # 46 47 48 ################################# 49 # (1) EXAMPLE CALL-OUTS # 50 # # 51 # _060_fpsp_done() # 52 # _060_real_ovfl() # 53 # _060_real_unfl() # 54 # _060_real_operr() # 55 # _060_real_snan() # 56 # _060_real_dz() # 57 # _060_real_inex() # 58 # _060_real_bsun() # 59 # _060_real_fline() # 60 # _060_real_fpu_disabled() # 61 # _060_real_trap() # 62 ################################# 63 */ 64 65 /* 66 # 67 # _060_fpsp_done(): 68 # 69 # This is the main exit point for the 68060 Floating-Point 70 # Software Package. For a normal exit, all 060FPSP routines call this 71 # routine. The operating system can do system dependent clean-up or 72 # simply execute an "rte" as with the sample code below. 73 # 74 */ 75 ASENTRY_NOPROFILE(_060_fpsp_done) 76 rte 77 78 /* 79 # 80 # _060_real_ovfl(): 81 # 82 # This is the exit point for the 060FPSP when an enabled overflow exception 83 # is present. The routine below should point to the operating system handler 84 # for enabled overflow conditions. The exception stack frame is an overflow 85 # stack frame. The FP state frame holds the EXCEPTIONAL OPERAND. 86 # 87 # The sample routine below simply clears the exception status bit and 88 # does an "rte". 89 # 90 */ 91 ASENTRY_NOPROFILE(_060_real_ovfl) 92 fsave %sp@- 93 movew #0x6000,%sp@(0x2) 94 frestore %sp@+ 95 jmp _C_LABEL(fpfault) 96 97 /* 98 # 99 # _060_real_unfl(): 100 # 101 # This is the exit point for the 060FPSP when an enabled underflow exception 102 # is present. The routine below should point to the operating system handler 103 # for enabled underflow conditions. The exception stack frame is an underflow 104 # stack frame. The FP state frame holds the EXCEPTIONAL OPERAND. 105 # 106 # The sample routine below simply clears the exception status bit and 107 # does an "rte". 108 # 109 */ 110 ASENTRY_NOPROFILE(_060_real_unfl) 111 fsave %sp@- 112 movew #0x6000,%sp@(0x2) 113 frestore %sp@+ 114 jmp _C_LABEL(fpfault) 115 116 /* 117 # 118 # _060_real_operr(): 119 # 120 # This is the exit point for the 060FPSP when an enabled operand error exception 121 # is present. The routine below should point to the operating system handler 122 # for enabled operand error exceptions. The exception stack frame is an operand error 123 # stack frame. The FP state frame holds the source operand of the faulting 124 # instruction. 125 # 126 # The sample routine below simply clears the exception status bit and 127 # does an "rte". 128 # 129 */ 130 ASENTRY_NOPROFILE(_060_real_operr) 131 fsave %sp@- 132 movew #0x6000,%sp@(0x2) 133 frestore %sp@+ 134 jmp _C_LABEL(fpfault) 135 136 /* 137 # 138 # _060_real_snan(): 139 # 140 # This is the exit point for the 060FPSP when an enabled signalling NaN exception 141 # is present. The routine below should point to the operating system handler 142 # for enabled signalling NaN exceptions. The exception stack frame is a signalling NaN 143 # stack frame. The FP state frame holds the source operand of the faulting 144 # instruction. 145 # 146 # The sample routine below simply clears the exception status bit and 147 # does an "rte". 148 # 149 */ 150 ASENTRY_NOPROFILE(_060_real_snan) 151 fsave %sp@- 152 movew #0x6000,%sp@(0x2) 153 frestore %sp@+ 154 jmp _C_LABEL(fpfault) 155 156 /* 157 # 158 # _060_real_dz(): 159 # 160 # This is the exit point for the 060FPSP when an enabled divide-by-zero exception 161 # is present. The routine below should point to the operating system handler 162 # for enabled divide-by-zero exceptions. The exception stack frame is a divide-by-zero 163 # stack frame. The FP state frame holds the source operand of the faulting 164 # instruction. 165 # 166 # The sample routine below simply clears the exception status bit and 167 # does an "rte". 168 # 169 */ 170 ASENTRY_NOPROFILE(_060_real_dz) 171 fsave %sp@- 172 movew #0x6000,%sp@(0x2) 173 frestore %sp@+ 174 jmp _C_LABEL(fpfault) 175 176 /* 177 # 178 # _060_real_inex(): 179 # 180 # This is the exit point for the 060FPSP when an enabled inexact exception 181 # is present. The routine below should point to the operating system handler 182 # for enabled inexact exceptions. The exception stack frame is an inexact 183 # stack frame. The FP state frame holds the source operand of the faulting 184 # instruction. 185 # 186 # The sample routine below simply clears the exception status bit and 187 # does an "rte". 188 # 189 */ 190 ASENTRY_NOPROFILE(_060_real_inex) 191 fsave %sp@- 192 movew #0x6000,%sp@(0x2) 193 frestore %sp@+ 194 jmp _C_LABEL(fpfault) 195 196 /* 197 # 198 # _060_real_bsun(): 199 # 200 # This is the exit point for the 060FPSP when an enabled bsun exception 201 # is present. The routine below should point to the operating system handler 202 # for enabled bsun exceptions. The exception stack frame is a bsun 203 # stack frame. 204 # 205 # The sample routine below clears the exception status bit, clears the NaN 206 # bit in the FPSR, and does an "rte". The instruction that caused the 207 # bsun will now be re-executed but with the NaN FPSR bit cleared. 208 # 209 */ 210 ASENTRY_NOPROFILE(_060_real_bsun) 211 fsave %sp@- 212 213 fmovel %fpsr,%sp@- 214 andib #0xfe,%sp@ 215 fmovel %sp@+,%fpsr 216 217 addl #0xc,%sp 218 jmp _C_LABEL(fpfault) 219 220 /* 221 # 222 # _060_real_fline(): 223 # 224 # This is the exit point for the 060FPSP when an F-Line Illegal exception is 225 # encountered. Three different types of exceptions can enter the F-Line exception 226 # vector number 11: FP Unimplemented Instructions, FP implemented instructions when 227 # the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module 228 # _fpsp_fline() distinguishes between the three and acts appropriately. F-Line 229 # Illegals branch here. 230 # 231 */ 232 ASENTRY_NOPROFILE(_060_real_fline) 233 jmp _C_LABEL(fpfault) 234 235 /* 236 # 237 # _060_real_fpu_disabled(): 238 # 239 # This is the exit point for the 060FPSP when an FPU disabled exception is 240 # encountered. Three different types of exceptions can enter the F-Line exception 241 # vector number 11: FP Unimplemented Instructions, FP implemented instructions when 242 # the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module 243 # _fpsp_fline() distinguishes between the three and acts appropriately. FPU disabled 244 # exceptions branch here. 245 # 246 # The sample code below enables the FPU, sets the PC field in the exception stack 247 # frame to the PC of the instruction causing the exception, and does an "rte". 248 # The execution of the instruction then proceeds with an enabled floating-point 249 # unit. 250 # 251 */ 252 ASENTRY_NOPROFILE(_060_real_fpu_disabled) 253 movel %d0,%sp@- |# enabled the fpu 254 255 .short 0x4e7a,0x0808 |* movec.l pcr,d0 256 bclr #0x1,%d0 257 .short 0x4e7b,0x0808 |* movec.l d0,pcr 258 movel %sp@+,%d0 259 260 movel %sp@(0xc),%sp@(0x2) |# set "Current PC" 261 rte 262 263 /* 264 # 265 # _060_real_trap(): 266 # 267 # This is the exit point for the 060FPSP when an emulated "ftrapcc" instruction 268 # discovers that the trap condition is true and it should branch to the operating 269 # system handler for the trap exception vector number 7. 270 # 271 # The sample code below simply executes an "rte". 272 # 273 */ 274 ASENTRY_NOPROFILE(_060_real_trap) 275 rte 276 277 /* 278 ############################################################################# 279 280 ################################## 281 # (2) EXAMPLE PACKAGE ENTRY CODE # 282 ################################## 283 */ 284 ASENTRY_NOPROFILE(_060_fpsp_snan) 285 bral _C_LABEL(FP_CALL_TOP)+0x80+0x00 286 287 ASENTRY_NOPROFILE(_060_fpsp_operr) 288 bral _C_LABEL(FP_CALL_TOP)+0x80+0x08 289 290 ASENTRY_NOPROFILE(_060_fpsp_ovfl) 291 bral _C_LABEL(FP_CALL_TOP)+0x80+0x10 292 293 ASENTRY_NOPROFILE(_060_fpsp_unfl) 294 bral _C_LABEL(FP_CALL_TOP)+0x80+0x18 295 296 ASENTRY_NOPROFILE(_060_fpsp_dz) 297 bral _C_LABEL(FP_CALL_TOP)+0x80+0x20 298 299 ASENTRY_NOPROFILE(_060_fpsp_inex) 300 bral _C_LABEL(FP_CALL_TOP)+0x80+0x28 301 302 ASENTRY_NOPROFILE(_060_fpsp_fline) 303 bral _C_LABEL(FP_CALL_TOP)+0x80+0x30 304 305 ASENTRY_NOPROFILE(_060_fpsp_unsupp) 306 bral _C_LABEL(FP_CALL_TOP)+0x80+0x38 307 308 ASENTRY_NOPROFILE(_060_fpsp_effadd) 309 bral _C_LABEL(FP_CALL_TOP)+0x80+0x40 310 311 /* 312 ############################################################################# 313 314 ################################ 315 # (3) EXAMPLE CALL-OUT SECTION # 316 ################################ 317 318 # The size of this section MUST be 128 bytes!!! 319 */ 320 GLOBAL(FP_CALL_TOP) 321 .long _ASM_LABEL(_060_real_bsun)-_C_LABEL(FP_CALL_TOP) 322 .long _ASM_LABEL(_060_real_snan)-_C_LABEL(FP_CALL_TOP) 323 .long _ASM_LABEL(_060_real_operr)-_C_LABEL(FP_CALL_TOP) 324 .long _ASM_LABEL(_060_real_ovfl)-_C_LABEL(FP_CALL_TOP) 325 .long _ASM_LABEL(_060_real_unfl)-_C_LABEL(FP_CALL_TOP) 326 .long _ASM_LABEL(_060_real_dz)-_C_LABEL(FP_CALL_TOP) 327 .long _ASM_LABEL(_060_real_inex)-_C_LABEL(FP_CALL_TOP) 328 .long _ASM_LABEL(_060_real_fline)-_C_LABEL(FP_CALL_TOP) 329 .long _ASM_LABEL(_060_real_fpu_disabled)-_C_LABEL(FP_CALL_TOP) 330 .long _ASM_LABEL(_060_real_trap)-_C_LABEL(FP_CALL_TOP) 331 .long _ASM_LABEL(_060_real_trace)-_C_LABEL(FP_CALL_TOP) 332 .long _ASM_LABEL(_060_real_access)-_C_LABEL(FP_CALL_TOP) 333 .long _ASM_LABEL(_060_fpsp_done)-_C_LABEL(FP_CALL_TOP) 334 335 .long 0x00000000,0x00000000,0x00000000 336 337 .long _ASM_LABEL(_060_imem_read)-_C_LABEL(FP_CALL_TOP) 338 .long _ASM_LABEL(_060_dmem_read)-_C_LABEL(FP_CALL_TOP) 339 .long _ASM_LABEL(_060_dmem_write)-_C_LABEL(FP_CALL_TOP) 340 .long _ASM_LABEL(_060_imem_read_word)-_C_LABEL(FP_CALL_TOP) 341 .long _ASM_LABEL(_060_imem_read_long)-_C_LABEL(FP_CALL_TOP) 342 .long _ASM_LABEL(_060_dmem_read_byte)-_C_LABEL(FP_CALL_TOP) 343 .long _ASM_LABEL(_060_dmem_read_word)-_C_LABEL(FP_CALL_TOP) 344 .long _ASM_LABEL(_060_dmem_read_long)-_C_LABEL(FP_CALL_TOP) 345 .long _ASM_LABEL(_060_dmem_write_byte)-_C_LABEL(FP_CALL_TOP) 346 .long _ASM_LABEL(_060_dmem_write_word)-_C_LABEL(FP_CALL_TOP) 347 .long _ASM_LABEL(_060_dmem_write_long)-_C_LABEL(FP_CALL_TOP) 348 349 .long 0x00000000 350 351 .long 0x00000000,0x00000000,0x00000000,0x00000000 352 353 /* 354 ############################################################################# 355 356 # 060 FPSP KERNEL PACKAGE NEEDS TO GO HERE!!! 357 */ 358 359 #include "fpsp.S" 360
Indexes created Thu Oct 02 14:10:14 GMT 2025