README revision 1.2 
1* $NetBSD: README,v 1.2 1995/11/03 04:48:22 briggs Exp $
2* NetBSD/m68k FPE (floating point emulation) README file
3* Created Oct/??/95 by kenn@romulus.rutgers.edu (Ken Nakata)
4* Last updated Nov/02/95 by kenn
5
61. INSTALLATION AND COMPILATION
7
8To compile a kernel with FPE built-in, do the following:
9
101) Add a line "options FPU_EMULATE" to your config file.  If you are
11going to use the resulted kernel on a machine with an FPU for
12debugging purpose, add "options DEBUG_WITH_FPU" as well.
13
142) Follow the usual procedure to build a new kernel.
15
16NOTE:  If you add "options DEBUG_WITH_FPU", FPE will accept cpID=6 as
17emulated FPU.  You will need a modified gas that generates cpID=6 for
18floating point instructions, instead of normal cpID=1.  Mount unionfs
19or copy the gas source directory as you did with the kernel source tree,
20and apply the following patch:
21
22*** /usr/src/gnu/usr.bin/gas/config/tc-m68k.c   Mon Nov 21 16:30:41 1994
23--- gas/config/tc-m68k.c    Fri Sep 29 07:59:06 1995
24***************
25*** 1275,1281 ****
26                /* memcpy((char *)(&the_ins.operands[1]), (char *)(&the_ins.operands[0]), opsfound*sizeof(the_ins.operands[0])); */
27                memset((char *)(&the_ins.operands[0]), '\0', sizeof(the_ins.operands[0]));
28                the_ins.operands[0].mode=MSCR;
29!               the_ins.operands[0].reg=COPNUM;         /* COP #1 */
30                opsfound++;
31        }
32  
33--- 1275,1281 ----
34                /* memcpy((char *)(&the_ins.operands[1]), (char *)(&the_ins.operands[0]), opsfound*sizeof(the_ins.operands[0])); */
35                memset((char *)(&the_ins.operands[0]), '\0', sizeof(the_ins.operands[0]));
36                the_ins.operands[0].mode=MSCR;
37!               the_ins.operands[0].reg=COP5;           /* COP #6 */
38                opsfound++;
39        }
40  
41
42Also, with the DEBUG_WITH_FPU option, you will be able to run only ONE
43process that uses FPE at once to get correct results.
44
45
462. MISSING PARTS
47
48For missing instructions, refer to the Section 3.  Other than that,
49there is one thing that is missing from this version of FPE: packed
50BCD support.
51
52I have no plan to support it since it's rarely used.  However, all we
53need to support it is explosion/implosion functions between the
54internal FP representation and the m68k PBCD format, so you are more
55than welcome to write such functions if you wish to.
56
57
583. IMPLEMENTED INSTRUCTIONS
59
60This is the list of implemented and unimplemented FPU instructions.
61Most 040's directly supported type 0 instructions are already
62implemented except FSGLDIV, FSGLMUL, FMOVE(M) FPcr, and FMOVECR.
63
64Type field = bit 8-6 of opcode word
65
66* Implemented Instructions
67
68Type=0: FMOVE (mem->FPr), FINT, FINTRZ, FSQRT, FABS, FNEG, FGETEXP,
69	FGETMAN, FDIV, FADD, FMUL, FSGLDIV, FSCALE, FSGLMUL, FSUB,
70	FCMP, FTST, FMOVE (FPr->mem), FMOVEM (FPr), FMOVEM (FPcr),
71	FMOVECR, FLOGNP1, FLOGN, FLOG10, FLOG2, FMOD, FREM
72
73Type=1: FDBcc, FScc, FTRAPcc,
74
75Type=2: FBcc (word, incl. FNOP)
76
77Type=3: FBcc (long)
78
79Type=4: none
80
81Type=5: none
82
83	*: currently FSGLMUL and FSGLDIV are just aliases of
84	   FMUL and FDIV, respectively
85
86* Unimplemented Instructions
87
88Type=0: FSINH, FETOXM1, FTANH, FATAN, FASIN, FATANH, FSIN, FTAN,
89	FETOX, FTWOTOX, FTENTOX, FCOSH, FACOS, FCOS, FSINCOS
90
91Type=1: none
92
93Type=2: none
94
95Type=3: none
96
97Type=4: FSAVE
98
99Type=5: FRESTORE
100
101
1024. HOW TO ADD A NEW INSTRUCTION SUPPORT
103
104Since we need not support FSAVE and FRESTORE operations, all
105instructions we have to implement are type 0, all of which are
106arithmetic operations.  It is particularly easy to add a new
107arithmetic instruction to the existing ones (not that it is easy to
108write a "stable" function to perform floating point operation. That's
109entirely another matter).  In "fpu_emulate.c", there's a function
110fpu_emul_arith() which calls emulation functions for all arithmetic
111operations.  In it, there's a large switch() { case ... } which
112dispatches each instruction emulator.  An emulation function of any
113type 0 arithmetic instruction follows this prototype:
114
115	struct fpn *fpu_op(struct fpemu *fe);
116
117Where fe is a pointer to a struct fpemu in which frame, fpframe, and
118fetched operands are accessible.  That's right, you don't have to
119fetch the operands by yourself in your emulation funtion.  For
120instance, the parts calling FSQRT, FSUB, FADD and FTST look like:
121
122	switch(word1 & 0x3F) {
123[...]
124	case 0x04:	/* fsqrt */
125		res = fpu_sqrt(fe);
126		break;
127[...]
128	case 0x28:	/* fsub */
129		fe->fe_f2.fp_sign = !fe->fe_f2.fp_sign; /* f2 = -f2 */
130	case 0x22:	/* fadd */
131		res = fpu_add(fe);
132		break;
133[...]
134	case 0x3A:	/* ftst */
135		res = &fe->fe_f2;
136		no_store = 1;
137		break;
138[...]
139	default:
140		sig = SIGILL;
141	} /* switch */
142
143Here, fe->fe_f1 and fe->fe_f2 are fetched operands.  You can use
144fe->fe_f3 for storing the result, or you can return a pointer to
145either operand if you want to.  At any rate, you have to follow
146the following rules:
147
148	1) A dyadic instruction takes two operands fe->fe_f1 and fe->fe_f2.
149	2) A monadic instruction takes one operands fe->fe_f2 (NOT fe_f1).
150	3) Must return a pointer to struct fpn where the result is stored,
151	and assign the pointer to the variable "res".
152	4) If exceptions are detected, set corresponding bits in fe->fe_fpsr.
153	The rest is taken care of in fpu_emul_arith().
154	5) Condition code need not be calculated.  It's taken care of in
155	fpu_emul_arith().
156
157It's easy to interface, isn't it?
158
159* Actually, after above was written, stubs for the missing functions
160are added to the source, so you do not have to change fpu_emul_arith()
161at all.  Function names and prototypes are in fpu_arith_proto.h, and
162all (except fpu_sincos()) follows the rules above.
163
164