fpu_calcea.c revision 1.22
1 /* $NetBSD: fpu_calcea.c,v 1.22 2010/06/06 04:50:07 mrg Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Gordon W. Ross 5 * portion Copyright (c) 1995 Ken Nakata 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 4. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Gordon Ross 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #include "opt_m68k_arch.h" 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: fpu_calcea.c,v 1.22 2010/06/06 04:50:07 mrg Exp $"); 38 39 #include <sys/param.h> 40 #include <sys/signal.h> 41 #include <sys/systm.h> 42 #include <machine/frame.h> 43 #include <m68k/m68k.h> 44 45 #include "fpu_emulate.h" 46 47 /* 48 * Prototypes of static functions 49 */ 50 static int decode_ea6(struct frame *frame, struct instruction *insn, 51 struct insn_ea *ea, int modreg); 52 static int fetch_immed(struct frame *frame, struct instruction *insn, 53 int *dst); 54 static int fetch_disp(struct frame *frame, struct instruction *insn, 55 int size, int *res); 56 static int calc_ea(struct insn_ea *ea, char *ptr, char **eaddr); 57 58 /* 59 * Helper routines for dealing with "effective address" values. 60 */ 61 62 /* 63 * Decode an effective address into internal form. 64 * Returns zero on success, else signal number. 65 */ 66 int 67 fpu_decode_ea(struct frame *frame, struct instruction *insn, struct insn_ea *ea, int modreg) 68 { 69 int sig; 70 71 #ifdef DEBUG 72 if (insn->is_datasize < 0) { 73 panic("decode_ea: called with uninitialized datasize"); 74 } 75 #endif 76 77 sig = 0; 78 79 /* Set the most common value here. */ 80 ea->ea_regnum = 8 + (modreg & 7); 81 82 if ((modreg & 060) == 0) { 83 /* register direct */ 84 ea->ea_regnum = modreg & 0xf; 85 ea->ea_flags = EA_DIRECT; 86 #ifdef DEBUG_FPE 87 printf("decode_ea: register direct reg=%d\n", ea->ea_regnum); 88 #endif 89 } else if ((modreg & 077) == 074) { 90 /* immediate */ 91 ea->ea_flags = EA_IMMED; 92 sig = fetch_immed(frame, insn, &ea->ea_immed[0]); 93 #ifdef DEBUG_FPE 94 printf("decode_ea: immediate size=%d\n", insn->is_datasize); 95 #endif 96 } 97 /* 98 * rest of the address modes need to be separately 99 * handled for the LC040 and the others. 100 */ 101 #if 0 /* XXX */ 102 else if (frame->f_format == 4 && frame->f_fmt4.f_fa) { 103 /* LC040 */ 104 ea->ea_flags = EA_FRAME_EA; 105 ea->ea_fea = frame->f_fmt4.f_fa; 106 #ifdef DEBUG_FPE 107 printf("decode_ea: 68LC040 - in-frame EA (%p) size %d\n", 108 (void *)ea->ea_fea, insn->is_datasize); 109 #endif 110 if ((modreg & 070) == 030) { 111 /* postincrement mode */ 112 ea->ea_flags |= EA_POSTINCR; 113 } else if ((modreg & 070) == 040) { 114 /* predecrement mode */ 115 ea->ea_flags |= EA_PREDECR; 116 #ifdef M68060 117 #if defined(M68020) || defined(M68030) || defined(M68040) 118 if (cputype == CPU_68060) 119 #endif 120 if (insn->is_datasize == 12) 121 ea->ea_fea -= 8; 122 #endif 123 } 124 } 125 #endif /* XXX */ 126 else { 127 /* 020/030 */ 128 switch (modreg & 070) { 129 130 case 020: /* (An) */ 131 ea->ea_flags = 0; 132 #ifdef DEBUG_FPE 133 printf("decode_ea: register indirect reg=%d\n", ea->ea_regnum); 134 #endif 135 break; 136 137 case 030: /* (An)+ */ 138 ea->ea_flags = EA_POSTINCR; 139 #ifdef DEBUG_FPE 140 printf("decode_ea: reg indirect postincrement reg=%d\n", 141 ea->ea_regnum); 142 #endif 143 break; 144 145 case 040: /* -(An) */ 146 ea->ea_flags = EA_PREDECR; 147 #ifdef DEBUG_FPE 148 printf("decode_ea: reg indirect predecrement reg=%d\n", 149 ea->ea_regnum); 150 #endif 151 break; 152 153 case 050: /* (d16,An) */ 154 ea->ea_flags = EA_OFFSET; 155 sig = fetch_disp(frame, insn, 1, &ea->ea_offset); 156 #ifdef DEBUG_FPE 157 printf("decode_ea: reg indirect with displacement reg=%d\n", 158 ea->ea_regnum); 159 #endif 160 break; 161 162 case 060: /* (d8,An,Xn) */ 163 ea->ea_flags = EA_INDEXED; 164 sig = decode_ea6(frame, insn, ea, modreg); 165 break; 166 167 case 070: /* misc. */ 168 ea->ea_regnum = (modreg & 7); 169 switch (modreg & 7) { 170 171 case 0: /* (xxxx).W */ 172 ea->ea_flags = EA_ABS; 173 sig = fetch_disp(frame, insn, 1, &ea->ea_absaddr); 174 #ifdef DEBUG_FPE 175 printf("decode_ea: absolute address (word)\n"); 176 #endif 177 break; 178 179 case 1: /* (xxxxxxxx).L */ 180 ea->ea_flags = EA_ABS; 181 sig = fetch_disp(frame, insn, 2, &ea->ea_absaddr); 182 #ifdef DEBUG_FPE 183 printf("decode_ea: absolute address (long)\n"); 184 #endif 185 break; 186 187 case 2: /* (d16,PC) */ 188 ea->ea_flags = EA_PC_REL | EA_OFFSET; 189 sig = fetch_disp(frame, insn, 1, &ea->ea_absaddr); 190 #ifdef DEBUG_FPE 191 printf("decode_ea: pc relative word displacement\n"); 192 #endif 193 break; 194 195 case 3: /* (d8,PC,Xn) */ 196 ea->ea_flags = EA_PC_REL | EA_INDEXED; 197 sig = decode_ea6(frame, insn, ea, modreg); 198 break; 199 200 case 4: /* #data */ 201 /* it should have been taken care of earlier */ 202 default: 203 #ifdef DEBUG_FPE 204 printf("decode_ea: invalid addr mode (7,%d)\n", modreg & 7); 205 #endif 206 return SIGILL; 207 } /* switch for mode 7 */ 208 break; 209 } /* switch mode */ 210 } 211 ea->ea_moffs = 0; 212 213 return sig; 214 } 215 216 /* 217 * Decode Mode=6 address modes 218 */ 219 static int 220 decode_ea6(struct frame *frame, struct instruction *insn, struct insn_ea *ea, int modreg) 221 { 222 int extword, idx; 223 int basedisp, outerdisp; 224 int bd_size, od_size; 225 int sig; 226 227 extword = fusword((void *) (insn->is_pc + insn->is_advance)); 228 if (extword < 0) { 229 return SIGSEGV; 230 } 231 insn->is_advance += 2; 232 233 /* get register index */ 234 ea->ea_idxreg = (extword >> 12) & 0xf; 235 idx = frame->f_regs[ea->ea_idxreg]; 236 if ((extword & 0x0800) == 0) { 237 /* if word sized index, sign-extend */ 238 idx &= 0xffff; 239 if (idx & 0x8000) { 240 idx |= 0xffff0000; 241 } 242 } 243 /* scale register index */ 244 idx <<= ((extword >>9) & 3); 245 246 if ((extword & 0x100) == 0) { 247 /* brief extension word - sign-extend the displacement */ 248 basedisp = (extword & 0xff); 249 if (basedisp & 0x80) { 250 basedisp |= 0xffffff00; 251 } 252 253 ea->ea_basedisp = idx + basedisp; 254 ea->ea_outerdisp = 0; 255 #if DEBUG_FPE 256 printf("decode_ea6: brief ext word idxreg=%d, basedisp=%08x\n", 257 ea->ea_idxreg, ea->ea_basedisp); 258 #endif 259 } else { 260 /* full extension word */ 261 if (extword & 0x80) { 262 ea->ea_flags |= EA_BASE_SUPPRSS; 263 } 264 bd_size = ((extword >> 4) & 3) - 1; 265 od_size = (extword & 3) - 1; 266 sig = fetch_disp(frame, insn, bd_size, &basedisp); 267 if (sig) { 268 return sig; 269 } 270 if (od_size >= 0) { 271 ea->ea_flags |= EA_MEM_INDIR; 272 } 273 sig = fetch_disp(frame, insn, od_size, &outerdisp); 274 if (sig) { 275 return sig; 276 } 277 278 switch (extword & 0x44) { 279 case 0: /* preindexed */ 280 ea->ea_basedisp = basedisp + idx; 281 ea->ea_outerdisp = outerdisp; 282 break; 283 case 4: /* postindexed */ 284 ea->ea_basedisp = basedisp; 285 ea->ea_outerdisp = outerdisp + idx; 286 break; 287 case 0x40: /* no index */ 288 ea->ea_basedisp = basedisp; 289 ea->ea_outerdisp = outerdisp; 290 break; 291 default: 292 #ifdef DEBUG 293 printf("decode_ea6: invalid indirect mode: ext word %04x\n", 294 extword); 295 #endif 296 return SIGILL; 297 break; 298 } 299 #if DEBUG_FPE 300 printf("decode_ea6: full ext idxreg=%d, basedisp=%x, outerdisp=%x\n", 301 ea->ea_idxreg, ea->ea_basedisp, ea->ea_outerdisp); 302 #endif 303 } 304 #if DEBUG_FPE 305 printf("decode_ea6: regnum=%d, flags=%x\n", 306 ea->ea_regnum, ea->ea_flags); 307 #endif 308 return 0; 309 } 310 311 /* 312 * Load a value from an effective address. 313 * Returns zero on success, else signal number. 314 */ 315 int 316 fpu_load_ea(struct frame *frame, struct instruction *insn, struct insn_ea *ea, char *dst) 317 { 318 int *reg; 319 char *src; 320 int len, step; 321 int sig; 322 323 #ifdef DIAGNOSTIC 324 if (ea->ea_regnum & ~0xF) { 325 panic("load_ea: bad regnum"); 326 } 327 #endif 328 329 #ifdef DEBUG_FPE 330 printf("load_ea: frame at %p\n", frame); 331 #endif 332 /* dst is always int or larger. */ 333 len = insn->is_datasize; 334 if (len < 4) { 335 dst += (4 - len); 336 } 337 step = (len == 1 && ea->ea_regnum == 15 /* sp */) ? 2 : len; 338 339 #if 0 340 if (ea->ea_flags & EA_FRAME_EA) { 341 /* Using LC040 frame EA */ 342 #ifdef DEBUG_FPE 343 if (ea->ea_flags & (EA_PREDECR|EA_POSTINCR)) { 344 printf("load_ea: frame ea %08x w/r%d\n", 345 ea->ea_fea, ea->ea_regnum); 346 } else { 347 printf("load_ea: frame ea %08x\n", ea->ea_fea); 348 } 349 #endif 350 src = (char *)ea->ea_fea; 351 copyin(src + ea->ea_moffs, dst, len); 352 if (ea->ea_flags & EA_PREDECR) { 353 frame->f_regs[ea->ea_regnum] = ea->ea_fea; 354 ea->ea_fea -= step; 355 ea->ea_moffs = 0; 356 } else if (ea->ea_flags & EA_POSTINCR) { 357 ea->ea_fea += step; 358 frame->f_regs[ea->ea_regnum] = ea->ea_fea; 359 ea->ea_moffs = 0; 360 } else { 361 ea->ea_moffs += step; 362 } 363 /* That's it, folks */ 364 } else 365 #endif 366 if (ea->ea_flags & EA_DIRECT) { 367 if (len > 4) { 368 #ifdef DEBUG 369 printf("load_ea: operand doesn't fit CPU reg\n"); 370 #endif 371 return SIGILL; 372 } 373 if (ea->ea_moffs > 0) { 374 #ifdef DEBUG 375 printf("load_ea: more than one move from CPU reg\n"); 376 #endif 377 return SIGILL; 378 } 379 src = (char *)&frame->f_regs[ea->ea_regnum]; 380 /* The source is an int. */ 381 if (len < 4) { 382 src += (4 - len); 383 #ifdef DEBUG_FPE 384 printf("load_ea: short/byte opr - addr adjusted\n"); 385 #endif 386 } 387 #ifdef DEBUG_FPE 388 printf("load_ea: src %p\n", src); 389 #endif 390 memcpy(dst, src, len); 391 } else if (ea->ea_flags & EA_IMMED) { 392 #ifdef DEBUG_FPE 393 printf("load_ea: immed %08x%08x%08x size %d\n", 394 ea->ea_immed[0], ea->ea_immed[1], ea->ea_immed[2], len); 395 #endif 396 src = (char *)&ea->ea_immed[0]; 397 if (len < 4) { 398 src += (4 - len); 399 #ifdef DEBUG_FPE 400 printf("load_ea: short/byte immed opr - addr adjusted\n"); 401 #endif 402 } 403 memcpy(dst, src, len); 404 } else if (ea->ea_flags & EA_ABS) { 405 #ifdef DEBUG_FPE 406 printf("load_ea: abs addr %08x\n", ea->ea_absaddr); 407 #endif 408 src = (char *)ea->ea_absaddr; 409 copyin(src, dst, len); 410 } else /* register indirect */ { 411 if (ea->ea_flags & EA_PC_REL) { 412 #ifdef DEBUG_FPE 413 printf("load_ea: using PC\n"); 414 #endif 415 reg = NULL; 416 /* Grab the register contents. 4 is offset to the first 417 extension word from the opcode */ 418 src = (char *)insn->is_pc + 4; 419 #ifdef DEBUG_FPE 420 printf("load_ea: pc relative pc+4 = %p\n", src); 421 #endif 422 } else /* not PC relative */ { 423 #ifdef DEBUG_FPE 424 printf("load_ea: using register %c%d\n", 425 (ea->ea_regnum >= 8) ? 'a' : 'd', ea->ea_regnum & 7); 426 #endif 427 /* point to the register */ 428 reg = &frame->f_regs[ea->ea_regnum]; 429 430 if (ea->ea_flags & EA_PREDECR) { 431 #ifdef DEBUG_FPE 432 printf("load_ea: predecr mode - reg decremented\n"); 433 #endif 434 *reg -= step; 435 ea->ea_moffs = 0; 436 } 437 438 /* Grab the register contents. */ 439 src = (char *)*reg; 440 #ifdef DEBUG_FPE 441 printf("load_ea: reg indirect reg = %p\n", src); 442 #endif 443 } 444 445 sig = calc_ea(ea, src, &src); 446 if (sig) 447 return sig; 448 449 copyin(src + ea->ea_moffs, dst, len); 450 451 /* do post-increment */ 452 if (ea->ea_flags & EA_POSTINCR) { 453 if (ea->ea_flags & EA_PC_REL) { 454 #ifdef DEBUG 455 printf("load_ea: tried to postincrement PC\n"); 456 #endif 457 return SIGILL; 458 } 459 *reg += step; 460 ea->ea_moffs = 0; 461 #ifdef DEBUG_FPE 462 printf("load_ea: postinc mode - reg incremented\n"); 463 #endif 464 } else { 465 ea->ea_moffs += len; 466 } 467 } 468 469 return 0; 470 } 471 472 /* 473 * Store a value at the effective address. 474 * Returns zero on success, else signal number. 475 */ 476 int 477 fpu_store_ea(struct frame *frame, struct instruction *insn, struct insn_ea *ea, char *src) 478 { 479 int *reg; 480 char *dst; 481 int len, step; 482 int sig; 483 484 #ifdef DIAGNOSTIC 485 if (ea->ea_regnum & ~0xf) { 486 panic("store_ea: bad regnum"); 487 } 488 #endif 489 490 if (ea->ea_flags & (EA_IMMED|EA_PC_REL)) { 491 /* not alterable address mode */ 492 #ifdef DEBUG 493 printf("store_ea: not alterable address mode\n"); 494 #endif 495 return SIGILL; 496 } 497 498 /* src is always int or larger. */ 499 len = insn->is_datasize; 500 if (len < 4) { 501 src += (4 - len); 502 } 503 step = (len == 1 && ea->ea_regnum == 15 /* sp */) ? 2 : len; 504 505 if (ea->ea_flags & EA_FRAME_EA) { 506 /* Using LC040 frame EA */ 507 #ifdef DEBUG_FPE 508 if (ea->ea_flags & (EA_PREDECR|EA_POSTINCR)) { 509 printf("store_ea: frame ea %08x w/r%d\n", 510 ea->ea_fea, ea->ea_regnum); 511 } else { 512 printf("store_ea: frame ea %08x\n", ea->ea_fea); 513 } 514 #endif 515 dst = (char *)ea->ea_fea; 516 copyout(src, dst + ea->ea_moffs, len); 517 if (ea->ea_flags & EA_PREDECR) { 518 frame->f_regs[ea->ea_regnum] = ea->ea_fea; 519 ea->ea_fea -= step; 520 ea->ea_moffs = 0; 521 } else if (ea->ea_flags & EA_POSTINCR) { 522 ea->ea_fea += step; 523 frame->f_regs[ea->ea_regnum] = ea->ea_fea; 524 ea->ea_moffs = 0; 525 } else { 526 ea->ea_moffs += step; 527 } 528 /* That's it, folks */ 529 } else if (ea->ea_flags & EA_ABS) { 530 #ifdef DEBUG_FPE 531 printf("store_ea: abs addr %08x\n", ea->ea_absaddr); 532 #endif 533 dst = (char *)ea->ea_absaddr; 534 copyout(src, dst + ea->ea_moffs, len); 535 ea->ea_moffs += len; 536 } else if (ea->ea_flags & EA_DIRECT) { 537 if (len > 4) { 538 #ifdef DEBUG 539 printf("store_ea: operand doesn't fit CPU reg\n"); 540 #endif 541 return SIGILL; 542 } 543 if (ea->ea_moffs > 0) { 544 #ifdef DEBUG 545 printf("store_ea: more than one move to CPU reg\n"); 546 #endif 547 return SIGILL; 548 } 549 dst = (char*)&frame->f_regs[ea->ea_regnum]; 550 /* The destination is an int. */ 551 if (len < 4) { 552 dst += (4 - len); 553 #ifdef DEBUG_FPE 554 printf("store_ea: short/byte opr - dst addr adjusted\n"); 555 #endif 556 } 557 #ifdef DEBUG_FPE 558 printf("store_ea: dst %p\n", dst); 559 #endif 560 memcpy(dst, src, len); 561 } else /* One of MANY indirect forms... */ { 562 #ifdef DEBUG_FPE 563 printf("store_ea: using register %c%d\n", 564 (ea->ea_regnum >= 8) ? 'a' : 'd', ea->ea_regnum & 7); 565 #endif 566 /* point to the register */ 567 reg = &(frame->f_regs[ea->ea_regnum]); 568 569 /* do pre-decrement */ 570 if (ea->ea_flags & EA_PREDECR) { 571 #ifdef DEBUG_FPE 572 printf("store_ea: predecr mode - reg decremented\n"); 573 #endif 574 *reg -= step; 575 ea->ea_moffs = 0; 576 } 577 578 /* calculate the effective address */ 579 sig = calc_ea(ea, (char *)*reg, &dst); 580 if (sig) 581 return sig; 582 583 #ifdef DEBUG_FPE 584 printf("store_ea: dst addr=%p+%d\n", dst, ea->ea_moffs); 585 #endif 586 copyout(src, dst + ea->ea_moffs, len); 587 588 /* do post-increment */ 589 if (ea->ea_flags & EA_POSTINCR) { 590 *reg += step; 591 ea->ea_moffs = 0; 592 #ifdef DEBUG_FPE 593 printf("store_ea: postinc mode - reg incremented\n"); 594 #endif 595 } else { 596 ea->ea_moffs += len; 597 } 598 } 599 600 return 0; 601 } 602 603 /* 604 * fetch_immed: fetch immediate operand 605 */ 606 static int 607 fetch_immed(struct frame *frame, struct instruction *insn, int *dst) 608 { 609 int data, ext_bytes; 610 611 ext_bytes = insn->is_datasize; 612 613 if (0 < ext_bytes) { 614 data = fusword((void *) (insn->is_pc + insn->is_advance)); 615 if (data < 0) { 616 return SIGSEGV; 617 } 618 if (ext_bytes == 1) { 619 /* sign-extend byte to long */ 620 data &= 0xff; 621 if (data & 0x80) { 622 data |= 0xffffff00; 623 } 624 } else if (ext_bytes == 2) { 625 /* sign-extend word to long */ 626 data &= 0xffff; 627 if (data & 0x8000) { 628 data |= 0xffff0000; 629 } 630 } 631 insn->is_advance += 2; 632 dst[0] = data; 633 } 634 if (2 < ext_bytes) { 635 data = fusword((void *) (insn->is_pc + insn->is_advance)); 636 if (data < 0) { 637 return SIGSEGV; 638 } 639 insn->is_advance += 2; 640 dst[0] <<= 16; 641 dst[0] |= data; 642 } 643 if (4 < ext_bytes) { 644 data = fusword((void *) (insn->is_pc + insn->is_advance)); 645 if (data < 0) { 646 return SIGSEGV; 647 } 648 dst[1] = data << 16; 649 data = fusword((void *) (insn->is_pc + insn->is_advance + 2)); 650 if (data < 0) { 651 return SIGSEGV; 652 } 653 insn->is_advance += 4; 654 dst[1] |= data; 655 } 656 if (8 < ext_bytes) { 657 data = fusword((void *) (insn->is_pc + insn->is_advance)); 658 if (data < 0) { 659 return SIGSEGV; 660 } 661 dst[2] = data << 16; 662 data = fusword((void *) (insn->is_pc + insn->is_advance + 2)); 663 if (data < 0) { 664 return SIGSEGV; 665 } 666 insn->is_advance += 4; 667 dst[2] |= data; 668 } 669 670 return 0; 671 } 672 673 /* 674 * fetch_disp: fetch displacement in full extension words 675 */ 676 static int 677 fetch_disp(struct frame *frame, struct instruction *insn, int size, int *res) 678 { 679 int disp, word; 680 681 if (size == 1) { 682 word = fusword((void *) (insn->is_pc + insn->is_advance)); 683 if (word < 0) { 684 return SIGSEGV; 685 } 686 disp = word & 0xffff; 687 if (disp & 0x8000) { 688 /* sign-extend */ 689 disp |= 0xffff0000; 690 } 691 insn->is_advance += 2; 692 } else if (size == 2) { 693 word = fusword((void *) (insn->is_pc + insn->is_advance)); 694 if (word < 0) { 695 return SIGSEGV; 696 } 697 disp = word << 16; 698 word = fusword((void *) (insn->is_pc + insn->is_advance + 2)); 699 if (word < 0) { 700 return SIGSEGV; 701 } 702 disp |= (word & 0xffff); 703 insn->is_advance += 4; 704 } else { 705 disp = 0; 706 } 707 *res = disp; 708 return 0; 709 } 710 711 /* 712 * Calculates an effective address for all address modes except for 713 * register direct, absolute, and immediate modes. However, it does 714 * not take care of predecrement/postincrement of register content. 715 * Returns a signal value (0 == no error). 716 */ 717 static int 718 calc_ea(struct insn_ea *ea, char *ptr, char **eaddr) 719 /* ptr: base address (usually a register content) */ 720 /* eaddr: pointer to result pointer */ 721 { 722 int data, word; 723 724 #if DEBUG_FPE 725 printf("calc_ea: reg indirect (reg) = %p\n", ptr); 726 #endif 727 728 if (ea->ea_flags & EA_OFFSET) { 729 /* apply the signed offset */ 730 #if DEBUG_FPE 731 printf("calc_ea: offset %d\n", ea->ea_offset); 732 #endif 733 ptr += ea->ea_offset; 734 } else if (ea->ea_flags & EA_INDEXED) { 735 #if DEBUG_FPE 736 printf("calc_ea: indexed mode\n"); 737 #endif 738 739 if (ea->ea_flags & EA_BASE_SUPPRSS) { 740 /* base register is suppressed */ 741 ptr = (char *)ea->ea_basedisp; 742 } else { 743 ptr += ea->ea_basedisp; 744 } 745 746 if (ea->ea_flags & EA_MEM_INDIR) { 747 #if DEBUG_FPE 748 printf("calc_ea: mem indir mode: basedisp=%08x, outerdisp=%08x\n", 749 ea->ea_basedisp, ea->ea_outerdisp); 750 printf("calc_ea: addr fetched from %p\n", ptr); 751 #endif 752 /* memory indirect modes */ 753 word = fusword(ptr); 754 if (word < 0) { 755 return SIGSEGV; 756 } 757 word <<= 16; 758 data = fusword(ptr + 2); 759 if (data < 0) { 760 return SIGSEGV; 761 } 762 word |= data; 763 #if DEBUG_FPE 764 printf("calc_ea: fetched ptr 0x%08x\n", word); 765 #endif 766 ptr = (char *)word + ea->ea_outerdisp; 767 } 768 } 769 770 *eaddr = ptr; 771 772 return 0; 773 } 774
Indexes created Tue Sep 30 11:09:46 GMT 2025