fpu_calcea.c revision 1.8
1 /* $NetBSD: fpu_calcea.c,v 1.8 1999/05/30 20:17:48 briggs Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Gordon W. Ross 5 * portion Copyright (c) 1995 Ken Nakata 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 4. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Gordon Ross 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #include <sys/param.h> 35 #include <sys/signal.h> 36 #include <sys/systm.h> 37 #include <machine/frame.h> 38 39 #include "fpu_emulate.h" 40 41 /* 42 * Prototypes of static functions 43 */ 44 static int decode_ea6 __P((struct frame *frame, struct instruction *insn, 45 struct insn_ea *ea, int modreg)); 46 static int fetch_immed __P((struct frame *frame, struct instruction *insn, 47 int *dst)); 48 static int fetch_disp __P((struct frame *frame, struct instruction *insn, 49 int size, int *res)); 50 static int calc_ea __P((struct insn_ea *ea, char *ptr, char **eaddr)); 51 52 /* 53 * Helper routines for dealing with "effective address" values. 54 */ 55 56 /* 57 * Decode an effective address into internal form. 58 * Returns zero on success, else signal number. 59 */ 60 int 61 fpu_decode_ea(frame, insn, ea, modreg) 62 struct frame *frame; 63 struct instruction *insn; 64 struct insn_ea *ea; 65 int modreg; 66 { 67 int sig; 68 69 #ifdef DEBUG 70 if (insn->is_datasize < 0) { 71 panic("decode_ea: called with uninitialized datasize\n"); 72 } 73 #endif 74 75 sig = 0; 76 77 /* Set the most common value here. */ 78 ea->ea_regnum = 8 + (modreg & 7); 79 80 if ((modreg & 060) == 0) { 81 /* register direct */ 82 ea->ea_regnum = modreg & 0xf; 83 ea->ea_flags = EA_DIRECT; 84 #ifdef DEBUG_FPE 85 printf("decode_ea: register direct reg=%d\n", ea->ea_regnum); 86 #endif 87 } else if (modreg == 074) { 88 /* immediate */ 89 ea->ea_flags = EA_IMMED; 90 sig = fetch_immed(frame, insn, &ea->ea_immed[0]); 91 #ifdef DEBUG_FPE 92 printf("decode_ea: immediate size=%d\n", insn->is_datasize); 93 #endif 94 } 95 /* 96 * rest of the address modes need to be separately 97 * handled for the LC040 and the others. 98 */ 99 else if (frame->f_format == 4) { 100 /* LC040 */ 101 ea->ea_flags = EA_FRAME_EA; 102 ea->ea_fea = frame->f_fmt4.f_fa; 103 #ifdef DEBUG_FPE 104 printf("decode_ea: 68LC040 - in-frame EA (%p)\n", (void *)ea->ea_fea); 105 #endif 106 if ((modreg & 070) == 030) { 107 /* postincrement mode */ 108 ea->ea_flags |= EA_POSTINCR; 109 } else if ((modreg & 070) == 040) { 110 /* predecrement mode */ 111 ea->ea_flags |= EA_PREDECR; 112 } 113 } else { 114 /* 020/030 */ 115 switch (modreg & 070) { 116 117 case 020: /* (An) */ 118 ea->ea_flags = 0; 119 #ifdef DEBUG_FPE 120 printf("decode_ea: register indirect reg=%d\n", ea->ea_regnum); 121 #endif 122 break; 123 124 case 030: /* (An)+ */ 125 ea->ea_flags = EA_POSTINCR; 126 #ifdef DEBUG_FPE 127 printf("decode_ea: reg indirect postincrement reg=%d\n", 128 ea->ea_regnum); 129 #endif 130 break; 131 132 case 040: /* -(An) */ 133 ea->ea_flags = EA_PREDECR; 134 #ifdef DEBUG_FPE 135 printf("decode_ea: reg indirect predecrement reg=%d\n", 136 ea->ea_regnum); 137 #endif 138 break; 139 140 case 050: /* (d16,An) */ 141 ea->ea_flags = EA_OFFSET; 142 sig = fetch_disp(frame, insn, 1, &ea->ea_offset); 143 #ifdef DEBUG_FPE 144 printf("decode_ea: reg indirect with displacement reg=%d\n", 145 ea->ea_regnum); 146 #endif 147 break; 148 149 case 060: /* (d8,An,Xn) */ 150 ea->ea_flags = EA_INDEXED; 151 sig = decode_ea6(frame, insn, ea, modreg); 152 break; 153 154 case 070: /* misc. */ 155 ea->ea_regnum = (modreg & 7); 156 switch (modreg & 7) { 157 158 case 0: /* (xxxx).W */ 159 ea->ea_flags = EA_ABS; 160 sig = fetch_disp(frame, insn, 1, &ea->ea_absaddr); 161 #ifdef DEBUG_FPE 162 printf("decode_ea: absolute address (word)\n"); 163 #endif 164 break; 165 166 case 1: /* (xxxxxxxx).L */ 167 ea->ea_flags = EA_ABS; 168 sig = fetch_disp(frame, insn, 2, &ea->ea_absaddr); 169 #ifdef DEBUG_FPE 170 printf("decode_ea: absolute address (long)\n"); 171 #endif 172 break; 173 174 case 2: /* (d16,PC) */ 175 ea->ea_flags = EA_PC_REL | EA_OFFSET; 176 sig = fetch_disp(frame, insn, 1, &ea->ea_absaddr); 177 #ifdef DEBUG_FPE 178 printf("decode_ea: pc relative word displacement\n"); 179 #endif 180 break; 181 182 case 3: /* (d8,PC,Xn) */ 183 ea->ea_flags = EA_PC_REL | EA_INDEXED; 184 sig = decode_ea6(frame, insn, ea, modreg); 185 break; 186 187 case 4: /* #data */ 188 /* it should have been taken care of earlier */ 189 default: 190 #ifdef DEBUG_FPE 191 printf("decode_ea: invalid addr mode (7,%d)\n", modreg & 7); 192 #endif 193 return SIGILL; 194 } /* switch for mode 7 */ 195 break; 196 } /* switch mode */ 197 } 198 ea->ea_moffs = 0; 199 200 return sig; 201 } 202 203 /* 204 * Decode Mode=6 address modes 205 */ 206 static int 207 decode_ea6(frame, insn, ea, modreg) 208 struct frame *frame; 209 struct instruction *insn; 210 struct insn_ea *ea; 211 int modreg; 212 { 213 int extword, idx; 214 int basedisp, outerdisp; 215 int bd_size, od_size; 216 int sig; 217 218 extword = fusword((void *) (insn->is_pc + insn->is_advance)); 219 if (extword < 0) { 220 return SIGSEGV; 221 } 222 insn->is_advance += 2; 223 224 /* get register index */ 225 ea->ea_idxreg = (extword >> 12) & 0xf; 226 idx = frame->f_regs[ea->ea_idxreg]; 227 if ((extword & 0x0800) == 0) { 228 /* if word sized index, sign-extend */ 229 idx &= 0xffff; 230 if (idx & 0x8000) { 231 idx |= 0xffff0000; 232 } 233 } 234 /* scale register index */ 235 idx <<= ((extword >>9) & 3); 236 237 if ((extword & 0x100) == 0) { 238 /* brief extention word - sign-extend the displacement */ 239 basedisp = (extword & 0xff); 240 if (basedisp & 0x80) { 241 basedisp |= 0xffffff00; 242 } 243 244 ea->ea_basedisp = idx + basedisp; 245 ea->ea_outerdisp = 0; 246 #if DEBUG_FPE 247 printf("decode_ea6: brief ext word idxreg=%d, basedisp=%08x\n", 248 ea->ea_idxreg, ea->ea_basedisp); 249 #endif 250 } else { 251 /* full extention word */ 252 if (extword & 0x80) { 253 ea->ea_flags |= EA_BASE_SUPPRSS; 254 } 255 bd_size = ((extword >> 4) & 3) - 1; 256 od_size = (extword & 3) - 1; 257 sig = fetch_disp(frame, insn, bd_size, &basedisp); 258 if (sig) { 259 return sig; 260 } 261 if (od_size >= 0) { 262 ea->ea_flags |= EA_MEM_INDIR; 263 } 264 sig = fetch_disp(frame, insn, od_size, &outerdisp); 265 if (sig) { 266 return sig; 267 } 268 269 switch (extword & 0x44) { 270 case 0: /* preindexed */ 271 ea->ea_basedisp = basedisp + idx; 272 ea->ea_outerdisp = outerdisp; 273 break; 274 case 4: /* postindexed */ 275 ea->ea_basedisp = basedisp; 276 ea->ea_outerdisp = outerdisp + idx; 277 break; 278 case 0x40: /* no index */ 279 ea->ea_basedisp = basedisp; 280 ea->ea_outerdisp = outerdisp; 281 break; 282 default: 283 #ifdef DEBUG 284 printf("decode_ea6: invalid indirect mode: ext word %04x\n", 285 extword); 286 #endif 287 return SIGILL; 288 break; 289 } 290 #if DEBUG_FPE 291 printf("decode_ea6: full ext idxreg=%d, basedisp=%x, outerdisp=%x\n", 292 ea->ea_idxreg, ea->ea_basedisp, ea->ea_outerdisp); 293 #endif 294 } 295 #if DEBUG_FPE 296 printf("decode_ea6: regnum=%d, flags=%x\n", 297 ea->ea_regnum, ea->ea_flags); 298 #endif 299 return 0; 300 } 301 302 /* 303 * Load a value from an effective address. 304 * Returns zero on success, else signal number. 305 */ 306 int 307 fpu_load_ea(frame, insn, ea, dst) 308 struct frame *frame; 309 struct instruction *insn; 310 struct insn_ea *ea; 311 char *dst; 312 { 313 int *reg; 314 char *src; 315 int len, step; 316 int sig; 317 318 #ifdef DIAGNOSTIC 319 if (ea->ea_regnum & ~0xF) { 320 panic("load_ea: bad regnum"); 321 } 322 #endif 323 324 #ifdef DEBUG_FPE 325 printf("load_ea: frame at %p\n", frame); 326 #endif 327 /* dst is always int or larger. */ 328 len = insn->is_datasize; 329 if (len < 4) { 330 dst += (4 - len); 331 } 332 step = (len == 1 && ea->ea_regnum == 15 /* sp */) ? 2 : len; 333 334 if (ea->ea_flags & EA_FRAME_EA) { 335 /* Using LC040 frame EA */ 336 #ifdef DEBUG_FPE 337 if (ea->ea_flags & (EA_PREDECR|EA_POSTINCR)) { 338 printf("load_ea: frame ea %08x w/r%d\n", 339 ea->ea_fea, ea->ea_regnum); 340 } else { 341 printf("load_ea: frame ea %08x\n", ea->ea_fea); 342 } 343 #endif 344 src = (char *)ea->ea_fea; 345 copyin(src + ea->ea_moffs, dst, len); 346 if (ea->ea_flags & EA_PREDECR) { 347 frame->f_regs[ea->ea_regnum] = ea->ea_fea; 348 ea->ea_fea -= step; 349 ea->ea_moffs = 0; 350 } else if (ea->ea_flags & EA_POSTINCR) { 351 ea->ea_fea += step; 352 frame->f_regs[ea->ea_regnum] = ea->ea_fea; 353 ea->ea_moffs = 0; 354 } else { 355 ea->ea_moffs += step; 356 } 357 /* That's it, folks */ 358 } else if (ea->ea_flags & EA_DIRECT) { 359 if (len > 4) { 360 #ifdef DEBUG 361 printf("load_ea: operand doesn't fit cpu reg\n"); 362 #endif 363 return SIGILL; 364 } 365 if (ea->ea_moffs > 0) { 366 #ifdef DEBUG 367 printf("load_ea: more than one move from cpu reg\n"); 368 #endif 369 return SIGILL; 370 } 371 src = (char *)&frame->f_regs[ea->ea_regnum]; 372 /* The source is an int. */ 373 if (len < 4) { 374 src += (4 - len); 375 #ifdef DEBUG_FPE 376 printf("load_ea: short/byte opr - addr adjusted\n"); 377 #endif 378 } 379 #ifdef DEBUG_FPE 380 printf("load_ea: src %p\n", src); 381 #endif 382 bcopy(src, dst, len); 383 } else if (ea->ea_flags & EA_IMMED) { 384 #ifdef DEBUG_FPE 385 printf("load_ea: immed %08x%08x%08x size %d\n", 386 ea->ea_immed[0], ea->ea_immed[1], ea->ea_immed[2], len); 387 #endif 388 src = (char *)&ea->ea_immed[0]; 389 if (len < 4) { 390 src += (4 - len); 391 #ifdef DEBUG_FPE 392 printf("load_ea: short/byte immed opr - addr adjusted\n"); 393 #endif 394 } 395 bcopy(src, dst, len); 396 } else if (ea->ea_flags & EA_ABS) { 397 #ifdef DEBUG_FPE 398 printf("load_ea: abs addr %08x\n", ea->ea_absaddr); 399 #endif 400 src = (char *)ea->ea_absaddr; 401 copyin(src, dst, len); 402 } else /* register indirect */ { 403 if (ea->ea_flags & EA_PC_REL) { 404 #ifdef DEBUG_FPE 405 printf("load_ea: using PC\n"); 406 #endif 407 reg = NULL; 408 /* Grab the register contents. 4 is offset to the first 409 extention word from the opcode */ 410 src = (char *)insn->is_pc + 4; 411 #ifdef DEBUG_FPE 412 printf("load_ea: pc relative pc+4 = %p\n", src); 413 #endif 414 } else /* not PC relative */ { 415 #ifdef DEBUG_FPE 416 printf("load_ea: using register %c%d\n", 417 (ea->ea_regnum >= 8) ? 'a' : 'd', ea->ea_regnum & 7); 418 #endif 419 /* point to the register */ 420 reg = &frame->f_regs[ea->ea_regnum]; 421 422 if (ea->ea_flags & EA_PREDECR) { 423 #ifdef DEBUG_FPE 424 printf("load_ea: predecr mode - reg decremented\n"); 425 #endif 426 *reg -= step; 427 ea->ea_moffs = 0; 428 } 429 430 /* Grab the register contents. */ 431 src = (char *)*reg; 432 #ifdef DEBUG_FPE 433 printf("load_ea: reg indirect reg = %p\n", src); 434 #endif 435 } 436 437 sig = calc_ea(ea, src, &src); 438 if (sig) 439 return sig; 440 441 copyin(src + ea->ea_moffs, dst, len); 442 443 /* do post-increment */ 444 if (ea->ea_flags & EA_POSTINCR) { 445 if (ea->ea_flags & EA_PC_REL) { 446 #ifdef DEBUG 447 printf("load_ea: tried to postincrement PC\n"); 448 #endif 449 return SIGILL; 450 } 451 *reg += step; 452 ea->ea_moffs = 0; 453 #ifdef DEBUG_FPE 454 printf("load_ea: postinc mode - reg incremented\n"); 455 #endif 456 } else { 457 ea->ea_moffs += len; 458 } 459 } 460 461 return 0; 462 } 463 464 /* 465 * Store a value at the effective address. 466 * Returns zero on success, else signal number. 467 */ 468 int 469 fpu_store_ea(frame, insn, ea, src) 470 struct frame *frame; 471 struct instruction *insn; 472 struct insn_ea *ea; 473 char *src; 474 { 475 int *reg; 476 char *dst; 477 int len, step; 478 int sig; 479 480 #ifdef DIAGNOSTIC 481 if (ea->ea_regnum & ~0xf) { 482 panic("store_ea: bad regnum"); 483 } 484 #endif 485 486 if (ea->ea_flags & (EA_IMMED|EA_PC_REL)) { 487 /* not alterable address mode */ 488 #ifdef DEBUG 489 printf("store_ea: not alterable address mode\n"); 490 #endif 491 return SIGILL; 492 } 493 494 /* src is always int or larger. */ 495 len = insn->is_datasize; 496 if (len < 4) { 497 src += (4 - len); 498 } 499 step = (len == 1 && ea->ea_regnum == 15 /* sp */) ? 2 : len; 500 501 if (ea->ea_flags & EA_FRAME_EA) { 502 /* Using LC040 frame EA */ 503 #ifdef DEBUG_FPE 504 if (ea->ea_flags & (EA_PREDECR|EA_POSTINCR)) { 505 printf("store_ea: frame ea %08x w/r%d\n", 506 ea->ea_fea, ea->ea_regnum); 507 } else { 508 printf("store_ea: frame ea %08x\n", ea->ea_fea); 509 } 510 #endif 511 dst = (char *)ea->ea_fea; 512 copyout(src, dst + ea->ea_moffs, len); 513 if (ea->ea_flags & EA_PREDECR) { 514 frame->f_regs[ea->ea_regnum] = ea->ea_fea; 515 ea->ea_fea -= step; 516 ea->ea_moffs = 0; 517 } else if (ea->ea_flags & EA_POSTINCR) { 518 ea->ea_fea += step; 519 frame->f_regs[ea->ea_regnum] = ea->ea_fea; 520 ea->ea_moffs = 0; 521 } else { 522 ea->ea_moffs += step; 523 } 524 /* That's it, folks */ 525 } else if (ea->ea_flags & EA_ABS) { 526 #ifdef DEBUG_FPE 527 printf("store_ea: abs addr %08x\n", ea->ea_absaddr); 528 #endif 529 dst = (char *)ea->ea_absaddr; 530 copyout(src, dst + ea->ea_moffs, len); 531 ea->ea_moffs += len; 532 } else if (ea->ea_flags & EA_DIRECT) { 533 if (len > 4) { 534 #ifdef DEBUG 535 printf("store_ea: operand doesn't fit cpu reg\n"); 536 #endif 537 return SIGILL; 538 } 539 if (ea->ea_moffs > 0) { 540 #ifdef DEBUG 541 printf("store_ea: more than one move to cpu reg\n"); 542 #endif 543 return SIGILL; 544 } 545 dst = (char*)&frame->f_regs[ea->ea_regnum]; 546 /* The destination is an int. */ 547 if (len < 4) { 548 dst += (4 - len); 549 #ifdef DEBUG_FPE 550 printf("store_ea: short/byte opr - dst addr adjusted\n"); 551 #endif 552 } 553 #ifdef DEBUG_FPE 554 printf("store_ea: dst %p\n", dst); 555 #endif 556 bcopy(src, dst, len); 557 } else /* One of MANY indirect forms... */ { 558 #ifdef DEBUG_FPE 559 printf("store_ea: using register %c%d\n", 560 (ea->ea_regnum >= 8) ? 'a' : 'd', ea->ea_regnum & 7); 561 #endif 562 /* point to the register */ 563 reg = &(frame->f_regs[ea->ea_regnum]); 564 565 /* do pre-decrement */ 566 if (ea->ea_flags & EA_PREDECR) { 567 #ifdef DEBUG_FPE 568 printf("store_ea: predecr mode - reg decremented\n"); 569 #endif 570 *reg -= step; 571 ea->ea_moffs = 0; 572 } 573 574 /* calculate the effective address */ 575 sig = calc_ea(ea, (char *)*reg, &dst); 576 if (sig) 577 return sig; 578 579 #ifdef DEBUG_FPE 580 printf("store_ea: dst addr=%p+%d\n", dst, ea->ea_moffs); 581 #endif 582 copyout(src, dst + ea->ea_moffs, len); 583 584 /* do post-increment */ 585 if (ea->ea_flags & EA_POSTINCR) { 586 *reg += step; 587 ea->ea_moffs = 0; 588 #ifdef DEBUG_FPE 589 printf("store_ea: postinc mode - reg incremented\n"); 590 #endif 591 } else { 592 ea->ea_moffs += len; 593 } 594 } 595 596 return 0; 597 } 598 599 /* 600 * fetch_immed: fetch immediate operand 601 */ 602 static int 603 fetch_immed(frame, insn, dst) 604 struct frame *frame; 605 struct instruction *insn; 606 int *dst; 607 { 608 int data, ext_bytes; 609 610 ext_bytes = insn->is_datasize; 611 612 if (0 < ext_bytes) { 613 data = fusword((void *) (insn->is_pc + insn->is_advance)); 614 if (data < 0) { 615 return SIGSEGV; 616 } 617 if (ext_bytes == 1) { 618 /* sign-extend byte to long */ 619 data &= 0xff; 620 if (data & 0x80) { 621 data |= 0xffffff00; 622 } 623 } else if (ext_bytes == 2) { 624 /* sign-extend word to long */ 625 data &= 0xffff; 626 if (data & 0x8000) { 627 data |= 0xffff0000; 628 } 629 } 630 insn->is_advance += 2; 631 dst[0] = data; 632 } 633 if (2 < ext_bytes) { 634 data = fusword((void *) (insn->is_pc + insn->is_advance)); 635 if (data < 0) { 636 return SIGSEGV; 637 } 638 insn->is_advance += 2; 639 dst[0] <<= 16; 640 dst[0] |= data; 641 } 642 if (4 < ext_bytes) { 643 data = fusword((void *) (insn->is_pc + insn->is_advance)); 644 if (data < 0) { 645 return SIGSEGV; 646 } 647 dst[1] = data << 16; 648 data = fusword((void *) (insn->is_pc + insn->is_advance + 2)); 649 if (data < 0) { 650 return SIGSEGV; 651 } 652 insn->is_advance += 4; 653 dst[1] |= data; 654 } 655 if (8 < ext_bytes) { 656 data = fusword((void *) (insn->is_pc + insn->is_advance)); 657 if (data < 0) { 658 return SIGSEGV; 659 } 660 dst[2] = data << 16; 661 data = fusword((void *) (insn->is_pc + insn->is_advance + 2)); 662 if (data < 0) { 663 return SIGSEGV; 664 } 665 insn->is_advance += 4; 666 dst[2] |= data; 667 } 668 669 return 0; 670 } 671 672 /* 673 * fetch_disp: fetch displacement in full extention words 674 */ 675 static int 676 fetch_disp(frame, insn, size, res) 677 struct frame *frame; 678 struct instruction *insn; 679 int size, *res; 680 { 681 int disp, word; 682 683 if (size == 1) { 684 word = fusword((void *) (insn->is_pc + insn->is_advance)); 685 if (word < 0) { 686 return SIGSEGV; 687 } 688 disp = word & 0xffff; 689 if (disp & 0x8000) { 690 /* sign-extend */ 691 disp |= 0xffff0000; 692 } 693 insn->is_advance += 2; 694 } else if (size == 2) { 695 word = fusword((void *) (insn->is_pc + insn->is_advance)); 696 if (word < 0) { 697 return SIGSEGV; 698 } 699 disp = word << 16; 700 word = fusword((void *) (insn->is_pc + insn->is_advance + 2)); 701 if (word < 0) { 702 return SIGSEGV; 703 } 704 disp |= (word & 0xffff); 705 insn->is_advance += 4; 706 } else { 707 disp = 0; 708 } 709 *res = disp; 710 return 0; 711 } 712 713 /* 714 * Calculates an effective address for all address modes except for 715 * register direct, absolute, and immediate modes. However, it does 716 * not take care of predecrement/postincrement of register content. 717 * Returns a signal value (0 == no error). 718 */ 719 static int 720 calc_ea(ea, ptr, eaddr) 721 struct insn_ea *ea; 722 char *ptr; /* base address (usually a register content) */ 723 char **eaddr; /* pointer to result pointer */ 724 { 725 int data, word; 726 727 #if DEBUG_FPE 728 printf("calc_ea: reg indirect (reg) = %p\n", ptr); 729 #endif 730 731 if (ea->ea_flags & EA_OFFSET) { 732 /* apply the signed offset */ 733 #if DEBUG_FPE 734 printf("calc_ea: offset %d\n", ea->ea_offset); 735 #endif 736 ptr += ea->ea_offset; 737 } else if (ea->ea_flags & EA_INDEXED) { 738 #if DEBUG_FPE 739 printf("calc_ea: indexed mode\n"); 740 #endif 741 742 if (ea->ea_flags & EA_BASE_SUPPRSS) { 743 /* base register is suppressed */ 744 ptr = (char *)ea->ea_basedisp; 745 } else { 746 ptr += ea->ea_basedisp; 747 } 748 749 if (ea->ea_flags & EA_MEM_INDIR) { 750 #if DEBUG_FPE 751 printf("calc_ea: mem indir mode: basedisp=%08x, outerdisp=%08x\n", 752 ea->ea_basedisp, ea->ea_outerdisp); 753 printf("calc_ea: addr fetched from %p\n", ptr); 754 #endif 755 /* memory indirect modes */ 756 word = fusword(ptr); 757 if (word < 0) { 758 return SIGSEGV; 759 } 760 word <<= 16; 761 data = fusword(ptr + 2); 762 if (data < 0) { 763 return SIGSEGV; 764 } 765 word |= data; 766 #if DEBUG_FPE 767 printf("calc_ea: fetched ptr 0x%08x\n", word); 768 #endif 769 ptr = (char *)word + ea->ea_outerdisp; 770 } 771 } 772 773 *eaddr = ptr; 774 775 return 0; 776 } 777
Indexes created Tue Sep 30 11:09:46 GMT 2025