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fpu_fstore.c revision 1.2 
      1 /*	$NetBSD: fpu_fstore.c,v 1.2 1995/11/05 00:35:29 briggs Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1995 Ken Nakata
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     26  */
     27 
     28 #include <sys/types.h>
     29 #include <sys/signal.h>
     30 #include <machine/frame.h>
     31 
     32 #include "fpu_emulate.h"
     33 
     34 /*
     35  * type 0: fmove mem/fpr->fpr
     36  * In this function, we know
     37  *	(opcode & 0x01c0) == 0
     38  *	(word1 & 0xe000) == 0x6000
     39  */
     40 int
     41 fpu_emul_fstore(fe, insn)
     42      struct fpemu *fe;
     43      struct instruction *insn;
     44 {
     45     struct frame *frame = fe->fe_frame;
     46     u_int *fpregs = fe->fe_fpframe->fpf_regs;
     47     int word1, sig;
     48     int regnum;
     49     int format;
     50     u_int buf[3];
     51     u_int flags;
     52     char regname;
     53 
     54     if (fpu_debug_level & DL_FSTORE) {
     55 	printf("  fpu_emul_fstore: frame at %08x fpframe at %08x\n",
     56 	       frame, fe->fe_fpframe);
     57     }
     58 
     59     word1 = insn->is_word1;
     60     format = (word1 >> 10) & 7;
     61     regnum = (word1 >> 7) & 7;
     62 
     63     insn->is_advance = 4;
     64 
     65     if (format == FTYPE_DBL) {
     66 	insn->is_datasize = 8;
     67     } else if (format == FTYPE_SNG || format == FTYPE_LNG) {
     68 	insn->is_datasize = 4;
     69     } else if (format == FTYPE_WRD) {
     70 	insn->is_datasize = 2;
     71 	format = FTYPE_LNG;
     72     } else if (format == FTYPE_BYT) {
     73 	insn->is_datasize = 1;
     74 	format = FTYPE_LNG;
     75     } else if (format == FTYPE_EXT) {
     76 	insn->is_datasize = 12;
     77     } else {
     78 	/* invalid or unsupported operand format */
     79 	if (fpu_debug_level & DL_FSTORE) {
     80 	    printf("  fpu_emul_fstore: invalid format %d\n", format);
     81 	}
     82 	sig = SIGFPE;
     83     }
     84     if (fpu_debug_level & DL_FSTORE) {
     85 	printf("  fpu_emul_fstore: format %d, size %d\n",
     86 	       format, insn->is_datasize);
     87     }
     88 
     89     /* Get effective address. (modreg=opcode&077) */
     90     sig = fpu_decode_ea(frame, insn, &insn->is_ea0, insn->is_opcode);
     91     if (sig) {
     92 	if (fpu_debug_level & DL_FSTORE) {
     93 	    printf("  fpu_emul_fstore: failed in decode_ea sig=%d\n", sig);
     94 	}
     95 	return sig;
     96     }
     97 
     98     if (insn->is_datasize > 4 && insn->is_ea0.ea_flags == EA_DIRECT) {
     99 	/* trying to store dbl or ext into a data register */
    100 #ifdef DEBUG
    101 	printf("  fpu_fstore: attempted to store dbl/ext to reg\n");
    102 #endif
    103 	return SIGILL;
    104     }
    105 
    106     if (fpu_debug_level & DL_OPERANDS)
    107 	printf("  fpu_emul_fstore: saving FP%d (%08x,%08x,%08x)\n",
    108 	       regnum, fpregs[regnum * 3], fpregs[regnum * 3 + 1],
    109 	       fpregs[regnum * 3 + 2]);
    110     fpu_explode(fe, &fe->fe_f3, FTYPE_EXT, &fpregs[regnum * 3]);
    111     if (fpu_debug_level & DL_VALUES) {
    112 	static char *class_name[] = { "SNAN", "QNAN", "ZERO", "NUM", "INF" };
    113 	printf("  fpu_emul_fstore: fpn (%s,%c,%d,%08x,%08x,%08x,%08x)\n",
    114 	       class_name[fe->fe_f3.fp_class + 2],
    115 	       fe->fe_f3.fp_sign ? '-' : '+', fe->fe_f3.fp_exp,
    116 	       fe->fe_f3.fp_mant[0], fe->fe_f3.fp_mant[1],
    117 	       fe->fe_f3.fp_mant[2], fe->fe_f3.fp_mant[3]);
    118     }
    119     fpu_implode(fe, &fe->fe_f3, format, buf);
    120 
    121     fpu_store_ea(frame, insn, &insn->is_ea0, (char *)buf);
    122     if (fpu_debug_level & DL_RESULT)
    123 	printf("  fpu_emul_fstore: %08x,%08x,%08x size %d\n",
    124 	       buf[0], buf[1], buf[2], insn->is_datasize);
    125 
    126     return 0;
    127 }
    128