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fpu_int.c revision 1.10.8.1
      1  1.10.8.1     jdc /*	$NetBSD: fpu_int.c,v 1.10.8.1 2012/07/04 20:30:00 jdc Exp $	*/
      2       1.1  briggs 
      3       1.1  briggs /*
      4       1.1  briggs  * Copyright (c) 1995 Ken Nakata
      5       1.1  briggs  * All rights reserved.
      6       1.1  briggs  *
      7       1.1  briggs  * Redistribution and use in source and binary forms, with or without
      8       1.1  briggs  * modification, are permitted provided that the following conditions
      9       1.1  briggs  * are met:
     10       1.1  briggs  * 1. Redistributions of source code must retain the above copyright
     11       1.1  briggs  *    notice, this list of conditions and the following disclaimer.
     12       1.1  briggs  * 2. Redistributions in binary form must reproduce the above copyright
     13       1.1  briggs  *    notice, this list of conditions and the following disclaimer in the
     14       1.1  briggs  *    documentation and/or other materials provided with the distribution.
     15       1.1  briggs  *
     16       1.1  briggs  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     17       1.1  briggs  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     18       1.1  briggs  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     19       1.1  briggs  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     20       1.1  briggs  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     21       1.1  briggs  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     22       1.1  briggs  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     23       1.1  briggs  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     24       1.1  briggs  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25       1.1  briggs  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26       1.1  briggs  * SUCH DAMAGE.
     27       1.1  briggs  *
     28       1.1  briggs  *	@(#)fpu_int.c
     29       1.1  briggs  */
     30       1.6   lukem 
     31       1.6   lukem #include <sys/cdefs.h>
     32  1.10.8.1     jdc __KERNEL_RCSID(0, "$NetBSD: fpu_int.c,v 1.10.8.1 2012/07/04 20:30:00 jdc Exp $");
     33       1.1  briggs 
     34       1.1  briggs #include <sys/types.h>
     35       1.1  briggs 
     36       1.1  briggs #include <machine/reg.h>
     37       1.1  briggs 
     38       1.1  briggs #include "fpu_arith.h"
     39       1.1  briggs #include "fpu_emulate.h"
     40       1.1  briggs 
     41       1.1  briggs /* FINTRZ - always round to zero */
     42       1.1  briggs struct fpn *
     43       1.8     dsl fpu_intrz(struct fpemu *fe)
     44       1.1  briggs {
     45       1.9   isaki 	register struct fpn *x = &fe->fe_f2;
     46       1.9   isaki 	register int sh, clr, mask, i;
     47       1.1  briggs 
     48       1.9   isaki 	/* special cases first */
     49       1.9   isaki 	if (x->fp_class != FPC_NUM) {
     50       1.9   isaki 		return x;
     51       1.9   isaki 	}
     52       1.9   isaki 	/* when |x| < 1.0 */
     53       1.9   isaki 	if (x->fp_exp < 0) {
     54       1.9   isaki 		x->fp_class = FPC_ZERO;
     55       1.9   isaki 		x->fp_mant[0] = x->fp_mant[1] = x->fp_mant[2] = 0;
     56       1.9   isaki 		return x;
     57       1.9   isaki 	}
     58       1.9   isaki 
     59       1.9   isaki 	/* real work */
     60       1.9   isaki 	sh = FP_NMANT - 1 - x->fp_exp;
     61       1.9   isaki 	if (sh <= 0) {
     62       1.9   isaki 		return x;
     63       1.9   isaki 	}
     64       1.9   isaki 
     65       1.9   isaki 	clr = 2 - sh / 32;
     66       1.9   isaki 	mask = (0xffffffff << (sh % 32));
     67       1.9   isaki 
     68       1.9   isaki 	for (i = 2; i > clr; i--) {
     69       1.9   isaki 		x->fp_mant[i] = 0;
     70       1.9   isaki 	}
     71       1.9   isaki 	x->fp_mant[i] &= mask;
     72       1.1  briggs 
     73       1.9   isaki 	return x;
     74       1.1  briggs }
     75       1.1  briggs 
     76       1.1  briggs /* FINT */
     77       1.1  briggs struct fpn *
     78       1.8     dsl fpu_int(struct fpemu *fe)
     79       1.1  briggs {
     80       1.9   isaki 	register struct fpn *x = &fe->fe_f2;
     81  1.10.8.1     jdc 	register int rsh;
     82       1.1  briggs 
     83       1.9   isaki 	/* special cases first */
     84       1.9   isaki 	if (x->fp_class != FPC_NUM) {
     85       1.9   isaki 		return x;
     86       1.9   isaki 	}
     87       1.9   isaki 
     88       1.9   isaki 	rsh = FP_NMANT - 1 - x->fp_exp;
     89  1.10.8.1     jdc 	if (rsh <= FP_NG) {
     90       1.9   isaki 		return x;
     91       1.9   isaki 	}
     92       1.9   isaki 
     93  1.10.8.1     jdc 	/* shift to the right */
     94  1.10.8.1     jdc 	x->fp_exp = 0;
     95  1.10.8.1     jdc 	fpu_shr(x, rsh - FP_NG);
     96       1.9   isaki 
     97  1.10.8.1     jdc 	/* round according to FPCR round mode */
     98  1.10.8.1     jdc 	fpu_round(fe, x);
     99       1.9   isaki 
    100       1.9   isaki 	/* shift it back to the left */
    101  1.10.8.1     jdc 	x->fp_exp = FP_NMANT - 1;
    102  1.10.8.1     jdc 	fpu_norm(x);
    103       1.1  briggs 
    104       1.9   isaki 	return x;
    105       1.1  briggs }
    106