bus_dma.h revision 1.10
1 /* $NetBSD: bus_dma.h,v 1.10 2007/10/17 19:55:05 garbled Exp $ */ 2 3 /* 4 * This file was extracted from from alpha/include/bus.h 5 * and should probably be resynced when needed. 6 * Darrin B. Jewell <dbj (at) NetBSD.org> Sat Jul 31 06:11:33 UTC 1999 7 * original cvs id: NetBSD: bus.h,v 1.29 1999/06/18 04:49:24 cgd Exp 8 */ 9 10 11 /*- 12 * Copyright (c) 1997, 1998, 2001 The NetBSD Foundation, Inc. 13 * All rights reserved. 14 * 15 * This code is derived from software contributed to The NetBSD Foundation 16 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 17 * NASA Ames Research Center. 18 * 19 * Redistribution and use in source and binary forms, with or without 20 * modification, are permitted provided that the following conditions 21 * are met: 22 * 1. Redistributions of source code must retain the above copyright 23 * notice, this list of conditions and the following disclaimer. 24 * 2. Redistributions in binary form must reproduce the above copyright 25 * notice, this list of conditions and the following disclaimer in the 26 * documentation and/or other materials provided with the distribution. 27 * 3. All advertising materials mentioning features or use of this software 28 * must display the following acknowledgement: 29 * This product includes software developed by the NetBSD 30 * Foundation, Inc. and its contributors. 31 * 4. Neither the name of The NetBSD Foundation nor the names of its 32 * contributors may be used to endorse or promote products derived 33 * from this software without specific prior written permission. 34 * 35 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 36 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 37 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 38 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 39 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 40 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 41 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 42 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 43 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 44 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 45 * POSSIBILITY OF SUCH DAMAGE. 46 */ 47 48 /* 49 * Copyright (c) 1996 Carnegie-Mellon University. 50 * All rights reserved. 51 * 52 * Author: Chris G. Demetriou 53 * 54 * Permission to use, copy, modify and distribute this software and 55 * its documentation is hereby granted, provided that both the copyright 56 * notice and this permission notice appear in all copies of the 57 * software, derivative works or modified versions, and any portions 58 * thereof, and that both notices appear in supporting documentation. 59 * 60 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 61 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 62 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 63 * 64 * Carnegie Mellon requests users of this software to return to 65 * 66 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 67 * School of Computer Science 68 * Carnegie Mellon University 69 * Pittsburgh PA 15213-3890 70 * 71 * any improvements or extensions that they make and grant Carnegie the 72 * rights to redistribute these changes. 73 */ 74 75 #ifndef _M68K_BUS_DMA_H_ 76 #define _M68K_BUS_DMA_H_ 77 78 /* 79 * Bus DMA methods. 80 */ 81 82 /* 83 * Flags used in various bus DMA methods. 84 */ 85 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 86 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 87 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 88 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 89 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 90 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 91 #define BUS_DMA_BUS2 0x020 92 #define BUS_DMA_BUS3 0x040 93 #define BUS_DMA_BUS4 0x080 94 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 95 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 96 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ 97 98 /* Forwards needed by prototypes below. */ 99 struct mbuf; 100 struct uio; 101 102 /* 103 * Operations performed by bus_dmamap_sync(). 104 */ 105 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 106 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 107 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 108 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 109 110 typedef struct m68k_bus_dma_tag *bus_dma_tag_t; 111 typedef struct m68k_bus_dmamap *bus_dmamap_t; 112 113 /* 114 * bus_dma_segment_t 115 * 116 * Describes a single contiguous DMA transaction. Values 117 * are suitable for programming into DMA registers. 118 */ 119 struct m68k_bus_dma_segment { 120 bus_addr_t ds_addr; /* DMA address */ 121 bus_size_t ds_len; /* length of transfer */ 122 u_int _ds_flags; /* MD flags */ 123 }; 124 typedef struct m68k_bus_dma_segment bus_dma_segment_t; 125 126 /* 127 * bus_dma_tag_t 128 * 129 * A machine-dependent opaque type describing the implementation of 130 * DMA for a given bus. 131 */ 132 struct m68k_bus_dma_tag { 133 void *_cookie; /* cookie used in the guts */ 134 135 /* 136 * Some chipsets have a built-in boundary constraint, independent 137 * of what the device requests. This allows that boundary to 138 * be specified. If the device has a more restrictive constraint, 139 * the map will use that, otherwise this boundary will be used. 140 * This value is ignored if 0. 141 */ 142 bus_size_t _boundary; 143 144 /* 145 * DMA mapping methods. 146 */ 147 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int, 148 bus_size_t, bus_size_t, int, bus_dmamap_t *); 149 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 150 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 151 bus_size_t, struct proc *, int); 152 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, 153 struct mbuf *, int); 154 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, 155 struct uio *, int); 156 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, 157 bus_dma_segment_t *, int, bus_size_t, int); 158 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 159 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 160 bus_addr_t, bus_size_t, int); 161 162 /* 163 * DMA memory utility functions. 164 */ 165 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 166 bus_size_t, bus_dma_segment_t *, int, int *, int); 167 void (*_dmamem_free)(bus_dma_tag_t, 168 bus_dma_segment_t *, int); 169 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 170 int, size_t, void **, int); 171 void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t); 172 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 173 int, off_t, int, int); 174 }; 175 176 #define bus_dmamap_create(t, s, n, m, b, f, p) \ 177 (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p)) 178 #define bus_dmamap_destroy(t, p) \ 179 (*(t)->_dmamap_destroy)((t), (p)) 180 #define bus_dmamap_load(t, m, b, s, p, f) \ 181 (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f)) 182 #define bus_dmamap_load_mbuf(t, m, b, f) \ 183 (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f)) 184 #define bus_dmamap_load_uio(t, m, u, f) \ 185 (*(t)->_dmamap_load_uio)((t), (m), (u), (f)) 186 #define bus_dmamap_load_raw(t, m, sg, n, s, f) \ 187 (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) 188 #define bus_dmamap_unload(t, p) \ 189 (*(t)->_dmamap_unload)((t), (p)) 190 #define bus_dmamap_sync(t, p, o, l, ops) \ 191 (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops)) 192 #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ 193 (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) 194 #define bus_dmamem_free(t, sg, n) \ 195 (*(t)->_dmamem_free)((t), (sg), (n)) 196 #define bus_dmamem_map(t, sg, n, s, k, f) \ 197 (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) 198 #define bus_dmamem_unmap(t, k, s) \ 199 (*(t)->_dmamem_unmap)((t), (k), (s)) 200 #define bus_dmamem_mmap(t, sg, n, o, p, f) \ 201 (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) 202 203 #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP 204 #define bus_dmatag_destroy(t) 205 206 /* 207 * bus_dmamap_t 208 * 209 * Describes a DMA mapping. 210 */ 211 struct m68k_bus_dmamap { 212 /* 213 * PRIVATE MEMBERS: not for use by machine-independent code. 214 */ 215 bus_size_t _dm_size; /* largest DMA transfer mappable */ 216 int _dm_segcnt; /* number of segs this map can map */ 217 bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */ 218 bus_size_t _dm_boundary; /* don't cross this */ 219 u_int _dm_flags; /* misc. flags */ 220 221 /* Machine dependant fields: */ 222 bus_size_t dm_xfer_len; /* length of successful transfer */ 223 224 /* 225 * PUBLIC MEMBERS: these are used by machine-independent code. 226 */ 227 bus_size_t dm_maxsegsz; /* largest possible segment */ 228 bus_size_t dm_mapsize; /* size of the mapping */ 229 int dm_nsegs; /* # valid segments in mapping */ 230 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 231 232 }; 233 234 #ifdef _M68K_BUS_DMA_PRIVATE 235 int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, 236 bus_size_t, int, bus_dmamap_t *); 237 void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 238 239 int _bus_dmamap_load_direct(bus_dma_tag_t, bus_dmamap_t, 240 void *, bus_size_t, struct proc *, int); 241 int _bus_dmamap_load_mbuf_direct(bus_dma_tag_t, 242 bus_dmamap_t, struct mbuf *, int); 243 int _bus_dmamap_load_uio_direct(bus_dma_tag_t, 244 bus_dmamap_t, struct uio *, int); 245 int _bus_dmamap_load_raw_direct(bus_dma_tag_t, 246 bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int); 247 248 void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 249 void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 250 bus_size_t, int); 251 252 int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size, 253 bus_size_t alignment, bus_size_t boundary, 254 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags); 255 void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, 256 int nsegs); 257 int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, 258 int nsegs, size_t size, void **kvap, int flags); 259 void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, 260 size_t size); 261 paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs, 262 int nsegs, off_t off, int prot, int flags); 263 #endif /* _M68K_BUS_DMA_PRIVATE */ 264 265 #endif /* _M68K_BUS_DMA_H_ */ 266
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