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cacheops_20.h revision 1.1 
      1 /*	$NetBSD: cacheops_20.h,v 1.1 1997/06/02 20:26:39 leo Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1997 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Leo Weppelman
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *        This product includes software developed by the NetBSD
     21  *        Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 /*
     40  * Invalidate entire TLB.
     41  */
     42 void TBIA_20 __P((void));
     43 extern inline void
     44 TBIA_20()
     45 {
     46 	__asm __volatile (" pflusha");
     47 }
     48 
     49 /*
     50  * Invalidate any TLB entry for given VA (TB Invalidate Single)
     51  */
     52 void TBIS_20 __P((void *));
     53 extern inline void
     54 TBIS_20(va)
     55 	void	*va;
     56 {
     57 
     58 	__asm __volatile (" pflushs	#0,#0,%0@" : : "a" (va) );
     59 }
     60 
     61 /*
     62  * Invalidate supervisor side of TLB
     63  */
     64 void TBIAS_20 __P((void));
     65 extern inline void
     66 TBIAS_20()
     67 {
     68 	__asm __volatile (" pflushs #4,#4");
     69 }
     70 
     71 /*
     72  * Invalidate user side of TLB
     73  */
     74 void TBIAU_20 __P((void));
     75 extern inline void
     76 TBIAU_20()
     77 {
     78 	__asm __volatile (" pflushs #0,#4;");
     79 }
     80 
     81 /*
     82  * Invalidate instruction cache
     83  */
     84 void ICIA_20 __P((void));
     85 extern inline void
     86 ICIA_20()
     87 {
     88 	__asm __volatile (" movc %0,cacr;" : : "d" (IC_CLEAR));
     89 }
     90 
     91 void ICPA_20 __P((void));
     92 extern inline void
     93 ICPA_20()
     94 {
     95 	__asm __volatile (" movc %0,cacr;" : : "d" (IC_CLEAR));
     96 }
     97 
     98 /*
     99  * Invalidate data cache.
    100  * NOTE: we do not flush 68030/20 on-chip cache as there are no aliasing
    101  * problems with DC_WA.  The only cases we have to worry about are context
    102  * switch and TLB changes, both of which are handled "in-line" in resume
    103  * and TBI*.
    104  */
    105 #define	DCIA_20()
    106 #define	DCIS_20()
    107 #define	DCIU_20()
    108 #define	DCIAS_20()
    109 
    110 void PCIA_20 __P((void));
    111 extern inline void
    112 PCIA_20()
    113 {
    114 	__asm __volatile (" movc %0,cacr;" : : "d" (DC_CLEAR));
    115 }
    116