1 1.15 thorpej /* $NetBSD: cacheops_60.h,v 1.15 2023/12/27 17:35:35 thorpej Exp $ */ 2 1.1 leo 3 1.1 leo /*- 4 1.1 leo * Copyright (c) 1997 The NetBSD Foundation, Inc. 5 1.1 leo * All rights reserved. 6 1.1 leo * 7 1.1 leo * This code is derived from software contributed to The NetBSD Foundation 8 1.1 leo * by Leo Weppelman 9 1.1 leo * 10 1.1 leo * Redistribution and use in source and binary forms, with or without 11 1.1 leo * modification, are permitted provided that the following conditions 12 1.1 leo * are met: 13 1.1 leo * 1. Redistributions of source code must retain the above copyright 14 1.1 leo * notice, this list of conditions and the following disclaimer. 15 1.1 leo * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 leo * notice, this list of conditions and the following disclaimer in the 17 1.1 leo * documentation and/or other materials provided with the distribution. 18 1.1 leo * 19 1.1 leo * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 leo * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 leo * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 leo * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 leo * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 leo * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 leo * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 leo * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 leo * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 leo * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 leo * POSSIBILITY OF SUCH DAMAGE. 30 1.1 leo */ 31 1.1 leo 32 1.15 thorpej #include <machine/fcode.h> 33 1.15 thorpej 34 1.1 leo /* 35 1.1 leo * Invalidate entire TLB. 36 1.1 leo */ 37 1.7 perry static __inline void __attribute__((__unused__)) 38 1.5 chs TBIA_60(void) 39 1.1 leo { 40 1.6 perry __asm volatile (" .word 0xf518" ); /* pflusha */ 41 1.1 leo } 42 1.1 leo 43 1.1 leo /* 44 1.1 leo * Invalidate any TLB entry for given VA (TB Invalidate Single) 45 1.1 leo */ 46 1.7 perry static __inline void __attribute__((__unused__)) 47 1.5 chs TBIS_60(vaddr_t va) 48 1.1 leo { 49 1.9 tsutsui register uint8_t *r_va __asm("%a0") = (void *)va; 50 1.1 leo int tmp; 51 1.1 leo 52 1.6 perry __asm volatile (" movc %1, %%dfc;" /* select supervisor */ 53 1.4 thorpej " .word 0xf508;" /* pflush %a0@ */ 54 1.1 leo " moveq %3, %1;" /* select user */ 55 1.4 thorpej " movc %1, %%dfc;" 56 1.4 thorpej " .word 0xf508;" /* pflush %a0@ */ 57 1.4 thorpej " movc %%cacr,%1;" 58 1.1 leo " orl %4,%1;" 59 1.4 thorpej " movc %1,%%cacr" : "=d" (tmp) : 60 1.1 leo "0" (FC_SUPERD), "a" (r_va), "i" (FC_USERD), 61 1.1 leo "i" (IC60_CABC)); 62 1.1 leo } 63 1.1 leo 64 1.1 leo /* 65 1.1 leo * Invalidate supervisor side of TLB 66 1.1 leo */ 67 1.7 perry static __inline void __attribute__((__unused__)) 68 1.5 chs TBIAS_60(void) 69 1.1 leo { 70 1.1 leo int tmp; 71 1.5 chs 72 1.1 leo /* 73 1.1 leo * Cannot specify supervisor/user on pflusha, so we flush all 74 1.1 leo */ 75 1.6 perry __asm volatile (" .word 0xf518;" 76 1.4 thorpej " movc %%cacr,%0;" 77 1.1 leo " orl %1,%0;" 78 1.4 thorpej " movc %0,%%cacr" /* clear all branch cache 79 1.14 tsutsui entries */ 80 1.1 leo : "=d" (tmp) : "i" (IC60_CABC) ); 81 1.1 leo } 82 1.1 leo 83 1.1 leo /* 84 1.1 leo * Invalidate user side of TLB 85 1.1 leo */ 86 1.7 perry static __inline void __attribute__((__unused__)) 87 1.5 chs TBIAU_60(void) 88 1.1 leo { 89 1.1 leo int tmp; 90 1.5 chs 91 1.1 leo /* 92 1.1 leo * Cannot specify supervisor/user on pflusha, so we flush all 93 1.1 leo */ 94 1.6 perry __asm volatile (" .word 0xf518;" 95 1.4 thorpej " movc %%cacr,%0;" 96 1.1 leo " orl %1,%0;" 97 1.4 thorpej " movc %0,%%cacr" /* clear all branch cache 98 1.14 tsutsui entries */ 99 1.1 leo : "=d" (tmp) : "i" (IC60_CUBC) ); 100 1.1 leo } 101 1.1 leo 102 1.1 leo /* 103 1.1 leo * Invalidate instruction cache 104 1.1 leo */ 105 1.7 perry static __inline void __attribute__((__unused__)) 106 1.5 chs ICIA_60(void) 107 1.1 leo { 108 1.1 leo /* inva ic (also clears branch cache) */ 109 1.6 perry __asm volatile (" .word 0xf498;"); 110 1.1 leo } 111 1.1 leo 112 1.7 perry static __inline void __attribute__((__unused__)) 113 1.5 chs ICPA_60(void) 114 1.1 leo { 115 1.1 leo /* inva ic (also clears branch cache) */ 116 1.6 perry __asm volatile (" .word 0xf498;"); 117 1.1 leo } 118 1.1 leo 119 1.1 leo /* 120 1.1 leo * Invalidate data cache. 121 1.1 leo */ 122 1.7 perry static __inline void __attribute__((__unused__)) 123 1.5 chs DCIA_60(void) 124 1.1 leo { 125 1.6 perry __asm volatile (" .word 0xf478;"); /* cpusha dc */ 126 1.1 leo } 127 1.1 leo 128 1.7 perry static __inline void __attribute__((__unused__)) 129 1.5 chs DCIS_60(void) 130 1.1 leo { 131 1.6 perry __asm volatile (" .word 0xf478;"); /* cpusha dc */ 132 1.1 leo } 133 1.1 leo 134 1.7 perry static __inline void __attribute__((__unused__)) 135 1.5 chs DCIU_60(void) 136 1.1 leo { 137 1.6 perry __asm volatile (" .word 0xf478;"); /* cpusha dc */ 138 1.1 leo } 139 1.1 leo 140 1.7 perry static __inline void __attribute__((__unused__)) 141 1.5 chs DCIAS_60(paddr_t pa) 142 1.1 leo { 143 1.9 tsutsui register uint8_t *r_pa __asm("%a0") = (void *)pa; 144 1.1 leo 145 1.6 perry __asm volatile (" .word 0xf468;" : : "a" (r_pa)); /* cpushl dc,%a0@ */ 146 1.1 leo } 147 1.1 leo 148 1.7 perry static __inline void __attribute__((__unused__)) 149 1.5 chs PCIA_60(void) 150 1.1 leo { 151 1.6 perry __asm volatile (" .word 0xf478;"); /* cpusha dc */ 152 1.1 leo } 153 1.11 he 154 1.11 he #define DCFA_60() DCFA_40() 155 1.11 he #define DCPA_60() DCPA_40() 156 1.11 he #define ICPL_60(pa) ICPL_40(pa) 157 1.11 he #define ICPP_60(pa) ICPP_40(pa) 158 1.11 he #define DCPL_60(pa) DCPL_40(pa) 159 1.11 he #define DCPP_60(pa) DCPP_40(pa) 160 1.11 he #define DCFL_60(pa) DCFL_40(pa) 161 1.11 he #define DCFP_60(pa) DCFP_40(pa) 162