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cpu.h revision 1.10
      1  1.10      agc /*	$NetBSD: cpu.h,v 1.10 2003/08/07 16:28:13 agc Exp $	*/
      2   1.1  thorpej 
      3   1.1  thorpej /*
      4   1.1  thorpej  * Copyright (c) 1982, 1990, 1993
      5   1.1  thorpej  *	The Regents of the University of California.  All rights reserved.
      6  1.10      agc  *
      7  1.10      agc  * This code is derived from software contributed to Berkeley by
      8  1.10      agc  * the Systems Programming Group of the University of Utah Computer
      9  1.10      agc  * Science Department.
     10  1.10      agc  *
     11  1.10      agc  * Redistribution and use in source and binary forms, with or without
     12  1.10      agc  * modification, are permitted provided that the following conditions
     13  1.10      agc  * are met:
     14  1.10      agc  * 1. Redistributions of source code must retain the above copyright
     15  1.10      agc  *    notice, this list of conditions and the following disclaimer.
     16  1.10      agc  * 2. Redistributions in binary form must reproduce the above copyright
     17  1.10      agc  *    notice, this list of conditions and the following disclaimer in the
     18  1.10      agc  *    documentation and/or other materials provided with the distribution.
     19  1.10      agc  * 3. Neither the name of the University nor the names of its contributors
     20  1.10      agc  *    may be used to endorse or promote products derived from this software
     21  1.10      agc  *    without specific prior written permission.
     22  1.10      agc  *
     23  1.10      agc  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     24  1.10      agc  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     25  1.10      agc  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     26  1.10      agc  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     27  1.10      agc  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     28  1.10      agc  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     29  1.10      agc  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     30  1.10      agc  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     31  1.10      agc  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     32  1.10      agc  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     33  1.10      agc  * SUCH DAMAGE.
     34  1.10      agc  *
     35  1.10      agc  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     36  1.10      agc  *
     37  1.10      agc  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     38  1.10      agc  */
     39  1.10      agc /*
     40  1.10      agc  * Copyright (c) 1988 University of Utah.
     41   1.1  thorpej  *
     42   1.1  thorpej  * This code is derived from software contributed to Berkeley by
     43   1.1  thorpej  * the Systems Programming Group of the University of Utah Computer
     44   1.1  thorpej  * Science Department.
     45   1.1  thorpej  *
     46   1.1  thorpej  * Redistribution and use in source and binary forms, with or without
     47   1.1  thorpej  * modification, are permitted provided that the following conditions
     48   1.1  thorpej  * are met:
     49   1.1  thorpej  * 1. Redistributions of source code must retain the above copyright
     50   1.1  thorpej  *    notice, this list of conditions and the following disclaimer.
     51   1.1  thorpej  * 2. Redistributions in binary form must reproduce the above copyright
     52   1.1  thorpej  *    notice, this list of conditions and the following disclaimer in the
     53   1.1  thorpej  *    documentation and/or other materials provided with the distribution.
     54   1.1  thorpej  * 3. All advertising materials mentioning features or use of this software
     55   1.1  thorpej  *    must display the following acknowledgement:
     56   1.1  thorpej  *	This product includes software developed by the University of
     57   1.1  thorpej  *	California, Berkeley and its contributors.
     58   1.1  thorpej  * 4. Neither the name of the University nor the names of its contributors
     59   1.1  thorpej  *    may be used to endorse or promote products derived from this software
     60   1.1  thorpej  *    without specific prior written permission.
     61   1.1  thorpej  *
     62   1.1  thorpej  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     63   1.1  thorpej  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     64   1.1  thorpej  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     65   1.1  thorpej  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     66   1.1  thorpej  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     67   1.1  thorpej  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     68   1.1  thorpej  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     69   1.1  thorpej  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     70   1.1  thorpej  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     71   1.1  thorpej  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     72   1.1  thorpej  * SUCH DAMAGE.
     73   1.1  thorpej  *
     74   1.1  thorpej  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     75   1.1  thorpej  *
     76   1.1  thorpej  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     77   1.1  thorpej  */
     78   1.1  thorpej 
     79   1.1  thorpej #ifndef _M68K_CPU_H_
     80   1.1  thorpej #define	_M68K_CPU_H_
     81   1.1  thorpej 
     82   1.1  thorpej /*
     83   1.1  thorpej  * Exported definitions common to Motorola m68k-based ports.
     84   1.1  thorpej  *
     85   1.1  thorpej  * Note that are some port-specific definitions here, such as
     86   1.1  thorpej  * HP and Sun MMU types.  These facilitate adding very small
     87   1.1  thorpej  * amounts of port-specific code to what would otherwise be
     88   1.1  thorpej  * identical.  The is especially true in the case of the HP
     89   1.1  thorpej  * and other m68k pmaps.
     90   1.1  thorpej  *
     91   1.1  thorpej  * Individual ports are expected to define the following CPP symbols
     92   1.1  thorpej  * in <machine/cpu.h> to enable conditional code:
     93   1.1  thorpej  *
     94   1.1  thorpej  *	M68K_MMU_MOTOROLA	Machine has a Motorola MMU (incl.
     95   1.1  thorpej  *				68851, 68030, 68040, 68060)
     96   1.1  thorpej  *
     97   1.1  thorpej  *	M68K_MMU_HP		Machine has an HP MMU.
     98   1.1  thorpej  *
     99   1.1  thorpej  * Note also that while m68k-generic code conditionalizes on the
    100   1.8      wiz  * M68K_MMU_HP CPP symbol, none of the HP MMU definitions are in this
    101   1.1  thorpej  * file (since none are used in otherwise sharable code).
    102   1.1  thorpej  */
    103   1.1  thorpej 
    104   1.1  thorpej /*
    105   1.5      gwr  * XXX  The remaining contents of this file should be split out
    106   1.5      gwr  * XXX  into separate files (like m68k.h) and then this file
    107   1.5      gwr  * XXX  should go away.  Furthermore, most of the stuff defined
    108   1.5      gwr  * XXX  here does NOT belong in <machine/cpu.h>, and the ports
    109   1.5      gwr  * XXX  using this file should remove <m68k/cpu.h> from there.
    110   1.1  thorpej  */
    111   1.1  thorpej 
    112   1.5      gwr #include <m68k/m68k.h>
    113   1.5      gwr 
    114   1.5      gwr /* XXX - Move this stuff into <m68k/mmu030.h> maybe? */
    115   1.1  thorpej 
    116   1.1  thorpej /*
    117   1.1  thorpej  * 68851 and 68030 MMU
    118   1.1  thorpej  */
    119   1.1  thorpej #define	PMMU_LVLMASK	0x0007
    120   1.1  thorpej #define	PMMU_INV	0x0400
    121   1.1  thorpej #define	PMMU_WP		0x0800
    122   1.1  thorpej #define	PMMU_ALV	0x1000
    123   1.1  thorpej #define	PMMU_SO		0x2000
    124   1.1  thorpej #define	PMMU_LV		0x4000
    125   1.1  thorpej #define	PMMU_BE		0x8000
    126   1.1  thorpej #define	PMMU_FAULT	(PMMU_WP|PMMU_INV)
    127   1.1  thorpej 
    128   1.5      gwr /* XXX - Move this stuff into <m68k/mmu040.h> maybe? */
    129   1.5      gwr 
    130   1.1  thorpej /*
    131   1.1  thorpej  * 68040 MMU
    132   1.1  thorpej  */
    133   1.1  thorpej #define	MMU40_RES	0x001
    134   1.1  thorpej #define	MMU40_TTR	0x002
    135   1.1  thorpej #define	MMU40_WP	0x004
    136   1.1  thorpej #define	MMU40_MOD	0x010
    137   1.1  thorpej #define	MMU40_CMMASK	0x060
    138   1.1  thorpej #define	MMU40_SUP	0x080
    139   1.1  thorpej #define	MMU40_U0	0x100
    140   1.1  thorpej #define	MMU40_U1	0x200
    141   1.1  thorpej #define	MMU40_GLB	0x400
    142   1.1  thorpej #define	MMU40_BE	0x800
    143   1.1  thorpej 
    144   1.5      gwr /* XXX - Move this stuff into <m68k/fcode.h> maybe? */
    145   1.5      gwr 
    146   1.1  thorpej /* 680X0 function codes */
    147   1.1  thorpej #define	FC_USERD	1	/* user data space */
    148   1.1  thorpej #define	FC_USERP	2	/* user program space */
    149   1.1  thorpej #define	FC_PURGE	3	/* HPMMU: clear TLB entries */
    150   1.1  thorpej #define	FC_SUPERD	5	/* supervisor data space */
    151   1.1  thorpej #define	FC_SUPERP	6	/* supervisor program space */
    152   1.1  thorpej #define	FC_CPU		7	/* CPU space */
    153   1.1  thorpej 
    154   1.5      gwr /* XXX - Move this stuff into <m68k/cacr.h> maybe? */
    155   1.5      gwr 
    156   1.1  thorpej /* fields in the 68020 cache control register */
    157   1.1  thorpej #define	IC_ENABLE	0x0001	/* enable instruction cache */
    158   1.1  thorpej #define	IC_FREEZE	0x0002	/* freeze instruction cache */
    159   1.1  thorpej #define	IC_CE		0x0004	/* clear instruction cache entry */
    160   1.1  thorpej #define	IC_CLR		0x0008	/* clear entire instruction cache */
    161   1.1  thorpej 
    162   1.1  thorpej /* additional fields in the 68030 cache control register */
    163   1.1  thorpej #define	IC_BE		0x0010	/* instruction burst enable */
    164   1.1  thorpej #define	DC_ENABLE	0x0100	/* data cache enable */
    165   1.1  thorpej #define	DC_FREEZE	0x0200	/* data cache freeze */
    166   1.1  thorpej #define	DC_CE		0x0400	/* clear data cache entry */
    167   1.1  thorpej #define	DC_CLR		0x0800	/* clear entire data cache */
    168   1.1  thorpej #define	DC_BE		0x1000	/* data burst enable */
    169   1.1  thorpej #define	DC_WA		0x2000	/* write allocate */
    170   1.1  thorpej 
    171   1.1  thorpej /* fields in the 68040 cache control register */
    172   1.1  thorpej #define	IC40_ENABLE	0x00008000	/* instruction cache enable bit */
    173   1.1  thorpej #define	DC40_ENABLE	0x80000000	/* data cache enable bit */
    174   1.1  thorpej 
    175   1.1  thorpej /* additional fields in the 68060 cache control register */
    176   1.1  thorpej #define	DC60_NAD	0x40000000	/* no allocate mode, data cache */
    177   1.1  thorpej #define	DC60_ESB	0x20000000	/* enable store buffer */
    178   1.1  thorpej #define	DC60_DPI	0x10000000	/* disable CPUSH invalidation */
    179   1.1  thorpej #define	DC60_FOC	0x08000000	/* four kB data cache mode (else 8) */
    180   1.1  thorpej 
    181   1.1  thorpej #define	IC60_EBC	0x00800000	/* enable branch cache */
    182   1.1  thorpej #define IC60_CABC	0x00400000	/* clear all branch cache entries */
    183   1.1  thorpej #define	IC60_CUBC	0x00200000	/* clear user branch cache entries */
    184   1.1  thorpej 
    185   1.1  thorpej #define	IC60_NAI	0x00004000	/* no allocate mode, instr. cache */
    186   1.1  thorpej #define	IC60_FIC	0x00002000	/* four kB instr. cache (else 8) */
    187   1.1  thorpej 
    188   1.1  thorpej #define	CACHE_ON	(DC_WA|DC_BE|DC_CLR|DC_ENABLE|IC_BE|IC_CLR|IC_ENABLE)
    189   1.1  thorpej #define	CACHE_OFF	(DC_CLR|IC_CLR)
    190   1.1  thorpej #define	CACHE_CLR	(CACHE_ON)
    191   1.1  thorpej #define	IC_CLEAR	(DC_WA|DC_BE|DC_ENABLE|IC_BE|IC_CLR|IC_ENABLE)
    192   1.1  thorpej #define	DC_CLEAR	(DC_WA|DC_BE|DC_CLR|DC_ENABLE|IC_BE|IC_ENABLE)
    193   1.1  thorpej 
    194   1.1  thorpej #define	CACHE40_ON	(IC40_ENABLE|DC40_ENABLE)
    195   1.1  thorpej #define	CACHE40_OFF	(0x00000000)
    196   1.1  thorpej 
    197   1.1  thorpej #define	CACHE60_ON	(CACHE40_ON|IC60_CABC|IC60_EBC|DC60_ESB)
    198   1.1  thorpej #define	CACHE60_OFF	(CACHE40_OFF|IC60_CABC)
    199   1.6      scw 
    200   1.6      scw #ifdef _KERNEL
    201   1.6      scw /*
    202   1.6      scw  * From m68k/syscall.c
    203   1.6      scw  */
    204   1.6      scw /* extern void syscall(register_t, struct frame); Only called from locore.s */
    205   1.9  thorpej 
    206   1.9  thorpej #define LWP_PC(l)	(((struct trapframe *)((l)->l_md.md_regs))->tf_pc)
    207   1.6      scw #endif /* _KERNEL */
    208   1.1  thorpej 
    209   1.1  thorpej #endif /* _M68K_CPU_H_ */
    210