cpu.h revision 1.10
1 /* $NetBSD: cpu.h,v 1.10 2003/08/07 16:28:13 agc Exp $ */ 2 3 /* 4 * Copyright (c) 1982, 1990, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * the Systems Programming Group of the University of Utah Computer 9 * Science Department. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * from: Utah $Hdr: cpu.h 1.16 91/03/25$ 36 * 37 * @(#)cpu.h 8.4 (Berkeley) 1/5/94 38 */ 39 /* 40 * Copyright (c) 1988 University of Utah. 41 * 42 * This code is derived from software contributed to Berkeley by 43 * the Systems Programming Group of the University of Utah Computer 44 * Science Department. 45 * 46 * Redistribution and use in source and binary forms, with or without 47 * modification, are permitted provided that the following conditions 48 * are met: 49 * 1. Redistributions of source code must retain the above copyright 50 * notice, this list of conditions and the following disclaimer. 51 * 2. Redistributions in binary form must reproduce the above copyright 52 * notice, this list of conditions and the following disclaimer in the 53 * documentation and/or other materials provided with the distribution. 54 * 3. All advertising materials mentioning features or use of this software 55 * must display the following acknowledgement: 56 * This product includes software developed by the University of 57 * California, Berkeley and its contributors. 58 * 4. Neither the name of the University nor the names of its contributors 59 * may be used to endorse or promote products derived from this software 60 * without specific prior written permission. 61 * 62 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 63 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 64 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 65 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 66 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 67 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 68 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 69 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 70 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 71 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 72 * SUCH DAMAGE. 73 * 74 * from: Utah $Hdr: cpu.h 1.16 91/03/25$ 75 * 76 * @(#)cpu.h 8.4 (Berkeley) 1/5/94 77 */ 78 79 #ifndef _M68K_CPU_H_ 80 #define _M68K_CPU_H_ 81 82 /* 83 * Exported definitions common to Motorola m68k-based ports. 84 * 85 * Note that are some port-specific definitions here, such as 86 * HP and Sun MMU types. These facilitate adding very small 87 * amounts of port-specific code to what would otherwise be 88 * identical. The is especially true in the case of the HP 89 * and other m68k pmaps. 90 * 91 * Individual ports are expected to define the following CPP symbols 92 * in <machine/cpu.h> to enable conditional code: 93 * 94 * M68K_MMU_MOTOROLA Machine has a Motorola MMU (incl. 95 * 68851, 68030, 68040, 68060) 96 * 97 * M68K_MMU_HP Machine has an HP MMU. 98 * 99 * Note also that while m68k-generic code conditionalizes on the 100 * M68K_MMU_HP CPP symbol, none of the HP MMU definitions are in this 101 * file (since none are used in otherwise sharable code). 102 */ 103 104 /* 105 * XXX The remaining contents of this file should be split out 106 * XXX into separate files (like m68k.h) and then this file 107 * XXX should go away. Furthermore, most of the stuff defined 108 * XXX here does NOT belong in <machine/cpu.h>, and the ports 109 * XXX using this file should remove <m68k/cpu.h> from there. 110 */ 111 112 #include <m68k/m68k.h> 113 114 /* XXX - Move this stuff into <m68k/mmu030.h> maybe? */ 115 116 /* 117 * 68851 and 68030 MMU 118 */ 119 #define PMMU_LVLMASK 0x0007 120 #define PMMU_INV 0x0400 121 #define PMMU_WP 0x0800 122 #define PMMU_ALV 0x1000 123 #define PMMU_SO 0x2000 124 #define PMMU_LV 0x4000 125 #define PMMU_BE 0x8000 126 #define PMMU_FAULT (PMMU_WP|PMMU_INV) 127 128 /* XXX - Move this stuff into <m68k/mmu040.h> maybe? */ 129 130 /* 131 * 68040 MMU 132 */ 133 #define MMU40_RES 0x001 134 #define MMU40_TTR 0x002 135 #define MMU40_WP 0x004 136 #define MMU40_MOD 0x010 137 #define MMU40_CMMASK 0x060 138 #define MMU40_SUP 0x080 139 #define MMU40_U0 0x100 140 #define MMU40_U1 0x200 141 #define MMU40_GLB 0x400 142 #define MMU40_BE 0x800 143 144 /* XXX - Move this stuff into <m68k/fcode.h> maybe? */ 145 146 /* 680X0 function codes */ 147 #define FC_USERD 1 /* user data space */ 148 #define FC_USERP 2 /* user program space */ 149 #define FC_PURGE 3 /* HPMMU: clear TLB entries */ 150 #define FC_SUPERD 5 /* supervisor data space */ 151 #define FC_SUPERP 6 /* supervisor program space */ 152 #define FC_CPU 7 /* CPU space */ 153 154 /* XXX - Move this stuff into <m68k/cacr.h> maybe? */ 155 156 /* fields in the 68020 cache control register */ 157 #define IC_ENABLE 0x0001 /* enable instruction cache */ 158 #define IC_FREEZE 0x0002 /* freeze instruction cache */ 159 #define IC_CE 0x0004 /* clear instruction cache entry */ 160 #define IC_CLR 0x0008 /* clear entire instruction cache */ 161 162 /* additional fields in the 68030 cache control register */ 163 #define IC_BE 0x0010 /* instruction burst enable */ 164 #define DC_ENABLE 0x0100 /* data cache enable */ 165 #define DC_FREEZE 0x0200 /* data cache freeze */ 166 #define DC_CE 0x0400 /* clear data cache entry */ 167 #define DC_CLR 0x0800 /* clear entire data cache */ 168 #define DC_BE 0x1000 /* data burst enable */ 169 #define DC_WA 0x2000 /* write allocate */ 170 171 /* fields in the 68040 cache control register */ 172 #define IC40_ENABLE 0x00008000 /* instruction cache enable bit */ 173 #define DC40_ENABLE 0x80000000 /* data cache enable bit */ 174 175 /* additional fields in the 68060 cache control register */ 176 #define DC60_NAD 0x40000000 /* no allocate mode, data cache */ 177 #define DC60_ESB 0x20000000 /* enable store buffer */ 178 #define DC60_DPI 0x10000000 /* disable CPUSH invalidation */ 179 #define DC60_FOC 0x08000000 /* four kB data cache mode (else 8) */ 180 181 #define IC60_EBC 0x00800000 /* enable branch cache */ 182 #define IC60_CABC 0x00400000 /* clear all branch cache entries */ 183 #define IC60_CUBC 0x00200000 /* clear user branch cache entries */ 184 185 #define IC60_NAI 0x00004000 /* no allocate mode, instr. cache */ 186 #define IC60_FIC 0x00002000 /* four kB instr. cache (else 8) */ 187 188 #define CACHE_ON (DC_WA|DC_BE|DC_CLR|DC_ENABLE|IC_BE|IC_CLR|IC_ENABLE) 189 #define CACHE_OFF (DC_CLR|IC_CLR) 190 #define CACHE_CLR (CACHE_ON) 191 #define IC_CLEAR (DC_WA|DC_BE|DC_ENABLE|IC_BE|IC_CLR|IC_ENABLE) 192 #define DC_CLEAR (DC_WA|DC_BE|DC_CLR|DC_ENABLE|IC_BE|IC_ENABLE) 193 194 #define CACHE40_ON (IC40_ENABLE|DC40_ENABLE) 195 #define CACHE40_OFF (0x00000000) 196 197 #define CACHE60_ON (CACHE40_ON|IC60_CABC|IC60_EBC|DC60_ESB) 198 #define CACHE60_OFF (CACHE40_OFF|IC60_CABC) 199 200 #ifdef _KERNEL 201 /* 202 * From m68k/syscall.c 203 */ 204 /* extern void syscall(register_t, struct frame); Only called from locore.s */ 205 206 #define LWP_PC(l) (((struct trapframe *)((l)->l_md.md_regs))->tf_pc) 207 #endif /* _KERNEL */ 208 209 #endif /* _M68K_CPU_H_ */ 210
Indexes created Thu Sep 25 16:09:42 GMT 2025