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intr.h revision 1.1
      1 /*	$NetBSD: intr.h,v 1.1 2024/01/14 22:32:32 thorpej Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2023, 2024 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _M68k_INTR_H_
     33 #define	_M68k_INTR_H_
     34 
     35 #include <sys/types.h>
     36 #include <machine/psl.h>
     37 
     38 /*
     39  * Logical interrupt priority levels -- these are distinct from
     40  * the hardware interrupt priority levels of the m68k.
     41  */
     42 #define	IPL_NONE	0
     43 #define	IPL_SOFTCLOCK	1	/* clock software interrupts */
     44 #define	IPL_SOFTBIO	2	/* block device software interrupts */
     45 #define	IPL_SOFTNET	3	/* network software interrupts */
     46 #define	IPL_SOFTSERIAL	4	/* serial device software interrupts */
     47 #define	IPL_VM		5	/* all interrupts that can allocate memory */
     48 #define	IPL_SCHED	6	/* scheduler / hard clock interrupts */
     49 #define	IPL_HIGH	7	/* blocks all interrupts */
     50 #define	NIPL		8
     51 
     52 #if defined(_KERNEL) || defined(_KMEMUSER)
     53 typedef struct {
     54 	uint16_t _psl;		/* physical manifestation of logical IPL_* */
     55 } ipl_cookie_t;
     56 #endif
     57 
     58 #ifdef _KERNEL
     59 extern int idepth;		/* interrupt depth */
     60 extern const uint16_t ipl2psl_table[NIPL];
     61 
     62 typedef int ipl_t;		/* logical IPL_* value */
     63 
     64 static inline bool
     65 cpu_intr_p(void)
     66 {
     67 	return idepth != 0;
     68 }
     69 
     70 static inline ipl_cookie_t
     71 makeiplcookie(ipl_t ipl)
     72 {
     73 	return (ipl_cookie_t){._psl = ipl2psl_table[ipl]};
     74 }
     75 
     76 static inline int
     77 splraiseipl(ipl_cookie_t icookie)
     78 {
     79 	return _splraise(icookie._psl);
     80 }
     81 
     82 /*
     83  * These are essentially constant equivalents of what's in
     84  * ipl2psl_table[] to avoid the memory reference.
     85  */
     86 #define	splsoftclock()	_splraise(PSL_S | MACHINE_PSL_IPL_SOFTCLOCK)
     87 #define	splsoftbio()	_splraise(PSL_S | MACHINE_PSL_IPL_SOFTBIO)
     88 #define	splsoftnet()	_splraise(PSL_S | MACHINE_PSL_IPL_SOFTNET)
     89 #define	splsoftserial()	_splraise(PSL_S | MACHINE_PSL_IPL_SOFTSERIAL)
     90 #define	splvm()		_splraise(PSL_S | MACHINE_PSL_IPL_VM)
     91 #define	splsched()	_splraise(PSL_S | MACHINE_PSL_IPL_SCHED)
     92 #define	splhigh()	spl7()
     93 
     94 /*
     95  * XXX TODO: Support for hardware-assisted soft interrupts (sun68k)
     96  * XXX and fast-soft-interrupts (others).
     97  */
     98 #define	spl0()		_spl0()
     99 #define	splx(s)		_splx(s)
    100 
    101 #ifdef _M68K_INTR_PRIVATE
    102 #include <sys/queue.h>
    103 
    104 struct m68k_intrhand {
    105 	LIST_ENTRY(m68k_intrhand)	ih_link;
    106 	int				(*ih_func)(void *);
    107 	void				*ih_arg;
    108 	struct evcnt			*ih_evcnt;
    109 	int				ih_ipl;	/* m68k IPL, not IPL_* */
    110 	int				ih_vec;
    111 };
    112 LIST_HEAD(m68k_intrhand_list, m68k_intrhand);
    113 
    114 struct m68k_ih_allocfuncs {
    115 	struct m68k_intrhand *	(*alloc)(int km_flag);
    116 	void			(*free)(struct m68k_intrhand *);
    117 };
    118 #else
    119 struct m68k_ih_allocfuncs;
    120 #endif /* _M68K_INTR_PRIVATE */
    121 
    122 struct evcnt;
    123 
    124 /*
    125  * Common m68k interrupt dispatch:
    126  *
    127  * ==> m68k_intr_init(const struct m68k_ih_allocfuncs *allocfuncs)
    128  *
    129  * Initialize the interrupt system.  If the platform needs to store
    130  * additional information in the interrupt handle, then it can provide
    131  * its own alloc/free routines.  Otherwise, pass NULL to get the default.
    132  * If a platform doesn't want the special allocator behavior, calling
    133  * this function is optional; it will be done for you on the first call
    134  * to m68k_intr_establish().
    135  *
    136  * ==> m68k_intr_establish(int (*func)(void *), void *arg,
    137  *         struct evcnt *ev, int vec, int ipl, int flags)
    138  *
    139  * Establish an interrupt handler.  If vec is 0, then the handler is
    140  * registered in the auto-vector list corresponding to the specified
    141  * m68k interrupt priroity level (this is NOT an IPL_* value).  Otherwise.
    142  * the handler is registered at the specified vector.
    143  *
    144  * Vectored interrupts are not sharable.  The interrupt vector must be
    145  * within the platform's "user vector" region, which is generally defined
    146  * as vectors 64-255, although some platforms may use vectors that start
    147  * below 64 (in which case, that platform must define MACHINE_USERVEC_START
    148  * to override the default).
    149  *
    150  * Vectored interrupt support is not included by default in order to reduce
    151  * the memory footprint.  If a platform wishes to enable vectored interrupts,
    152  * then it should define __HAVE_M68K_INTR_VECTORED in its <machine/types.h>
    153  * and genassym.cf.
    154  *
    155  * ==> m68k_intr_disestablish(void *ih)
    156  *
    157  * Removes a previously-established interrupt handler.  Returns true
    158  * if there are no more handlers on the list that handler was on.  This
    159  * information can be used to e.g. disable interrupts on a PIC.
    160  */
    161 void	m68k_intr_init(const struct m68k_ih_allocfuncs *);
    162 void	*m68k_intr_establish(int (*)(void *), void *, struct evcnt *,
    163 	    int/*vec*/, int/*m68k ipl*/, int/*isrpri*/, int/*flags*/);
    164 bool	m68k_intr_disestablish(void *);
    165 
    166 #endif /* _KERNEL */
    167 
    168 #endif /* _M68k_INTR_H_ */
    169