intr.h revision 1.4
1 /* $NetBSD: intr.h,v 1.4 2024/01/15 18:47:03 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2023, 2024 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _M68k_INTR_H_ 33 #define _M68k_INTR_H_ 34 35 #include <sys/types.h> 36 #include <machine/psl.h> 37 38 /* 39 * Logical interrupt priority levels -- these are distinct from 40 * the hardware interrupt priority levels of the m68k. 41 */ 42 #define IPL_NONE 0 43 #define IPL_SOFTCLOCK 1 /* clock software interrupts */ 44 #define IPL_SOFTBIO 2 /* block device software interrupts */ 45 #define IPL_SOFTNET 3 /* network software interrupts */ 46 #define IPL_SOFTSERIAL 4 /* serial device software interrupts */ 47 #define IPL_VM 5 /* all interrupts that can allocate memory */ 48 #define IPL_SCHED 6 /* scheduler / hard clock interrupts */ 49 #define IPL_HIGH 7 /* blocks all interrupts */ 50 #define NIPL 8 51 52 /* 53 * Abstract ISR priorities. These allow sorting of latency-sensitive 54 * devices earlier on the shared auto-vectored interrupt lists. 55 */ 56 #define ISRPRI_BIO 0 /* a block I/O device */ 57 #define ISRPRI_MISC 0 /* misc. devices */ 58 #define ISRPRI_NET 1 /* a network interface */ 59 #define ISRPRI_TTY 2 /* a serial port */ 60 #define ISRPRI_DISPLAY 2 /* display devices / framebuffers */ 61 #define ISRPRI_TTYNOBUF 3 /* a particularly bad serial port */ 62 #define ISRPRI_AUDIO 4 /* audio devices */ 63 64 #if defined(_KERNEL) || defined(_KMEMUSER) 65 typedef struct { 66 uint16_t _psl; /* physical manifestation of logical IPL_* */ 67 } ipl_cookie_t; 68 #endif 69 70 #ifdef _KERNEL 71 extern int idepth; /* interrupt depth */ 72 extern const uint16_t ipl2psl_table[NIPL]; 73 74 typedef int ipl_t; /* logical IPL_* value */ 75 76 static inline bool 77 cpu_intr_p(void) 78 { 79 return idepth != 0; 80 } 81 82 static inline ipl_cookie_t 83 makeiplcookie(ipl_t ipl) 84 { 85 return (ipl_cookie_t){._psl = ipl2psl_table[ipl]}; 86 } 87 88 static inline int 89 splraiseipl(ipl_cookie_t icookie) 90 { 91 return _splraise(icookie._psl); 92 } 93 94 /* 95 * These are essentially constant equivalents of what's in 96 * ipl2psl_table[] to avoid the memory reference. 97 */ 98 #define splsoftclock() _splraise(PSL_S | MACHINE_PSL_IPL_SOFTCLOCK) 99 #define splsoftbio() _splraise(PSL_S | MACHINE_PSL_IPL_SOFTBIO) 100 #define splsoftnet() _splraise(PSL_S | MACHINE_PSL_IPL_SOFTNET) 101 #define splsoftserial() _splraise(PSL_S | MACHINE_PSL_IPL_SOFTSERIAL) 102 #define splvm() _splraise(PSL_S | MACHINE_PSL_IPL_VM) 103 #define splsched() _splraise(PSL_S | MACHINE_PSL_IPL_SCHED) 104 #define splhigh() spl7() 105 106 /* 107 * XXX TODO: Support for hardware-assisted soft interrupts (sun68k) 108 * XXX and fast-soft-interrupts (others). 109 */ 110 #define spl0() _spl0() 111 #define splx(s) _splx(s) 112 113 #ifdef _M68K_INTR_PRIVATE 114 #include <sys/queue.h> 115 116 struct m68k_intrhand { 117 LIST_ENTRY(m68k_intrhand) ih_link; 118 int (*ih_func)(void *); 119 void *ih_arg; 120 struct evcnt *ih_evcnt; 121 int ih_ipl; /* m68k IPL, not IPL_* */ 122 int ih_vec; 123 int ih_isrpri; 124 }; 125 LIST_HEAD(m68k_intrhand_list, m68k_intrhand); 126 127 struct m68k_ih_allocfuncs { 128 struct m68k_intrhand * (*alloc)(int km_flag); 129 void (*free)(struct m68k_intrhand *); 130 }; 131 #else 132 struct m68k_ih_allocfuncs; 133 #endif /* _M68K_INTR_PRIVATE */ 134 135 #include <sys/evcnt.h> 136 137 #ifdef __HAVE_LEGACY_INTRCNT 138 #define m68k_count_intr(x) \ 139 do { \ 140 extern u_int intrcnt[]; \ 141 intrcnt[(x)]++; \ 142 curcpu()->ci_data.cpu_nintr++; \ 143 } while (/*CONSTCOND*/0) 144 #else 145 /* 146 * This is exposed here so that platform-specific interrupt handlers 147 * can access it. 148 */ 149 extern struct evcnt m68k_intr_evcnt[]; 150 151 #define m68k_count_intr(x) \ 152 do { \ 153 /* 32-bit counter should be sufficient for m68k. */ \ 154 m68k_intr_evcnt[(x)].ev_count32++; \ 155 curcpu()->ci_data.cpu_nintr++; \ 156 } while (/*CONSTCOND*/0) 157 #endif /* __HAVE_LEGACY_INTRCNT */ 158 159 /* 160 * Common m68k interrupt dispatch: 161 * 162 * ==> m68k_intr_init(const struct m68k_ih_allocfuncs *allocfuncs) 163 * 164 * Initialize the interrupt system. If the platform needs to store 165 * additional information in the interrupt handle, then it can provide 166 * its own alloc/free routines. Otherwise, pass NULL to get the default. 167 * If a platform doesn't want the special allocator behavior, calling 168 * this function is optional; it will be done for you on the first call 169 * to m68k_intr_establish(). 170 * 171 * ==> m68k_intr_establish(int (*func)(void *), void *arg, 172 * struct evcnt *ev, int vec, int ipl, int flags) 173 * 174 * Establish an interrupt handler. If vec is 0, then the handler is 175 * registered in the auto-vector list corresponding to the specified 176 * m68k interrupt priroity level (this is NOT an IPL_* value). Otherwise. 177 * the handler is registered at the specified vector. 178 * 179 * Vectored interrupts are not sharable. The interrupt vector must be 180 * within the platform's "user vector" region, which is generally defined 181 * as vectors 64-255, although some platforms may use vectors that start 182 * below 64 (in which case, that platform must define MACHINE_USERVEC_START 183 * to override the default). 184 * 185 * Vectored interrupt support is not included by default in order to reduce 186 * the memory footprint. If a platform wishes to enable vectored interrupts, 187 * then it should define __HAVE_M68K_INTR_VECTORED in its <machine/types.h> 188 * and genassym.cf. 189 * 190 * ==> m68k_intr_disestablish(void *ih) 191 * 192 * Removes a previously-established interrupt handler. Returns true 193 * if there are no more handlers on the list that handler was on. This 194 * information can be used to e.g. disable interrupts on a PIC. 195 */ 196 void m68k_intr_init(const struct m68k_ih_allocfuncs *); 197 void *m68k_intr_establish(int (*)(void *), void *, struct evcnt *, 198 int/*vec*/, int/*m68k ipl*/, int/*isrpri*/, int/*flags*/); 199 bool m68k_intr_disestablish(void *); 200 201 #endif /* _KERNEL */ 202 203 #endif /* _M68k_INTR_H_ */ 204
Indexes created Tue Sep 23 07:09:52 GMT 2025