pmap_motorola.h revision 1.26 1 1.26 tsutsui /* $NetBSD: pmap_motorola.h,v 1.26 2009/12/11 17:53:22 tsutsui Exp $ */
2 1.1 chs
3 1.1 chs /*
4 1.1 chs * Copyright (c) 1991, 1993
5 1.1 chs * The Regents of the University of California. All rights reserved.
6 1.4 agc *
7 1.4 agc * This code is derived from software contributed to Berkeley by
8 1.4 agc * the Systems Programming Group of the University of Utah Computer
9 1.4 agc * Science Department.
10 1.4 agc *
11 1.4 agc * Redistribution and use in source and binary forms, with or without
12 1.4 agc * modification, are permitted provided that the following conditions
13 1.4 agc * are met:
14 1.4 agc * 1. Redistributions of source code must retain the above copyright
15 1.4 agc * notice, this list of conditions and the following disclaimer.
16 1.4 agc * 2. Redistributions in binary form must reproduce the above copyright
17 1.4 agc * notice, this list of conditions and the following disclaimer in the
18 1.4 agc * documentation and/or other materials provided with the distribution.
19 1.4 agc * 3. Neither the name of the University nor the names of its contributors
20 1.4 agc * may be used to endorse or promote products derived from this software
21 1.4 agc * without specific prior written permission.
22 1.4 agc *
23 1.4 agc * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24 1.4 agc * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 1.4 agc * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 1.4 agc * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27 1.4 agc * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 1.4 agc * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 1.4 agc * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 1.4 agc * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 1.4 agc * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 1.4 agc * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 1.4 agc * SUCH DAMAGE.
34 1.4 agc *
35 1.4 agc * @(#)pmap.h 8.1 (Berkeley) 6/10/93
36 1.4 agc */
37 1.4 agc
38 1.4 agc /*
39 1.4 agc * Copyright (c) 1987 Carnegie-Mellon University
40 1.1 chs *
41 1.1 chs * This code is derived from software contributed to Berkeley by
42 1.1 chs * the Systems Programming Group of the University of Utah Computer
43 1.1 chs * Science Department.
44 1.1 chs *
45 1.1 chs * Redistribution and use in source and binary forms, with or without
46 1.1 chs * modification, are permitted provided that the following conditions
47 1.1 chs * are met:
48 1.1 chs * 1. Redistributions of source code must retain the above copyright
49 1.1 chs * notice, this list of conditions and the following disclaimer.
50 1.1 chs * 2. Redistributions in binary form must reproduce the above copyright
51 1.1 chs * notice, this list of conditions and the following disclaimer in the
52 1.1 chs * documentation and/or other materials provided with the distribution.
53 1.1 chs * 3. All advertising materials mentioning features or use of this software
54 1.1 chs * must display the following acknowledgement:
55 1.1 chs * This product includes software developed by the University of
56 1.1 chs * California, Berkeley and its contributors.
57 1.1 chs * 4. Neither the name of the University nor the names of its contributors
58 1.1 chs * may be used to endorse or promote products derived from this software
59 1.1 chs * without specific prior written permission.
60 1.1 chs *
61 1.1 chs * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
62 1.1 chs * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
63 1.1 chs * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
64 1.1 chs * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
65 1.1 chs * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
66 1.1 chs * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
67 1.1 chs * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
68 1.1 chs * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
69 1.1 chs * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
70 1.1 chs * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
71 1.1 chs * SUCH DAMAGE.
72 1.1 chs *
73 1.1 chs * @(#)pmap.h 8.1 (Berkeley) 6/10/93
74 1.1 chs */
75 1.1 chs
76 1.1 chs #ifndef _M68K_PMAP_MOTOROLA_H_
77 1.1 chs #define _M68K_PMAP_MOTOROLA_H_
78 1.1 chs
79 1.16 dsl #include <sys/simplelock.h>
80 1.1 chs #include <machine/cpu.h>
81 1.1 chs #include <machine/pte.h>
82 1.1 chs
83 1.1 chs /*
84 1.1 chs * Pmap stuff
85 1.1 chs */
86 1.1 chs struct pmap {
87 1.1 chs pt_entry_t *pm_ptab; /* KVA of page table */
88 1.1 chs st_entry_t *pm_stab; /* KVA of segment table */
89 1.23 tsutsui u_int pm_stfree; /* 040: free lev2 blocks */
90 1.1 chs st_entry_t *pm_stpa; /* 040: ST phys addr */
91 1.1 chs uint16_t pm_sref; /* segment table ref count */
92 1.1 chs uint16_t pm_count; /* pmap reference count */
93 1.1 chs struct simplelock pm_lock; /* lock on pmap */
94 1.1 chs struct pmap_statistics pm_stats; /* pmap statistics */
95 1.1 chs int pm_ptpages; /* more stats: PT pages */
96 1.1 chs };
97 1.1 chs
98 1.1 chs /*
99 1.26 tsutsui * MMU specific segment values
100 1.26 tsutsui *
101 1.26 tsutsui * We are using following segment layout in m68k pmap_motorola.c:
102 1.26 tsutsui * 68020/030 4KB/page: l1,l2,page == 10,10,12 (%tc = 0x82c0aa00)
103 1.26 tsutsui * 68020/030 8KB/page: l1,l2,page == 8,11,13 (%tc = 0x82d08b00)
104 1.26 tsutsui * 68040/060 4KB/page: l1,l2,l3,page == 7,7,6,12
105 1.26 tsutsui * 68040/060 8KB/page: l1,l2,l3,page == 7,7,5,13
106 1.26 tsutsui *
107 1.26 tsutsui * 68020/030 l2 size is chosen per NPTEPG, a number of page table entries
108 1.26 tsutsui * per page, to use one whole page for PTEs per one segment table entry,
109 1.26 tsutsui * and maybe also because 68020 HP MMU machines use simlar structures.
110 1.26 tsutsui *
111 1.26 tsutsui * 68040/060 layout is defined by hardware design and not configurable,
112 1.26 tsutsui * as defined in <m68k/pte_motorola.h>.
113 1.26 tsutsui *
114 1.26 tsutsui * Even on 68040/060, we still appropriate 2-level ste-pte pmap structures
115 1.26 tsutsui * for 68020/030 (derived from 4.4BSD/hp300) to handle 040's 3-level MMU.
116 1.26 tsutsui * TIA_SIZE and TIB_SIZE are used to represent such pmap structures and
117 1.26 tsutsui * they are also refered on 040/060.
118 1.26 tsutsui *
119 1.26 tsutsui * NBSEG and SEGOFSET are used to check l2 STE of the specified VA,
120 1.26 tsutsui * so they have different values between 020/030 and 040/060.
121 1.26 tsutsui */
122 1.26 tsutsui /* 8KB / 4KB */
123 1.26 tsutsui #define TIB_SHIFT (PG_SHIFT - 2) /* 11 / 10 */
124 1.26 tsutsui #define TIB_SIZE (1U << TIB_SHIFT) /* 2048 / 1024 */
125 1.26 tsutsui #define TIA_SHIFT (32 - TIB_SHIFT - PG_SHIFT) /* 8 / 10 */
126 1.26 tsutsui #define TIA_SIZE (1U << TIA_SHIFT) /* 256 / 1024 */
127 1.26 tsutsui
128 1.26 tsutsui #define SEGSHIFT (TIB_SHIFT + PG_SHIFT) /* 24 / 22 */
129 1.26 tsutsui
130 1.26 tsutsui #define NBSEG30 (1U << SEGSHIFT)
131 1.26 tsutsui #define NBSEG40 (1U << SG4_SHIFT2)
132 1.26 tsutsui
133 1.26 tsutsui #if ( defined(M68020) || defined(M68030)) && \
134 1.26 tsutsui (!defined(M68040) && !defined(M68060))
135 1.26 tsutsui #define NBSEG NBSEG30
136 1.26 tsutsui #elif ( defined(M68040) || defined(M68060)) && \
137 1.26 tsutsui (!defined(M68020) && !defined(M68030))
138 1.26 tsutsui #define NBSEG NBSEG40
139 1.26 tsutsui #else
140 1.26 tsutsui #define NBSEG ((mmutype == MMU_68040) ? NBSEG40 : NBSEG30)
141 1.26 tsutsui #endif
142 1.26 tsutsui
143 1.26 tsutsui #define SEGOFSET (NBSEG - 1) /* byte offset into segment */
144 1.26 tsutsui
145 1.26 tsutsui #define m68k_round_seg(x) ((((vaddr_t)(x)) + SEGOFSET) & ~SEGOFSET)
146 1.26 tsutsui #define m68k_trunc_seg(x) ((vaddr_t)(x) & ~SEGOFSET)
147 1.26 tsutsui #define m68k_seg_offset(x) ((vaddr_t)(x) & SEGOFSET)
148 1.26 tsutsui
149 1.26 tsutsui /*
150 1.1 chs * On the 040, we keep track of which level 2 blocks are already in use
151 1.1 chs * with the pm_stfree mask. Bits are arranged from LSB (block 0) to MSB
152 1.1 chs * (block 31). For convenience, the level 1 table is considered to be
153 1.1 chs * block 0.
154 1.1 chs *
155 1.1 chs * MAX[KU]L2SIZE control how many pages of level 2 descriptors are allowed.
156 1.1 chs * for the kernel and users. 8 implies only the initial "segment table"
157 1.1 chs * page is used. WARNING: don't change MAXUL2SIZE unless you can allocate
158 1.1 chs * physically contiguous pages for the ST in pmap.c!
159 1.1 chs */
160 1.1 chs #define MAXKL2SIZE 32
161 1.13 mhitch #if PAGE_SIZE == 8192
162 1.13 mhitch #define MAXUL2SIZE 16
163 1.13 mhitch #else
164 1.1 chs #define MAXUL2SIZE 8
165 1.13 mhitch #endif
166 1.1 chs #define l2tobm(n) (1 << (n))
167 1.1 chs #define bmtol2(n) (ffs(n) - 1)
168 1.1 chs
169 1.1 chs /*
170 1.1 chs * Macros for speed
171 1.1 chs */
172 1.1 chs #define PMAP_ACTIVATE(pmap, loadhw) \
173 1.1 chs { \
174 1.1 chs if ((loadhw)) \
175 1.1 chs loadustp(m68k_btop((paddr_t)(pmap)->pm_stpa)); \
176 1.1 chs }
177 1.1 chs
178 1.1 chs /*
179 1.1 chs * For each struct vm_page, there is a list of all currently valid virtual
180 1.1 chs * mappings of that page. An entry is a pv_entry, the list is pv_table.
181 1.1 chs */
182 1.1 chs struct pv_entry {
183 1.1 chs struct pv_entry *pv_next; /* next pv_entry */
184 1.1 chs struct pmap *pv_pmap; /* pmap where mapping lies */
185 1.1 chs vaddr_t pv_va; /* virtual address for mapping */
186 1.1 chs st_entry_t *pv_ptste; /* non-zero if VA maps a PT page */
187 1.1 chs struct pmap *pv_ptpmap; /* if pv_ptste, pmap for PT page */
188 1.1 chs };
189 1.1 chs
190 1.1 chs struct pv_page;
191 1.1 chs
192 1.1 chs struct pv_page_info {
193 1.1 chs TAILQ_ENTRY(pv_page) pgi_list;
194 1.1 chs struct pv_entry *pgi_freelist;
195 1.1 chs int pgi_nfree;
196 1.1 chs };
197 1.1 chs
198 1.1 chs /*
199 1.1 chs * This is basically:
200 1.3 thorpej * ((PAGE_SIZE - sizeof(struct pv_page_info)) / sizeof(struct pv_entry))
201 1.1 chs */
202 1.13 mhitch #if PAGE_SIZE == 8192
203 1.13 mhitch #define NPVPPG 340
204 1.13 mhitch #else
205 1.1 chs #define NPVPPG 170
206 1.13 mhitch #endif
207 1.1 chs
208 1.1 chs struct pv_page {
209 1.1 chs struct pv_page_info pvp_pgi;
210 1.1 chs struct pv_entry pvp_pv[NPVPPG];
211 1.1 chs };
212 1.1 chs
213 1.1 chs #define active_pmap(pm) \
214 1.1 chs ((pm) == pmap_kernel() || (pm) == curproc->p_vmspace->vm_map.pmap)
215 1.1 chs #define active_user_pmap(pm) \
216 1.1 chs (curproc && \
217 1.1 chs (pm) != pmap_kernel() && (pm) == curproc->p_vmspace->vm_map.pmap)
218 1.1 chs
219 1.21 thorpej extern struct pv_header *pv_table; /* array of entries, one per page */
220 1.1 chs
221 1.1 chs #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count)
222 1.1 chs #define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count)
223 1.1 chs
224 1.1 chs #define pmap_update(pmap) /* nothing (yet) */
225 1.1 chs
226 1.10 perry static __inline void
227 1.1 chs pmap_remove_all(struct pmap *pmap)
228 1.1 chs {
229 1.1 chs /* Nothing. */
230 1.1 chs }
231 1.1 chs
232 1.24 tsutsui extern paddr_t Sysseg_pa;
233 1.20 tsutsui extern st_entry_t *Sysseg;
234 1.20 tsutsui extern pt_entry_t *Sysmap, *Sysptmap;
235 1.20 tsutsui extern vsize_t Sysptsize;
236 1.20 tsutsui extern vsize_t mem_size;
237 1.20 tsutsui extern vaddr_t virtual_avail, virtual_end;
238 1.20 tsutsui extern u_int protection_codes[];
239 1.24 tsutsui #if defined(M68040) || defined(M68060)
240 1.24 tsutsui extern u_int protostfree;
241 1.24 tsutsui #endif
242 1.20 tsutsui
243 1.1 chs extern char *vmmap; /* map for mem, dumps, etc. */
244 1.11 tsutsui extern void *CADDR1, *CADDR2;
245 1.12 tsutsui extern void *msgbufaddr;
246 1.1 chs
247 1.22 tsutsui /* for lwp0 uarea initialization after MMU enabled */
248 1.22 tsutsui extern vaddr_t lwp0uarea;
249 1.22 tsutsui void pmap_bootstrap_finalize(void);
250 1.22 tsutsui
251 1.5 thorpej vaddr_t pmap_map(vaddr_t, paddr_t, paddr_t, int);
252 1.5 thorpej void pmap_procwr(struct proc *, vaddr_t, size_t);
253 1.1 chs #define PMAP_NEED_PROCWR
254 1.1 chs
255 1.1 chs #ifdef CACHE_HAVE_VAC
256 1.5 thorpej void pmap_prefer(vaddr_t, vaddr_t *);
257 1.6 atatat #define PMAP_PREFER(foff, vap, sz, td) pmap_prefer((foff), (vap))
258 1.1 chs #endif
259 1.1 chs
260 1.5 thorpej void _pmap_set_page_cacheable(struct pmap *, vaddr_t);
261 1.5 thorpej void _pmap_set_page_cacheinhibit(struct pmap *, vaddr_t);
262 1.5 thorpej int _pmap_page_is_cacheable(struct pmap *, vaddr_t);
263 1.1 chs
264 1.1 chs #endif /* !_M68K_PMAP_MOTOROLA_H_ */
265