sys_machdep.c revision 1.15
11.15Smrg/* $NetBSD: sys_machdep.c,v 1.15 2010/06/06 04:50:07 mrg Exp $ */ 21.1Schs 31.1Schs/* 41.1Schs * Copyright (c) 1982, 1986, 1993 51.1Schs * The Regents of the University of California. All rights reserved. 61.1Schs * 71.1Schs * Redistribution and use in source and binary forms, with or without 81.1Schs * modification, are permitted provided that the following conditions 91.1Schs * are met: 101.1Schs * 1. Redistributions of source code must retain the above copyright 111.1Schs * notice, this list of conditions and the following disclaimer. 121.1Schs * 2. Redistributions in binary form must reproduce the above copyright 131.1Schs * notice, this list of conditions and the following disclaimer in the 141.1Schs * documentation and/or other materials provided with the distribution. 151.4Sagc * 3. Neither the name of the University nor the names of its contributors 161.1Schs * may be used to endorse or promote products derived from this software 171.1Schs * without specific prior written permission. 181.1Schs * 191.1Schs * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 201.1Schs * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 211.1Schs * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 221.1Schs * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 231.1Schs * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 241.1Schs * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 251.1Schs * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 261.1Schs * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 271.1Schs * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 281.1Schs * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 291.1Schs * SUCH DAMAGE. 301.1Schs * 311.1Schs * @(#)sys_machdep.c 8.2 (Berkeley) 1/13/94 321.1Schs */ 331.1Schs 341.15Smrg#include "opt_m68k_arch.h" 351.15Smrg 361.1Schs#include <sys/cdefs.h> 371.1Schs__KERNEL_RCSID(0, "$NetBSD"); 381.1Schs 391.1Schs#include <sys/param.h> 401.1Schs#include <sys/proc.h> 411.1Schs#include <sys/mount.h> 421.1Schs 431.1Schs#include <uvm/uvm_extern.h> 441.1Schs 451.1Schs#include <sys/syscallargs.h> 461.1Schs 471.1Schs#include <machine/cpu.h> 481.1Schs#include <m68k/cacheops.h> 491.1Schs 501.1Schs/* XXX should be in an include file somewhere */ 511.1Schs#define CC_PURGE 1 521.1Schs#define CC_FLUSH 2 531.1Schs#define CC_IPURGE 4 541.1Schs#define CC_EXTPURGE 0x80000000 551.1Schs/* XXX end should be */ 561.1Schs 571.1Schs/* 581.1Schs * Note that what we do here on 040/060 for BSD is different than for HP-UX. 591.1Schs * 601.3Sthorpej * In 'pux they either act on a line (len == 16), a page (len == PAGE_SIZE) 611.1Schs * or the whole cache (len == anything else). 621.1Schs * 631.1Schs * In BSD we attempt to be more optimal when acting on "odd" sizes. 641.3Sthorpej * For lengths up to 1024 we do all affected lines, up to 2*PAGE_SIZE we 651.1Schs * do pages, above that we do the entire cache. 661.1Schs */ 671.1Schs/*ARGSUSED1*/ 681.1Schsint 691.5Sthorpejcachectl1(u_long req, vaddr_t addr, size_t len, struct proc *p) 701.1Schs{ 711.1Schs int error = 0; 721.1Schs 731.1Schs#if defined(M68040) || defined(M68060) 741.1Schs if (mmutype == MMU_68040) { 751.1Schs int inc = 0; 761.10Sthorpej bool doall = false; 771.1Schs paddr_t pa = 0; 781.1Schs vaddr_t end = 0; 791.1Schs 801.1Schs if (addr == 0 || 811.1Schs#if defined(M68060) 821.1Schs (cputype == CPU_68040 && req & CC_IPURGE) || 831.1Schs#else 841.1Schs (req & CC_IPURGE) || 851.1Schs#endif 861.3Sthorpej ((req & ~CC_EXTPURGE) != CC_PURGE && len > 2 * PAGE_SIZE)) 871.1Schs doall = 1; 881.1Schs 891.1Schs if (!doall) { 901.1Schs end = addr + len; 911.1Schs if (len <= 1024) { 921.1Schs addr = addr & ~0xf; 931.1Schs inc = 16; 941.1Schs } else { 951.1Schs addr = addr & ~PGOFSET; 961.3Sthorpej inc = PAGE_SIZE; 971.1Schs } 981.1Schs } 991.1Schs do { 1001.1Schs /* 1011.1Schs * Convert to physical address if needed. 1021.1Schs * If translation fails, we perform operation on 1031.1Schs * entire cache. 1041.1Schs */ 1051.1Schs if (!doall && 1061.1Schs (pa == 0 || m68k_page_offset(addr) == 0)) { 1071.1Schs if (pmap_extract(p->p_vmspace->vm_map.pmap, 1081.10Sthorpej addr, &pa) == false) 1091.1Schs doall = 1; 1101.1Schs } 1111.1Schs switch (req) { 1121.1Schs case CC_EXTPURGE|CC_IPURGE: 1131.1Schs case CC_IPURGE: 1141.1Schs if (doall) { 1151.1Schs DCFA(); 1161.1Schs ICPA(); 1171.1Schs } else if (inc == 16) { 1181.1Schs DCFL(pa); 1191.1Schs ICPL(pa); 1201.3Sthorpej } else if (inc == PAGE_SIZE) { 1211.1Schs DCFP(pa); 1221.1Schs ICPP(pa); 1231.1Schs } 1241.1Schs break; 1251.1Schs 1261.1Schs case CC_EXTPURGE|CC_PURGE: 1271.1Schs case CC_PURGE: 1281.1Schs if (doall) 1291.1Schs DCFA(); /* note: flush not purge */ 1301.1Schs else if (inc == 16) 1311.1Schs DCPL(pa); 1321.3Sthorpej else if (inc == PAGE_SIZE) 1331.1Schs DCPP(pa); 1341.1Schs break; 1351.1Schs 1361.1Schs case CC_EXTPURGE|CC_FLUSH: 1371.1Schs case CC_FLUSH: 1381.1Schs if (doall) 1391.1Schs DCFA(); 1401.1Schs else if (inc == 16) 1411.1Schs DCFL(pa); 1421.3Sthorpej else if (inc == PAGE_SIZE) 1431.1Schs DCFP(pa); 1441.1Schs break; 1451.1Schs 1461.1Schs default: 1471.1Schs error = EINVAL; 1481.1Schs break; 1491.1Schs } 1501.1Schs if (doall) 1511.1Schs break; 1521.1Schs pa += inc; 1531.1Schs addr += inc; 1541.1Schs } while (addr < end); 1551.1Schs return (error); 1561.1Schs } 1571.1Schs#endif 1581.1Schs switch (req) { 1591.1Schs case CC_EXTPURGE|CC_PURGE: 1601.1Schs case CC_EXTPURGE|CC_FLUSH: 1611.1Schs#if defined(CACHE_HAVE_PAC) 1621.1Schs if (ectype == EC_PHYS) 1631.1Schs PCIA(); 1641.1Schs /* fall into... */ 1651.1Schs#endif 1661.1Schs case CC_PURGE: 1671.1Schs case CC_FLUSH: 1681.1Schs DCIU(); 1691.1Schs break; 1701.1Schs case CC_EXTPURGE|CC_IPURGE: 1711.1Schs#if defined(CACHE_HAVE_PAC) 1721.1Schs if (ectype == EC_PHYS) 1731.1Schs PCIA(); 1741.1Schs else 1751.1Schs#endif 1761.1Schs DCIU(); 1771.1Schs /* fall into... */ 1781.1Schs case CC_IPURGE: 1791.1Schs ICIA(); 1801.1Schs break; 1811.1Schs default: 1821.1Schs error = EINVAL; 1831.1Schs break; 1841.1Schs } 1851.7Stsutsui return error; 1861.1Schs} 1871.1Schs 1881.1Schsint 1891.13Sdslsys_sysarch(struct lwp *l, const struct sys_sysarch_args *uap, register_t *retval) 1901.1Schs{ 1911.1Schs 1921.7Stsutsui return ENOSYS; 1931.1Schs} 1941.1Schs 1951.1Schs#if defined(amiga) || defined(x68k) 1961.1Schs 1971.1Schs/* 1981.1Schs * DMA cache control 1991.1Schs */ 2001.1Schs 2011.1Schs/*ARGSUSED1*/ 2021.1Schsint 2031.11Schristosdma_cachectl(void *addr, int len) 2041.1Schs{ 2051.1Schs#if defined(M68040) || defined(M68060) 2061.1Schs int inc = 0; 2071.1Schs int pa = 0; 2081.11Schristos void *end; 2091.1Schs 2101.1Schs if (mmutype != MMU_68040) { 2111.7Stsutsui return 0; 2121.1Schs } 2131.1Schs 2141.12She end = (char*)addr + len; 2151.1Schs if (len <= 1024) { 2161.11Schristos addr = (void *)((vaddr_t)addr & ~0xf); 2171.1Schs inc = 16; 2181.1Schs } else { 2191.11Schristos addr = (void *)((vaddr_t)addr & ~PGOFSET); 2201.3Sthorpej inc = PAGE_SIZE; 2211.1Schs } 2221.1Schs do { 2231.1Schs /* 2241.1Schs * Convert to physical address. 2251.1Schs */ 2261.1Schs if (pa == 0 || ((vaddr_t)addr & PGOFSET) == 0) { 2271.1Schs pa = kvtop(addr); 2281.1Schs } 2291.1Schs if (inc == 16) { 2301.1Schs DCFL(pa); 2311.1Schs ICPL(pa); 2321.1Schs } else { 2331.1Schs DCFP(pa); 2341.1Schs ICPP(pa); 2351.1Schs } 2361.1Schs pa += inc; 2371.12She addr = (char*)addr + inc; 2381.1Schs } while (addr < end); 2391.1Schs#endif /* defined(M68040) || defined(M68060) */ 2401.7Stsutsui return 0; 2411.1Schs} 2421.1Schs#endif /* defined(amiga) || defined(x68k) */ 243