sys_machdep.c revision 1.7
11.7Stsutsui/* $NetBSD: sys_machdep.c,v 1.7 2006/07/22 06:34:42 tsutsui Exp $ */ 21.1Schs 31.1Schs/* 41.1Schs * Copyright (c) 1982, 1986, 1993 51.1Schs * The Regents of the University of California. All rights reserved. 61.1Schs * 71.1Schs * Redistribution and use in source and binary forms, with or without 81.1Schs * modification, are permitted provided that the following conditions 91.1Schs * are met: 101.1Schs * 1. Redistributions of source code must retain the above copyright 111.1Schs * notice, this list of conditions and the following disclaimer. 121.1Schs * 2. Redistributions in binary form must reproduce the above copyright 131.1Schs * notice, this list of conditions and the following disclaimer in the 141.1Schs * documentation and/or other materials provided with the distribution. 151.4Sagc * 3. Neither the name of the University nor the names of its contributors 161.1Schs * may be used to endorse or promote products derived from this software 171.1Schs * without specific prior written permission. 181.1Schs * 191.1Schs * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 201.1Schs * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 211.1Schs * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 221.1Schs * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 231.1Schs * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 241.1Schs * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 251.1Schs * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 261.1Schs * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 271.1Schs * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 281.1Schs * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 291.1Schs * SUCH DAMAGE. 301.1Schs * 311.1Schs * @(#)sys_machdep.c 8.2 (Berkeley) 1/13/94 321.1Schs */ 331.1Schs 341.1Schs#include <sys/cdefs.h> 351.1Schs__KERNEL_RCSID(0, "$NetBSD"); 361.1Schs 371.1Schs#include "opt_compat_hpux.h" 381.1Schs 391.1Schs#include <sys/param.h> 401.1Schs#include <sys/proc.h> 411.1Schs#include <sys/mount.h> 421.1Schs 431.1Schs#include <uvm/uvm_extern.h> 441.1Schs 451.2Sthorpej#include <sys/sa.h> 461.1Schs#include <sys/syscallargs.h> 471.1Schs 481.1Schs#include <machine/cpu.h> 491.1Schs#include <m68k/cacheops.h> 501.1Schs 511.1Schs/* XXX should be in an include file somewhere */ 521.1Schs#define CC_PURGE 1 531.1Schs#define CC_FLUSH 2 541.1Schs#define CC_IPURGE 4 551.1Schs#define CC_EXTPURGE 0x80000000 561.1Schs/* XXX end should be */ 571.1Schs 581.1Schs/* 591.1Schs * Note that what we do here on 040/060 for BSD is different than for HP-UX. 601.1Schs * 611.3Sthorpej * In 'pux they either act on a line (len == 16), a page (len == PAGE_SIZE) 621.1Schs * or the whole cache (len == anything else). 631.1Schs * 641.1Schs * In BSD we attempt to be more optimal when acting on "odd" sizes. 651.3Sthorpej * For lengths up to 1024 we do all affected lines, up to 2*PAGE_SIZE we 661.1Schs * do pages, above that we do the entire cache. 671.1Schs */ 681.1Schs/*ARGSUSED1*/ 691.1Schsint 701.5Sthorpejcachectl1(u_long req, vaddr_t addr, size_t len, struct proc *p) 711.1Schs{ 721.1Schs int error = 0; 731.1Schs 741.1Schs#if defined(M68040) || defined(M68060) 751.1Schs if (mmutype == MMU_68040) { 761.1Schs int inc = 0; 771.1Schs boolean_t doall = FALSE; 781.1Schs paddr_t pa = 0; 791.1Schs vaddr_t end = 0; 801.1Schs#ifdef COMPAT_HPUX 811.1Schs extern struct emul emul_hpux; 821.1Schs 831.1Schs if ((p->p_emul == &emul_hpux) && 841.3Sthorpej len != 16 && len != PAGE_SIZE) 851.1Schs doall = 1; 861.1Schs#endif 871.1Schs 881.1Schs if (addr == 0 || 891.1Schs#if defined(M68060) 901.1Schs (cputype == CPU_68040 && req & CC_IPURGE) || 911.1Schs#else 921.1Schs (req & CC_IPURGE) || 931.1Schs#endif 941.3Sthorpej ((req & ~CC_EXTPURGE) != CC_PURGE && len > 2 * PAGE_SIZE)) 951.1Schs doall = 1; 961.1Schs 971.1Schs if (!doall) { 981.1Schs end = addr + len; 991.1Schs if (len <= 1024) { 1001.1Schs addr = addr & ~0xf; 1011.1Schs inc = 16; 1021.1Schs } else { 1031.1Schs addr = addr & ~PGOFSET; 1041.3Sthorpej inc = PAGE_SIZE; 1051.1Schs } 1061.1Schs } 1071.1Schs do { 1081.1Schs /* 1091.1Schs * Convert to physical address if needed. 1101.1Schs * If translation fails, we perform operation on 1111.1Schs * entire cache. 1121.1Schs */ 1131.1Schs if (!doall && 1141.1Schs (pa == 0 || m68k_page_offset(addr) == 0)) { 1151.1Schs if (pmap_extract(p->p_vmspace->vm_map.pmap, 1161.1Schs addr, &pa) == FALSE) 1171.1Schs doall = 1; 1181.1Schs } 1191.1Schs switch (req) { 1201.1Schs case CC_EXTPURGE|CC_IPURGE: 1211.1Schs case CC_IPURGE: 1221.1Schs if (doall) { 1231.1Schs DCFA(); 1241.1Schs ICPA(); 1251.1Schs } else if (inc == 16) { 1261.1Schs DCFL(pa); 1271.1Schs ICPL(pa); 1281.3Sthorpej } else if (inc == PAGE_SIZE) { 1291.1Schs DCFP(pa); 1301.1Schs ICPP(pa); 1311.1Schs } 1321.1Schs break; 1331.1Schs 1341.1Schs case CC_EXTPURGE|CC_PURGE: 1351.1Schs case CC_PURGE: 1361.1Schs if (doall) 1371.1Schs DCFA(); /* note: flush not purge */ 1381.1Schs else if (inc == 16) 1391.1Schs DCPL(pa); 1401.3Sthorpej else if (inc == PAGE_SIZE) 1411.1Schs DCPP(pa); 1421.1Schs break; 1431.1Schs 1441.1Schs case CC_EXTPURGE|CC_FLUSH: 1451.1Schs case CC_FLUSH: 1461.1Schs if (doall) 1471.1Schs DCFA(); 1481.1Schs else if (inc == 16) 1491.1Schs DCFL(pa); 1501.3Sthorpej else if (inc == PAGE_SIZE) 1511.1Schs DCFP(pa); 1521.1Schs break; 1531.1Schs 1541.1Schs default: 1551.1Schs error = EINVAL; 1561.1Schs break; 1571.1Schs } 1581.1Schs if (doall) 1591.1Schs break; 1601.1Schs pa += inc; 1611.1Schs addr += inc; 1621.1Schs } while (addr < end); 1631.1Schs return (error); 1641.1Schs } 1651.1Schs#endif 1661.1Schs switch (req) { 1671.1Schs case CC_EXTPURGE|CC_PURGE: 1681.1Schs case CC_EXTPURGE|CC_FLUSH: 1691.1Schs#if defined(CACHE_HAVE_PAC) 1701.1Schs if (ectype == EC_PHYS) 1711.1Schs PCIA(); 1721.1Schs /* fall into... */ 1731.1Schs#endif 1741.1Schs case CC_PURGE: 1751.1Schs case CC_FLUSH: 1761.1Schs DCIU(); 1771.1Schs break; 1781.1Schs case CC_EXTPURGE|CC_IPURGE: 1791.1Schs#if defined(CACHE_HAVE_PAC) 1801.1Schs if (ectype == EC_PHYS) 1811.1Schs PCIA(); 1821.1Schs else 1831.1Schs#endif 1841.1Schs DCIU(); 1851.1Schs /* fall into... */ 1861.1Schs case CC_IPURGE: 1871.1Schs ICIA(); 1881.1Schs break; 1891.1Schs default: 1901.1Schs error = EINVAL; 1911.1Schs break; 1921.1Schs } 1931.7Stsutsui return error; 1941.1Schs} 1951.1Schs 1961.1Schsint 1971.5Sthorpejsys_sysarch(struct lwp *l, void *v, register_t *retval) 1981.1Schs{ 1991.1Schs 2001.7Stsutsui return ENOSYS; 2011.1Schs} 2021.1Schs 2031.1Schs#if defined(amiga) || defined(x68k) 2041.1Schs 2051.1Schs/* 2061.1Schs * DMA cache control 2071.1Schs */ 2081.1Schs 2091.1Schs/*ARGSUSED1*/ 2101.1Schsint 2111.5Sthorpejdma_cachectl(caddr_t addr, int len) 2121.1Schs{ 2131.1Schs#if defined(M68040) || defined(M68060) 2141.1Schs int inc = 0; 2151.1Schs int pa = 0; 2161.1Schs caddr_t end; 2171.1Schs 2181.1Schs if (mmutype != MMU_68040) { 2191.7Stsutsui return 0; 2201.1Schs } 2211.1Schs 2221.1Schs end = addr + len; 2231.1Schs if (len <= 1024) { 2241.1Schs addr = (caddr_t)((vaddr_t)addr & ~0xf); 2251.1Schs inc = 16; 2261.1Schs } else { 2271.1Schs addr = (caddr_t)((vaddr_t)addr & ~PGOFSET); 2281.3Sthorpej inc = PAGE_SIZE; 2291.1Schs } 2301.1Schs do { 2311.1Schs /* 2321.1Schs * Convert to physical address. 2331.1Schs */ 2341.1Schs if (pa == 0 || ((vaddr_t)addr & PGOFSET) == 0) { 2351.1Schs pa = kvtop(addr); 2361.1Schs } 2371.1Schs if (inc == 16) { 2381.1Schs DCFL(pa); 2391.1Schs ICPL(pa); 2401.1Schs } else { 2411.1Schs DCFP(pa); 2421.1Schs ICPP(pa); 2431.1Schs } 2441.1Schs pa += inc; 2451.1Schs addr += inc; 2461.1Schs } while (addr < end); 2471.1Schs#endif /* defined(M68040) || defined(M68060) */ 2481.7Stsutsui return 0; 2491.1Schs} 2501.1Schs#endif /* defined(amiga) || defined(x68k) */ 251