if_aereg.h revision 1.14 1 /* $NetBSD: if_aereg.h,v 1.14 1997/02/24 07:34:20 scottr Exp $ */
2
3 /*
4 * National Semiconductor DS8390 NIC register definitions.
5 *
6 * Copyright (C) 1993, David Greenman. This software may be used, modified,
7 * copied, distributed, and sold, in both source and binary form provided that
8 * the above copyright and these terms are retained. Under no circumstances is
9 * the author responsible for the proper functioning of this software, nor does
10 * the author assume any responsibility for damages incurred with its use.
11 */
12
13 /*
14 * The following is a structure that we should be pulling from
15 * dev/ic/dp8390reg.h, but since we have the card in x86 mode and
16 * the std. include file assumes that big-endian processors will
17 * have the card in m68k mode, we're hosed for the moment.
18 * Fix this. -- XXX
19 */
20 struct ae_ring {
21 u_char rsr; /* receiver status */
22 u_char next_packet; /* pointer to next packet */
23 u_short count; /* bytes in packet (length + 4) */
24 };
25 /*
26 * Vendor types
27 */
28 #define AE_VENDOR_UNKNOWN 0xff /* Unknown network card */
29 #define AE_VENDOR_APPLE 0x00 /* Apple Ethernet card */
30 #define AE_VENDOR_INTERLAN 0x01 /* Interlan A310 card (GatorCard) */
31 #define AE_VENDOR_DAYNA 0x02 /* DaynaPORT E/30s (and others?) */
32 #define AE_VENDOR_ASANTE 0x03 /* Asante MacCon II/E */
33 #define AE_VENDOR_FARALLON 0x04 /* Farallon EtherMac II-TP */
34 #define AE_VENDOR_FOCUS 0x05 /* FOCUS Enhancements EtherLAN */
35 #define AE_VENDOR_KINETICS 0x06 /* Kinetics EtherPort SE/30 */
36
37 /*
38 * Compile-time config flags
39 */
40 /*
41 * This sets the default for enabling/disablng the tranceiver.
42 */
43 #define AE_FLAGS_DISABLE_TRANCEIVER 0x0001
44
45 /*
46 * This disables the use of double transmit buffers.
47 */
48 #define AE_FLAGS_NO_DOUBLE_BUFFERING 0x0008
49
50 /* */
51 #define GC_RESET_OFFSET 0x000c0000 /* writes here reset NIC */
52 #define GC_ROM_OFFSET 0x000c0000 /* address prom */
53 #define GC_DATA_OFFSET 0x000d0000 /* Offset to NIC memory */
54 #define GC_REG_OFFSET 0x000e0000 /* Offset to NIC registers */
55
56 #define DP_ROM_OFFSET 0x000f0000
57 #define DP_DATA_OFFSET 0x000d0000 /* Offset to SONIC memory */
58 #define DP_REG_OFFSET 0x000e0000 /* Offset to SONIC registers */
59
60 #define AE_ROM_OFFSET 0x000f0000
61 #define AE_DATA_OFFSET 0x000d0000 /* Offset to NIC memory */
62 #define AE_REG_OFFSET 0x000e0000 /* Offset to NIC registers */
63
64 #define FE_ROM_OFFSET 0x000d0006 /* Determined empirically */
65
66 #define KE_ROM_OFFSET 0x000f0007
67 #define KE_DATA_OFFSET 0x00000000 /* Offset to NIC memory */
68 #define KE_REG_OFFSET 0x00080003 /* Offset to NIC registers */
69
70 #define AE_REG_SIZE 0x40 /* Size of register space */
71