Home | History | Annotate | Line # | Download | only in dev
if_mcvar.h revision 1.1 
      1 /*-
      2  * Copyright (c) 1997 David Huang <khym (at) bga.com>
      3  * All rights reserved.
      4  *
      5  * Redistribution and use in source and binary forms, with or without
      6  * modification, are permitted provided that the following conditions
      7  * are met:
      8  * 1. Redistributions of source code must retain the above copyright
      9  *    notice, this list of conditions and the following disclaimer.
     10  * 2. The name of the author may not be used to endorse or promote products
     11  *    derived from this software without specific prior written permission
     12  *
     13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     14  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     15  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     16  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     17  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     18  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     19  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     20  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     21  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     22  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     23  *
     24  */
     25 
     26 #ifdef DDB
     27 #define	integrate
     28 #define hide
     29 #else
     30 #define	integrate	static __inline
     31 #define hide		static
     32 #endif
     33 
     34 #define	MC_REGSPACING	16
     35 #define	MC_REGSIZE	MACE_NREGS * MC_REGSPACING
     36 #define	MACE_REG(x)	((x)*MC_REGSPACING)
     37 
     38 #define	NIC_GET(sc, reg)	(bus_space_read_1((sc)->sc_regt,	\
     39 				    (sc)->sc_regh, MACE_REG(reg)))
     40 
     41 #define	NIC_PUT(sc, reg, val)	(bus_space_write_1((sc)->sc_regt,	\
     42 				    (sc)->sc_regh, MACE_REG(reg), (val)))
     43 
     44 #ifndef	MC_RXDMABUFS
     45 #define	MC_RXDMABUFS	4
     46 #endif
     47 #if (MC_RXDMABUFS < 2)
     48 #error Must have at least two buffers for DMA!
     49 #endif
     50 
     51 #define	MC_NPAGES	((MC_RXDMABUFS * 0x800 + NBPG - 1) / NBPG)
     52 
     53 struct mc_rxframe {
     54 	u_int8_t	rx_rcvcnt;
     55 	u_int8_t	rx_rcvsts;
     56 	u_int8_t	rx_rntpc;
     57 	u_int8_t	rx_rcvcc;
     58 	u_char		*rx_frame;
     59 };
     60 
     61 struct mc_softc {
     62 	struct device	sc_dev;		/* base device glue */
     63 	struct ethercom	sc_ethercom;	/* Ethernet common part */
     64 #define	sc_if		sc_ethercom.ec_if
     65 
     66 	struct mc_rxframe	sc_rxframe;
     67 	u_int8_t	sc_biucc;
     68 	u_int8_t	sc_fifocc;
     69 	u_int8_t	sc_plscc;
     70 	u_int8_t	sc_enaddr[6];
     71 	u_int8_t	sc_pad[2];
     72 	int		sc_havecarrier; /* carrier status */
     73 	void		(*sc_bus_init) __P((struct mc_softc *));
     74 	void		(*sc_putpacket) __P((struct mc_softc *, u_int));
     75 
     76 	bus_space_tag_t		sc_regt;
     77 	bus_space_handle_t	sc_regh;
     78 
     79 	u_char		*sc_txbuf, *sc_rxbuf;
     80 	int		sc_txbuf_phys, sc_rxbuf_phys;
     81 	int		sc_tail;
     82 	int		sc_rxset;
     83 	int		sc_txset, sc_txseti;
     84 };
     85 
     86 int	mcsetup __P((struct mc_softc *, u_int8_t *));
     87 void	mcintr __P((void *arg));
     88 integrate void	mc_tint __P((struct mc_softc *sc));
     89 integrate void	mc_rint __P((struct mc_softc *sc));
     90 u_char	mc_get_enaddr __P((bus_space_tag_t t, bus_space_handle_t h,
     91 	    vm_offset_t o, u_char *dst));
     92