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if_snvar.h revision 1.2
      1  1.2      is /*      $NetBSD: if_snvar.h,v 1.2 1997/03/16 13:41:17 is Exp $	*/
      2  1.1  briggs 
      3  1.1  briggs /*
      4  1.1  briggs  * Copyright (c) 1991   Algorithmics Ltd (http://www.algor.co.uk)
      5  1.1  briggs  * You may use, copy, and modify this program so long as you retain the
      6  1.1  briggs  * copyright line.
      7  1.1  briggs  */
      8  1.1  briggs 
      9  1.1  briggs /*
     10  1.1  briggs  * if_sonic.h -- National Semiconductor DP83932BVF (SONIC)
     11  1.1  briggs  */
     12  1.1  briggs 
     13  1.1  briggs /*
     14  1.1  briggs  * Memory access macros. Since we handle SONIC in 16 bit mode (PB5X0)
     15  1.1  briggs  * and 32 bit mode (everything else) using a single GENERIC kernel
     16  1.1  briggs  * binary, all structures have to be accessed using macros which can
     17  1.1  briggs  * adjust the offsets appropriately.
     18  1.1  briggs  */
     19  1.1  briggs #define	SWO(m, a, o, x)	(m ? (*(u_int32_t *)((u_int32_t *)a + o) = (x)) : \
     20  1.1  briggs 			     (*(u_int16_t *)((u_int16_t *)a + o) = (x)))
     21  1.1  briggs #define	SRO(m, a, o)	(m ? (*(u_int32_t *)((u_int32_t *)a + o) & 0xffff) : \
     22  1.1  briggs 			     (*(u_int16_t *)((u_int16_t *)a + o) & 0xffff))
     23  1.1  briggs 
     24  1.1  briggs /*
     25  1.1  briggs  * buffer sizes in 32 bit mode
     26  1.1  briggs  * 1 TXpkt is 4 hdr words + (3 * FRAGMAX) + 1 link word
     27  1.1  briggs  * FRAGMAX == 16 => 54 words == 216 bytes
     28  1.1  briggs  *
     29  1.1  briggs  * 1 RxPkt is 7 words == 28 bytes
     30  1.1  briggs  * 1 Rda   is 4 words == 16 bytes
     31  1.1  briggs  */
     32  1.1  briggs 
     33  1.1  briggs #define NRBA    16		/* # receive buffers < NRRA */
     34  1.1  briggs #define RBAMASK 0x0f
     35  1.1  briggs #define NRDA    NRBA
     36  1.1  briggs #define NTDA    4		/* # transmit descriptors */
     37  1.1  briggs #define NRRA    32		/* # receive resource descriptors */
     38  1.1  briggs #define RRAMASK 0x1f		/* the reason why it must be power of two */
     39  1.1  briggs 
     40  1.1  briggs #define FCSSIZE 4		/* size of FCS appended to packets */
     41  1.1  briggs 
     42  1.1  briggs /*
     43  1.1  briggs  * maximum receive packet size plus 2 byte pad to make each
     44  1.1  briggs  * one aligned. 4 byte slop (required for eobc)
     45  1.1  briggs  */
     46  1.1  briggs #define RBASIZE(sc)	(sizeof(struct ether_header) + ETHERMTU + FCSSIZE + \
     47  1.1  briggs 			 ((sc)->bitmode ? 6 : 2))
     48  1.1  briggs 
     49  1.1  briggs /*
     50  1.1  briggs  * transmit buffer area
     51  1.1  briggs  */
     52  1.1  briggs #define NTXB    10      /* Number of xmit buffers */
     53  1.1  briggs #define TXBSIZE 1536    /* 6*2^8 -- the same size as the 8390 TXBUF */
     54  1.1  briggs 
     55  1.1  briggs /*
     56  1.1  briggs  * Statistics collected over time
     57  1.1  briggs  */
     58  1.1  briggs struct sn_stats {
     59  1.1  briggs 	int     ls_opacks;	/* packets transmitted */
     60  1.1  briggs 	int     ls_ipacks;	/* packets received */
     61  1.1  briggs 	int     ls_tdr;		/* contents of tdr after collision */
     62  1.1  briggs 	int     ls_tdef;	/* packets where had to wait */
     63  1.1  briggs 	int     ls_tone;	/* packets with one retry */
     64  1.1  briggs 	int     ls_tmore;	/* packets with more than one retry */
     65  1.1  briggs 	int     ls_tbuff;	/* transmit buff errors */
     66  1.1  briggs 	int     ls_tuflo;       /* "      uflo  "     */
     67  1.1  briggs 	int     ls_tlcol;
     68  1.1  briggs 	int     ls_tlcar;
     69  1.1  briggs 	int     ls_trtry;
     70  1.1  briggs 	int     ls_rbuff;       /* receive buff errors */
     71  1.1  briggs 	int     ls_rfram;       /* framing     */
     72  1.1  briggs 	int     ls_roflo;       /* overflow    */
     73  1.1  briggs 	int     ls_rcrc;
     74  1.1  briggs 	int     ls_rrng;	/* rx ring sequence error */
     75  1.1  briggs 	int     ls_babl;	/* chip babl error */
     76  1.1  briggs 	int     ls_cerr;	/* collision error */
     77  1.1  briggs 	int     ls_miss;	/* missed packet */
     78  1.1  briggs 	int     ls_merr;	/* memory error */
     79  1.1  briggs 	int     ls_copies;      /* copies due to out of range mbufs */
     80  1.1  briggs 	int     ls_maxmbufs;    /* max mbufs on transmit */
     81  1.1  briggs 	int     ls_maxslots;    /* max ring slots on transmit */
     82  1.1  briggs };
     83  1.1  briggs 
     84  1.1  briggs typedef struct mtd {
     85  1.1  briggs 	void		*mtd_txp;
     86  1.1  briggs 	int		mtd_vtxp;
     87  1.1  briggs 	unsigned char	*mtd_buf;
     88  1.1  briggs } mtd_t;
     89  1.1  briggs 
     90  1.1  briggs /*
     91  1.1  briggs  * The sn_softc for Mac68k if_sn.
     92  1.1  briggs  */
     93  1.1  briggs typedef struct sn_softc {
     94  1.1  briggs 	struct	device sc_dev;
     95  1.2      is 	struct	ethercom sc_ethercom;
     96  1.2      is #define	sc_if		sc_ethercom.ec_if	/* network visible interface */
     97  1.1  briggs 
     98  1.1  briggs 	bus_space_tag_t		sc_regt;
     99  1.1  briggs 	bus_space_handle_t	sc_regh;
    100  1.1  briggs 
    101  1.1  briggs 	struct sn_stats	sc_sum;
    102  1.1  briggs 	short		sc_iflags;
    103  1.1  briggs 	unsigned short	bitmode;	/* 32 bit mode == 1, 16 == 0 */
    104  1.1  briggs 
    105  1.1  briggs 	unsigned int	s_dcr;		/* DCR for this instance */
    106  1.1  briggs 	int	slotno;			/* Slot number */
    107  1.1  briggs 	struct sonic_reg *sc_csr;	/* hardware pointer */
    108  1.1  briggs 	int	sc_rxmark;		/* pos. in rx ring for reading buffs */
    109  1.1  briggs 
    110  1.1  briggs 	int	sc_rramark;		/* index into p_rra of wp */
    111  1.1  briggs 	void *p_rra[NRRA];		/* RX resource descs */
    112  1.1  briggs 	int	v_rra[NRRA];		/* DMA addresses of p_rra */
    113  1.1  briggs 	int	v_rea;			/* ptr to the end of the rra space */
    114  1.1  briggs 
    115  1.1  briggs 	int	sc_rdamark;
    116  1.1  briggs 	void *p_rda[NRDA];
    117  1.1  briggs 	int	v_rda[NRDA];
    118  1.1  briggs 
    119  1.1  briggs 	caddr_t	rbuf[NRBA];
    120  1.1  briggs 
    121  1.1  briggs 	int	sc_txhead;		/*XXX idx of first TDA passed to chip */
    122  1.1  briggs 	int	sc_missed;		/* missed packet counter */
    123  1.1  briggs 
    124  1.1  briggs 	int	txb_cnt;		/* total number of xmit buffers */
    125  1.1  briggs 	int	txb_inuse;		/* number of active xmit buffers */
    126  1.1  briggs 	int	txb_new;		/* index of next open slot. */
    127  1.1  briggs 
    128  1.1  briggs 	struct mtd	mtda[NTDA];
    129  1.1  briggs 	int		mtd_hw;		/* idx of first mtd given to hw */
    130  1.1  briggs 	int		mtd_prev;	/* idx of last mtd given to hardware */
    131  1.1  briggs 	int		mtd_free;	/* next free mtd to use */
    132  1.1  briggs 	int		mtd_tlinko;	/*
    133  1.1  briggs 					 * offset of tlink of last txp given
    134  1.1  briggs 					 * to SONIC. Need to clear EOL on
    135  1.1  briggs 					 * this word to add a desc.
    136  1.1  briggs 					 */
    137  1.1  briggs 
    138  1.1  briggs 	caddr_t		tbuf[NTXB];
    139  1.1  briggs 	int		vtbuf[NTXB];	/* DMA address of tbuf */
    140  1.1  briggs 
    141  1.1  briggs 	void		*p_cda;
    142  1.1  briggs 	int		v_cda;
    143  1.1  briggs 
    144  1.1  briggs 	unsigned char	space[(1 + 1 + 8 + 5) * NBPG];
    145  1.1  briggs } sn_softc_t;
    146  1.1  briggs 
    147  1.1  briggs /*
    148  1.1  briggs  * Accessing SONIC data structures and registers as 32 bit values
    149  1.1  briggs  * makes code endianess independent.  The SONIC is however always in
    150  1.1  briggs  * bigendian mode so it is necessary to ensure that data structures shared
    151  1.1  briggs  * between the CPU and the SONIC are always in bigendian order.
    152  1.1  briggs  */
    153  1.1  briggs 
    154  1.1  briggs /*
    155  1.1  briggs  * Receive Resource Descriptor
    156  1.1  briggs  * This structure describes the buffers into which packets
    157  1.1  briggs  * will be received.  Note that more than one packet may be
    158  1.1  briggs  * packed into a single buffer if constraints permit.
    159  1.1  briggs  */
    160  1.1  briggs #define	RXRSRC_PTRLO	0	/* buffer address LO */
    161  1.1  briggs #define	RXRSRC_PTRHI	1	/* buffer address HI */
    162  1.1  briggs #define	RXRSRC_WCLO	2	/* buffer size (16bit words) LO */
    163  1.1  briggs #define	RXRSRC_WCHI	3	/* buffer size (16bit words) HI */
    164  1.1  briggs 
    165  1.1  briggs #define	RXRSRC_SIZE(sc)	(sc->bitmode ? (4 * 4) : (4 * 2))
    166  1.1  briggs 
    167  1.1  briggs /*
    168  1.1  briggs  * Receive Descriptor
    169  1.1  briggs  * This structure holds information about packets received.
    170  1.1  briggs  */
    171  1.1  briggs #define	RXPKT_STATUS	0
    172  1.1  briggs #define	RXPKT_BYTEC	1
    173  1.1  briggs #define	RXPKT_PTRLO	2
    174  1.1  briggs #define	RXPKT_PTRHI	3
    175  1.1  briggs #define	RXPKT_SEQNO	4
    176  1.1  briggs #define	RXPKT_RLINK	5
    177  1.1  briggs #define	RXPKT_INUSE	6
    178  1.1  briggs #define	RXPKT_SIZE(sc)	(sc->bitmode ? (7 * 4) : (7 * 2))
    179  1.1  briggs 
    180  1.1  briggs #define RBASEQ(x) (((x)>>8)&0xff)
    181  1.1  briggs #define PSNSEQ(x) ((x) & 0xff)
    182  1.1  briggs 
    183  1.1  briggs /*
    184  1.1  briggs  * Transmit Descriptor
    185  1.1  briggs  * This structure holds information about packets to be transmitted.
    186  1.1  briggs  */
    187  1.1  briggs #define FRAGMAX	16		/* maximum number of fragments in a packet */
    188  1.1  briggs 
    189  1.1  briggs #define	TXP_STATUS	0	/* + transmitted packet status */
    190  1.1  briggs #define	TXP_CONFIG	1	/* transmission configuration */
    191  1.1  briggs #define	TXP_PKTSIZE	2	/* entire packet size in bytes */
    192  1.1  briggs #define	TXP_FRAGCNT	3	/* # fragments in packet */
    193  1.1  briggs 
    194  1.1  briggs #define	TXP_FRAGOFF	4	/* offset to first fragment */
    195  1.1  briggs #define	TXP_FRAGSIZE	3	/* size of each fragment desc */
    196  1.1  briggs #define	TXP_FPTRLO	0	/* ptr to packet fragment LO */
    197  1.1  briggs #define	TXP_FPTRHI	1	/* ptr to packet fragment HI */
    198  1.1  briggs #define	TXP_FSIZE	2	/* fragment size */
    199  1.1  briggs 
    200  1.1  briggs #define	TXP_WORDS	TXP_FRAGOFF + FRAGMAX*TXP_FSIZE + 1	/* 1 for tlink */
    201  1.1  briggs #define	TXP_SIZE(sc)	((sc->bitmode) ? (TXP_WORDS*4) : (TXP_WORDS*2))
    202  1.1  briggs 
    203  1.1  briggs #define EOL	0x0001		/* end of list marker for link fields */
    204  1.1  briggs 
    205  1.1  briggs /*
    206  1.1  briggs  * CDA, the CAM descriptor area. The SONIC has a 16 entry CAM to
    207  1.1  briggs  * match incoming addresses against. It is programmed via DMA
    208  1.1  briggs  * from a memory region.
    209  1.1  briggs  */
    210  1.1  briggs #define MAXCAM	16	/* number of user entries in CAM */
    211  1.1  briggs #define	CDA_CAMDESC	4	/* # words i na descriptor */
    212  1.1  briggs #define	CDA_CAMEP	0	/* CAM Address Port 0 xx-xx-xx-xx-YY-YY */
    213  1.1  briggs #define	CDA_CAMAP0	1	/* CAM Address Port 1 xx-xx-YY-YY-xx-xx */
    214  1.1  briggs #define	CDA_CAMAP1	2	/* CAM Address Port 2 YY-YY-xx-xx-xx-xx */
    215  1.1  briggs #define	CDA_CAMAP2	3
    216  1.1  briggs #define	CDA_ENABLE	64	/* mask enabling CAM entries */
    217  1.1  briggs #define	CDA_SIZE(sc)	((4*16 + 1) * ((sc->bitmode) ? 4 : 2))
    218  1.1  briggs 
    219  1.2      is void	snsetup __P((struct sn_softc *sc, u_int8_t *));
    220