if_snvar.h revision 1.13.4.1
1 /* $NetBSD: if_snvar.h,v 1.13.4.1 2000/07/01 17:45:52 he Exp $ */ 2 3 /* 4 * Copyright (c) 1991 Algorithmics Ltd (http://www.algor.co.uk) 5 * You may use, copy, and modify this program so long as you retain the 6 * copyright line. 7 */ 8 9 /* 10 * if_snvar.h -- National Semiconductor DP8393X (SONIC) NetBSD/mac68k vars 11 */ 12 13 /* 14 * Vendor types 15 */ 16 #define SN_VENDOR_UNKNOWN 0xff /* Unknown */ 17 #define SN_VENDOR_APPLE 0x00 /* Apple Computer/compatible */ 18 #define SN_VENDOR_DAYNA 0x01 /* Dayna/Kinetics EtherPort */ 19 #define SN_VENDOR_APPLE16 0x02 /* Apple Twisted Pair NB */ 20 #define SN_VENDOR_ASANTELC 0x09 /* Asante Macintosh LC Ethernet */ 21 22 /* 23 * Memory access macros. Since we handle SONIC in 16 bit mode (PB5X0) 24 * and 32 bit mode (everything else) using a single GENERIC kernel 25 * binary, all structures have to be accessed using macros which can 26 * adjust the offsets appropriately. 27 */ 28 #define SWO(m, a, o, x) (m ? (*(u_int32_t *)((u_int32_t *)(a) + (o)) = (x)) : \ 29 (*(u_int16_t *)((u_int16_t *)(a) + (o)) = (x))) 30 #define SRO(m, a, o) (m ? (*(u_int32_t *)((u_int32_t *)(a) + (o)) & 0xffff) : \ 31 (*(u_int16_t *)((u_int16_t *)(a) + (o)) & 0xffff)) 32 33 /* 34 * Register access macros. We use bus_space_* to talk to the Sonic 35 * registers. A mapping table is used in case a particular configuration 36 * hooked the regs up at non-word offsets. 37 */ 38 #define NIC_GET(sc, reg) (bus_space_read_2((sc)->sc_regt, \ 39 (sc)->sc_regh, \ 40 ((sc)->sc_reg_map[(reg)]))) 41 #define NIC_PUT(sc, reg, val) (bus_space_write_2((sc)->sc_regt, \ 42 (sc)->sc_regh, \ 43 ((sc)->sc_reg_map[reg]), \ 44 (val))) 45 46 extern int kvtop(caddr_t addr); 47 #define SONIC_GETDMA(p) (u_int32_t)(kvtop((caddr_t)(p))) 48 49 #define SN_REGSIZE SN_NREGS*4 50 51 /* mac68k does not have any write buffers to flush... */ 52 #define wbflush() 53 54 /* 55 * buffer sizes in 32 bit mode 56 * 1 TXpkt is 4 hdr words + (3 * FRAGMAX) + 1 link word == 23 words == 92 bytes 57 * 58 * 1 RxPkt is 7 words == 28 bytes 59 * 1 Rda is 4 words == 16 bytes 60 * 61 * The CDA is 17 words == 68 bytes 62 * 63 * total space in page 0 = NTDA * 92 + NRRA * 16 + NRDA * 28 + 68 64 */ 65 66 #define NRBA 32 /* # receive buffers < NRRA */ 67 #define RBAMASK (NRBA-1) 68 #define NTDA 16 /* # transmit descriptors */ 69 #define NRRA 64 /* # receive resource descriptors */ 70 #define RRAMASK (NRRA-1) /* the reason why NRRA must be power of two */ 71 72 #define FCSSIZE 4 /* size of FCS appended to packets */ 73 74 /* 75 * maximum receive packet size plus 2 byte pad to make each 76 * one aligned. 4 byte slop (required for eobc) 77 */ 78 #define RBASIZE(sc) (sizeof(struct ether_header) + ETHERMTU + FCSSIZE + \ 79 ((sc)->bitmode ? 6 : 2)) 80 81 /* 82 * transmit buffer area 83 */ 84 #define TXBSIZE 1536 /* 6*2^8 -- the same size as the 8390 TXBUF */ 85 86 #define SN_NPAGES 2 + NRBA + (NTDA/2) 87 88 typedef struct mtd { 89 void *mtd_txp; 90 u_int32_t mtd_vtxp; 91 caddr_t mtd_buf; 92 u_int32_t mtd_vbuf; 93 struct mbuf *mtd_mbuf; 94 } mtd_t; 95 96 /* 97 * The sn_softc for Mac68k if_sn. 98 */ 99 typedef struct sn_softc { 100 struct device sc_dev; 101 struct ethercom sc_ethercom; 102 #define sc_if sc_ethercom.ec_if /* network visible interface */ 103 104 bus_space_tag_t sc_regt; 105 bus_space_handle_t sc_regh; 106 107 int bitmode; /* 32 bit mode == 1, 16 == 0 */ 108 bus_size_t sc_reg_map[SN_NREGS]; /* register offsets */ 109 110 u_int16_t snr_dcr; /* DCR for this instance */ 111 u_int16_t snr_dcr2; /* DCR2 for this instance */ 112 int slotno; /* Slot number */ 113 114 int sc_rramark; /* index into p_rra of wp */ 115 void *p_rra[NRRA]; /* RX resource descs */ 116 u_int32_t v_rra[NRRA]; /* DMA addresses of p_rra */ 117 u_int32_t v_rea; /* ptr to the end of the rra space */ 118 119 int sc_rxmark; /* current hw pos in rda ring */ 120 int sc_rdamark; /* current sw pos in rda ring */ 121 int sc_nrda; /* total number of RDAs */ 122 caddr_t p_rda; 123 u_int32_t v_rda; 124 125 caddr_t rbuf[NRBA]; 126 127 struct mtd mtda[NTDA]; 128 int mtd_hw; /* idx of first mtd given to hw */ 129 int mtd_prev; /* idx of last mtd given to hardware */ 130 int mtd_free; /* next free mtd to use */ 131 int mtd_tlinko; /* 132 * offset of tlink of last txp given 133 * to SONIC. Need to clear EOL on 134 * this word to add a desc. 135 */ 136 int mtd_pint; /* Counter to set TXP_PINT */ 137 138 void *p_cda; 139 u_int32_t v_cda; 140 141 unsigned char *space; 142 } sn_softc_t; 143 144 /* 145 * Accessing SONIC data structures and registers as 32 bit values 146 * makes code endianess independent. The SONIC is however always in 147 * bigendian mode so it is necessary to ensure that data structures shared 148 * between the CPU and the SONIC are always in bigendian order. 149 */ 150 151 /* 152 * Receive Resource Descriptor 153 * This structure describes the buffers into which packets 154 * will be received. Note that more than one packet may be 155 * packed into a single buffer if constraints permit. 156 */ 157 #define RXRSRC_PTRLO 0 /* buffer address LO */ 158 #define RXRSRC_PTRHI 1 /* buffer address HI */ 159 #define RXRSRC_WCLO 2 /* buffer size (16bit words) LO */ 160 #define RXRSRC_WCHI 3 /* buffer size (16bit words) HI */ 161 162 #define RXRSRC_SIZE(sc) (sc->bitmode ? (4 * 4) : (4 * 2)) 163 164 /* 165 * Receive Descriptor 166 * This structure holds information about packets received. 167 */ 168 #define RXPKT_STATUS 0 169 #define RXPKT_BYTEC 1 170 #define RXPKT_PTRLO 2 171 #define RXPKT_PTRHI 3 172 #define RXPKT_SEQNO 4 173 #define RXPKT_RLINK 5 174 #define RXPKT_INUSE 6 175 #define RXPKT_SIZE(sc) (sc->bitmode ? (7 * 4) : (7 * 2)) 176 177 #define RBASEQ(x) (((x)>>8)&0xff) 178 #define PSNSEQ(x) ((x) & 0xff) 179 180 /* 181 * Transmit Descriptor 182 * This structure holds information about packets to be transmitted. 183 */ 184 #define FRAGMAX 8 /* maximum number of fragments in a packet */ 185 186 #define TXP_STATUS 0 /* + transmitted packet status */ 187 #define TXP_CONFIG 1 /* transmission configuration */ 188 #define TXP_PKTSIZE 2 /* entire packet size in bytes */ 189 #define TXP_FRAGCNT 3 /* # fragments in packet */ 190 191 #define TXP_FRAGOFF 4 /* offset to first fragment */ 192 #define TXP_FRAGSIZE 3 /* size of each fragment desc */ 193 #define TXP_FPTRLO 0 /* ptr to packet fragment LO */ 194 #define TXP_FPTRHI 1 /* ptr to packet fragment HI */ 195 #define TXP_FSIZE 2 /* fragment size */ 196 197 #define TXP_WORDS TXP_FRAGOFF + (FRAGMAX*TXP_FRAGSIZE) + 1 /* 1 for tlink */ 198 #define TXP_SIZE(sc) ((sc->bitmode) ? (TXP_WORDS*4) : (TXP_WORDS*2)) 199 200 #define EOL 0x0001 /* end of list marker for link fields */ 201 202 /* 203 * CDA, the CAM descriptor area. The SONIC has a 16 entry CAM to 204 * match incoming addresses against. It is programmed via DMA 205 * from a memory region. 206 */ 207 #define MAXCAM 16 /* number of user entries in CAM */ 208 #define CDA_CAMDESC 4 /* # words i na descriptor */ 209 #define CDA_CAMEP 0 /* CAM Address Port 0 xx-xx-xx-xx-YY-YY */ 210 #define CDA_CAMAP0 1 /* CAM Address Port 1 xx-xx-YY-YY-xx-xx */ 211 #define CDA_CAMAP1 2 /* CAM Address Port 2 YY-YY-xx-xx-xx-xx */ 212 #define CDA_CAMAP2 3 213 #define CDA_ENABLE 64 /* mask enabling CAM entries */ 214 #define CDA_SIZE(sc) ((4*16 + 1) * ((sc->bitmode) ? 4 : 2)) 215 216 int snsetup __P((struct sn_softc *sc, u_int8_t *)); 217 void snintr __P((void *)); 218 void sn_get_enaddr __P((bus_space_tag_t t, bus_space_handle_t h, 219 bus_size_t o, u_char *dst)); 220
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