if_snvar.h revision 1.16
1 /* $NetBSD: if_snvar.h,v 1.16 2005/01/15 16:00:59 chs Exp $ */ 2 3 /* 4 * Copyright (c) 1991 Algorithmics Ltd (http://www.algor.co.uk) 5 * You may use, copy, and modify this program so long as you retain the 6 * copyright line. 7 */ 8 9 /* 10 * if_snvar.h -- National Semiconductor DP8393X (SONIC) NetBSD/mac68k vars 11 */ 12 13 /* 14 * Vendor types 15 */ 16 #define SN_VENDOR_UNKNOWN 0xff /* Unknown */ 17 #define SN_VENDOR_APPLE 0x00 /* Apple Computer/compatible */ 18 #define SN_VENDOR_DAYNA 0x01 /* Dayna/Kinetics EtherPort */ 19 #define SN_VENDOR_APPLE16 0x02 /* Apple Twisted Pair NB */ 20 #define SN_VENDOR_ASANTELC 0x09 /* Asante Macintosh LC Ethernet */ 21 22 /* 23 * Memory access macros. Since we handle SONIC in 16 bit mode (PB5X0) 24 * and 32 bit mode (everything else) using a single GENERIC kernel 25 * binary, all structures have to be accessed using macros which can 26 * adjust the offsets appropriately. 27 */ 28 #define SWO(m, a, o, x) (m ? (*(u_int32_t *)((u_int32_t *)(a) + (o)) = (x)) : \ 29 (*(u_int16_t *)((u_int16_t *)(a) + (o)) = (x))) 30 #define SRO(m, a, o) (m ? (*(u_int32_t *)((u_int32_t *)(a) + (o)) & 0xffff) : \ 31 (*(u_int16_t *)((u_int16_t *)(a) + (o)) & 0xffff)) 32 33 /* 34 * Register access macros. We use bus_space_* to talk to the Sonic 35 * registers. A mapping table is used in case a particular configuration 36 * hooked the regs up at non-word offsets. 37 */ 38 #define NIC_GET(sc, reg) (bus_space_read_2((sc)->sc_regt, \ 39 (sc)->sc_regh, \ 40 ((sc)->sc_reg_map[(reg)]))) 41 #define NIC_PUT(sc, reg, val) (bus_space_write_2((sc)->sc_regt, \ 42 (sc)->sc_regh, \ 43 ((sc)->sc_reg_map[reg]), \ 44 (val))) 45 46 #define SONIC_GETDMA(p) (u_int32_t)(kvtop((caddr_t)(p))) 47 48 #define SN_REGSIZE SN_NREGS*4 49 50 /* mac68k does not have any write buffers to flush... */ 51 #define wbflush() 52 53 /* 54 * buffer sizes in 32 bit mode 55 * 1 TXpkt is 4 hdr words + (3 * FRAGMAX) + 1 link word == 23 words == 92 bytes 56 * 57 * 1 RxPkt is 7 words == 28 bytes 58 * 1 Rda is 4 words == 16 bytes 59 * 60 * The CDA is 17 words == 68 bytes 61 * 62 * total space in page 0 = NTDA * 92 + NRRA * 16 + NRDA * 28 + 68 63 */ 64 65 #define NRBA 32 /* # receive buffers < NRRA */ 66 #define RBAMASK (NRBA-1) 67 #define NTDA 16 /* # transmit descriptors */ 68 #define NRRA 64 /* # receive resource descriptors */ 69 #define RRAMASK (NRRA-1) /* the reason why NRRA must be power of two */ 70 71 #define FCSSIZE 4 /* size of FCS appended to packets */ 72 73 /* 74 * maximum receive packet size plus 2 byte pad to make each 75 * one aligned. 4 byte slop (required for eobc) 76 */ 77 #define RBASIZE(sc) (sizeof(struct ether_header) + ETHERMTU + FCSSIZE + \ 78 ((sc)->bitmode ? 6 : 2)) 79 80 /* 81 * transmit buffer area 82 */ 83 #define TXBSIZE 1536 /* 6*2^8 -- the same size as the 8390 TXBUF */ 84 85 #define SN_NPAGES 2 + NRBA + (NTDA/2) 86 87 typedef struct mtd { 88 void *mtd_txp; 89 u_int32_t mtd_vtxp; 90 caddr_t mtd_buf; 91 u_int32_t mtd_vbuf; 92 struct mbuf *mtd_mbuf; 93 } mtd_t; 94 95 /* 96 * The sn_softc for Mac68k if_sn. 97 */ 98 typedef struct sn_softc { 99 struct device sc_dev; 100 struct ethercom sc_ethercom; 101 #define sc_if sc_ethercom.ec_if /* network visible interface */ 102 103 bus_space_tag_t sc_regt; 104 bus_space_handle_t sc_regh; 105 106 int bitmode; /* 32 bit mode == 1, 16 == 0 */ 107 bus_size_t sc_reg_map[SN_NREGS]; /* register offsets */ 108 109 u_int16_t snr_dcr; /* DCR for this instance */ 110 u_int16_t snr_dcr2; /* DCR2 for this instance */ 111 int slotno; /* Slot number */ 112 113 int sc_rramark; /* index into p_rra of wp */ 114 void *p_rra[NRRA]; /* RX resource descs */ 115 u_int32_t v_rra[NRRA]; /* DMA addresses of p_rra */ 116 u_int32_t v_rea; /* ptr to the end of the rra space */ 117 118 int sc_rxmark; /* current hw pos in rda ring */ 119 int sc_rdamark; /* current sw pos in rda ring */ 120 int sc_nrda; /* total number of RDAs */ 121 caddr_t p_rda; 122 u_int32_t v_rda; 123 124 caddr_t rbuf[NRBA]; 125 126 struct mtd mtda[NTDA]; 127 int mtd_hw; /* idx of first mtd given to hw */ 128 int mtd_prev; /* idx of last mtd given to hardware */ 129 int mtd_free; /* next free mtd to use */ 130 int mtd_tlinko; /* 131 * offset of tlink of last txp given 132 * to SONIC. Need to clear EOL on 133 * this word to add a desc. 134 */ 135 int mtd_pint; /* Counter to set TXP_PINT */ 136 137 void *p_cda; 138 u_int32_t v_cda; 139 140 unsigned char *space; 141 } sn_softc_t; 142 143 /* 144 * Accessing SONIC data structures and registers as 32 bit values 145 * makes code endianess independent. The SONIC is however always in 146 * bigendian mode so it is necessary to ensure that data structures shared 147 * between the CPU and the SONIC are always in bigendian order. 148 */ 149 150 /* 151 * Receive Resource Descriptor 152 * This structure describes the buffers into which packets 153 * will be received. Note that more than one packet may be 154 * packed into a single buffer if constraints permit. 155 */ 156 #define RXRSRC_PTRLO 0 /* buffer address LO */ 157 #define RXRSRC_PTRHI 1 /* buffer address HI */ 158 #define RXRSRC_WCLO 2 /* buffer size (16bit words) LO */ 159 #define RXRSRC_WCHI 3 /* buffer size (16bit words) HI */ 160 161 #define RXRSRC_SIZE(sc) (sc->bitmode ? (4 * 4) : (4 * 2)) 162 163 /* 164 * Receive Descriptor 165 * This structure holds information about packets received. 166 */ 167 #define RXPKT_STATUS 0 168 #define RXPKT_BYTEC 1 169 #define RXPKT_PTRLO 2 170 #define RXPKT_PTRHI 3 171 #define RXPKT_SEQNO 4 172 #define RXPKT_RLINK 5 173 #define RXPKT_INUSE 6 174 #define RXPKT_SIZE(sc) (sc->bitmode ? (7 * 4) : (7 * 2)) 175 176 #define RBASEQ(x) (((x)>>8)&0xff) 177 #define PSNSEQ(x) ((x) & 0xff) 178 179 /* 180 * Transmit Descriptor 181 * This structure holds information about packets to be transmitted. 182 */ 183 #define FRAGMAX 8 /* maximum number of fragments in a packet */ 184 185 #define TXP_STATUS 0 /* + transmitted packet status */ 186 #define TXP_CONFIG 1 /* transmission configuration */ 187 #define TXP_PKTSIZE 2 /* entire packet size in bytes */ 188 #define TXP_FRAGCNT 3 /* # fragments in packet */ 189 190 #define TXP_FRAGOFF 4 /* offset to first fragment */ 191 #define TXP_FRAGSIZE 3 /* size of each fragment desc */ 192 #define TXP_FPTRLO 0 /* ptr to packet fragment LO */ 193 #define TXP_FPTRHI 1 /* ptr to packet fragment HI */ 194 #define TXP_FSIZE 2 /* fragment size */ 195 196 #define TXP_WORDS TXP_FRAGOFF + (FRAGMAX*TXP_FRAGSIZE) + 1 /* 1 for tlink */ 197 #define TXP_SIZE(sc) ((sc->bitmode) ? (TXP_WORDS*4) : (TXP_WORDS*2)) 198 199 #define EOL 0x0001 /* end of list marker for link fields */ 200 201 /* 202 * CDA, the CAM descriptor area. The SONIC has a 16 entry CAM to 203 * match incoming addresses against. It is programmed via DMA 204 * from a memory region. 205 */ 206 #define MAXCAM 16 /* number of user entries in CAM */ 207 #define CDA_CAMDESC 4 /* # words i na descriptor */ 208 #define CDA_CAMEP 0 /* CAM Address Port 0 xx-xx-xx-xx-YY-YY */ 209 #define CDA_CAMAP0 1 /* CAM Address Port 1 xx-xx-YY-YY-xx-xx */ 210 #define CDA_CAMAP1 2 /* CAM Address Port 2 YY-YY-xx-xx-xx-xx */ 211 #define CDA_CAMAP2 3 212 #define CDA_ENABLE 64 /* mask enabling CAM entries */ 213 #define CDA_SIZE(sc) ((4*16 + 1) * ((sc->bitmode) ? 4 : 2)) 214 215 int snsetup(struct sn_softc *, u_int8_t *); 216 void snintr(void *); 217 void sn_get_enaddr(bus_space_tag_t, bus_space_handle_t, bus_size_t, 218 u_char *); 219
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