if_snvar.h revision 1.19
1 /* $NetBSD: if_snvar.h,v 1.19 2007/03/08 12:54:15 tsutsui Exp $ */ 2 3 /* 4 * Copyright (c) 1991 Algorithmics Ltd (http://www.algor.co.uk) 5 * You may use, copy, and modify this program so long as you retain the 6 * copyright line. 7 */ 8 9 /* 10 * if_snvar.h -- National Semiconductor DP8393X (SONIC) NetBSD/mac68k vars 11 */ 12 13 /* 14 * Vendor types 15 */ 16 #define SN_VENDOR_UNKNOWN 0xff /* Unknown */ 17 #define SN_VENDOR_APPLE 0x00 /* Apple Computer/compatible */ 18 #define SN_VENDOR_DAYNA 0x01 /* Dayna/Kinetics EtherPort */ 19 #define SN_VENDOR_APPLE16 0x02 /* Apple Twisted Pair NB */ 20 #define SN_VENDOR_ASANTELC 0x09 /* Asante Macintosh LC Ethernet */ 21 22 /* 23 * Memory access macros. Since we handle SONIC in 16 bit mode (PB5X0) 24 * and 32 bit mode (everything else) using a single GENERIC kernel 25 * binary, all structures have to be accessed using macros which can 26 * adjust the offsets appropriately. 27 */ 28 #define SWO(m, a, o, x) (m ? \ 29 (*(volatile u_int32_t *)((u_int32_t *)(a) + (o)) = (x)) : \ 30 (*(volatile u_int16_t *)((u_int16_t *)(a) + (o)) = (x))) 31 #define SRO(m, a, o) (m ? \ 32 (*(volatile u_int32_t *)((u_int32_t *)(a) + (o)) & 0xffff) : \ 33 (*(volatile u_int16_t *)((u_int16_t *)(a) + (o)) & 0xffff)) 34 35 /* 36 * Register access macros. We use bus_space_* to talk to the Sonic 37 * registers. A mapping table is used in case a particular configuration 38 * hooked the regs up at non-word offsets. 39 */ 40 #define NIC_GET(sc, reg) (bus_space_read_2((sc)->sc_regt, \ 41 (sc)->sc_regh, \ 42 ((sc)->sc_reg_map[(reg)]))) 43 #define NIC_PUT(sc, reg, val) (bus_space_write_2((sc)->sc_regt, \ 44 (sc)->sc_regh, \ 45 ((sc)->sc_reg_map[reg]), \ 46 (val))) 47 48 #define SONIC_GETDMA(p) (u_int32_t)(kvtop((void *)(p))) 49 50 #define SN_REGSIZE SN_NREGS*4 51 52 /* mac68k does not have any write buffers to flush... */ 53 #define wbflush() 54 55 /* 56 * buffer sizes in 32 bit mode 57 * 1 TXpkt is 4 hdr words + (3 * FRAGMAX) + 1 link word == 23 words == 92 bytes 58 * 59 * 1 RxPkt is 7 words == 28 bytes 60 * 1 Rda is 4 words == 16 bytes 61 * 62 * The CDA is 17 words == 68 bytes 63 * 64 * total space in page 0 = NTDA * 92 + NRRA * 16 + NRDA * 28 + 68 65 */ 66 67 #define NRBA 32 /* # receive buffers < NRRA */ 68 #define RBAMASK (NRBA-1) 69 #define NTDA 16 /* # transmit descriptors */ 70 #define NRRA 64 /* # receive resource descriptors */ 71 #define RRAMASK (NRRA-1) /* the reason why NRRA must be power of two */ 72 73 #define FCSSIZE 4 /* size of FCS appended to packets */ 74 75 /* 76 * maximum receive packet size plus 2 byte pad to make each 77 * one aligned. 4 byte slop (required for eobc) 78 */ 79 #define RBASIZE(sc) (sizeof(struct ether_header) + ETHERMTU + FCSSIZE + \ 80 ((sc)->bitmode ? 6 : 2)) 81 82 /* 83 * transmit buffer area 84 */ 85 #define TXBSIZE 1536 /* 6*2^8 -- the same size as the 8390 TXBUF */ 86 87 #define SN_NPAGES 2 + NRBA + (NTDA/2) 88 89 typedef struct mtd { 90 void *mtd_txp; 91 u_int32_t mtd_vtxp; 92 void * mtd_buf; 93 u_int32_t mtd_vbuf; 94 struct mbuf *mtd_mbuf; 95 } mtd_t; 96 97 /* 98 * The sn_softc for Mac68k if_sn. 99 */ 100 typedef struct sn_softc { 101 struct device sc_dev; 102 struct ethercom sc_ethercom; 103 #define sc_if sc_ethercom.ec_if /* network visible interface */ 104 105 bus_space_tag_t sc_regt; 106 bus_space_handle_t sc_regh; 107 108 int bitmode; /* 32 bit mode == 1, 16 == 0 */ 109 bus_size_t sc_reg_map[SN_NREGS]; /* register offsets */ 110 111 u_int16_t snr_dcr; /* DCR for this instance */ 112 u_int16_t snr_dcr2; /* DCR2 for this instance */ 113 int slotno; /* Slot number */ 114 115 int sc_rramark; /* index into p_rra of wp */ 116 void *p_rra[NRRA]; /* RX resource descs */ 117 u_int32_t v_rra[NRRA]; /* DMA addresses of p_rra */ 118 u_int32_t v_rea; /* ptr to the end of the rra space */ 119 120 int sc_rxmark; /* current hw pos in rda ring */ 121 int sc_rdamark; /* current sw pos in rda ring */ 122 int sc_nrda; /* total number of RDAs */ 123 void * p_rda; 124 u_int32_t v_rda; 125 126 void * rbuf[NRBA]; 127 128 struct mtd mtda[NTDA]; 129 int mtd_hw; /* idx of first mtd given to hw */ 130 int mtd_prev; /* idx of last mtd given to hardware */ 131 int mtd_free; /* next free mtd to use */ 132 int mtd_tlinko; /* 133 * offset of tlink of last txp given 134 * to SONIC. Need to clear EOL on 135 * this word to add a desc. 136 */ 137 int mtd_pint; /* Counter to set TXP_PINT */ 138 139 void *p_cda; 140 u_int32_t v_cda; 141 142 unsigned char *space; 143 } sn_softc_t; 144 145 /* 146 * Accessing SONIC data structures and registers as 32 bit values 147 * makes code endianess independent. The SONIC is however always in 148 * bigendian mode so it is necessary to ensure that data structures shared 149 * between the CPU and the SONIC are always in bigendian order. 150 */ 151 152 /* 153 * Receive Resource Descriptor 154 * This structure describes the buffers into which packets 155 * will be received. Note that more than one packet may be 156 * packed into a single buffer if constraints permit. 157 */ 158 #define RXRSRC_PTRLO 0 /* buffer address LO */ 159 #define RXRSRC_PTRHI 1 /* buffer address HI */ 160 #define RXRSRC_WCLO 2 /* buffer size (16bit words) LO */ 161 #define RXRSRC_WCHI 3 /* buffer size (16bit words) HI */ 162 163 #define RXRSRC_SIZE(sc) (sc->bitmode ? (4 * 4) : (4 * 2)) 164 165 /* 166 * Receive Descriptor 167 * This structure holds information about packets received. 168 */ 169 #define RXPKT_STATUS 0 170 #define RXPKT_BYTEC 1 171 #define RXPKT_PTRLO 2 172 #define RXPKT_PTRHI 3 173 #define RXPKT_SEQNO 4 174 #define RXPKT_RLINK 5 175 #define RXPKT_INUSE 6 176 #define RXPKT_SIZE(sc) (sc->bitmode ? (7 * 4) : (7 * 2)) 177 178 #define RBASEQ(x) (((x)>>8)&0xff) 179 #define PSNSEQ(x) ((x) & 0xff) 180 181 /* 182 * Transmit Descriptor 183 * This structure holds information about packets to be transmitted. 184 */ 185 #define FRAGMAX 8 /* maximum number of fragments in a packet */ 186 187 #define TXP_STATUS 0 /* + transmitted packet status */ 188 #define TXP_CONFIG 1 /* transmission configuration */ 189 #define TXP_PKTSIZE 2 /* entire packet size in bytes */ 190 #define TXP_FRAGCNT 3 /* # fragments in packet */ 191 192 #define TXP_FRAGOFF 4 /* offset to first fragment */ 193 #define TXP_FRAGSIZE 3 /* size of each fragment desc */ 194 #define TXP_FPTRLO 0 /* ptr to packet fragment LO */ 195 #define TXP_FPTRHI 1 /* ptr to packet fragment HI */ 196 #define TXP_FSIZE 2 /* fragment size */ 197 198 #define TXP_WORDS TXP_FRAGOFF + (FRAGMAX*TXP_FRAGSIZE) + 1 /* 1 for tlink */ 199 #define TXP_SIZE(sc) ((sc->bitmode) ? (TXP_WORDS*4) : (TXP_WORDS*2)) 200 201 #define EOL 0x0001 /* end of list marker for link fields */ 202 203 /* 204 * CDA, the CAM descriptor area. The SONIC has a 16 entry CAM to 205 * match incoming addresses against. It is programmed via DMA 206 * from a memory region. 207 */ 208 #define MAXCAM 16 /* number of user entries in CAM */ 209 #define CDA_CAMDESC 4 /* # words i na descriptor */ 210 #define CDA_CAMEP 0 /* CAM Address Port 0 xx-xx-xx-xx-YY-YY */ 211 #define CDA_CAMAP0 1 /* CAM Address Port 1 xx-xx-YY-YY-xx-xx */ 212 #define CDA_CAMAP1 2 /* CAM Address Port 2 YY-YY-xx-xx-xx-xx */ 213 #define CDA_CAMAP2 3 214 #define CDA_ENABLE 64 /* mask enabling CAM entries */ 215 #define CDA_SIZE(sc) ((4*16 + 1) * ((sc->bitmode) ? 4 : 2)) 216 217 int snsetup(struct sn_softc *, u_int8_t *); 218 void snintr(void *); 219 void sn_get_enaddr(bus_space_tag_t, bus_space_handle_t, bus_size_t, 220 u_char *); 221
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