mac68k5380.c revision 1.4 1 1.4 briggs /* $NetBSD: mac68k5380.c,v 1.4 1995/09/02 19:29:42 briggs Exp $ */
2 1.1 briggs
3 1.1 briggs /*
4 1.1 briggs * Copyright (c) 1995 Allen Briggs
5 1.1 briggs * All rights reserved.
6 1.1 briggs *
7 1.1 briggs * Redistribution and use in source and binary forms, with or without
8 1.1 briggs * modification, are permitted provided that the following conditions
9 1.1 briggs * are met:
10 1.1 briggs * 1. Redistributions of source code must retain the above copyright
11 1.1 briggs * notice, this list of conditions and the following disclaimer.
12 1.1 briggs * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 briggs * notice, this list of conditions and the following disclaimer in the
14 1.1 briggs * documentation and/or other materials provided with the distribution.
15 1.1 briggs * 3. All advertising materials mentioning features or use of this software
16 1.1 briggs * must display the following acknowledgement:
17 1.1 briggs * This product includes software developed by Allen Briggs
18 1.1 briggs * 4. The name of the author may not be used to endorse or promote products
19 1.1 briggs * derived from this software without specific prior written permission
20 1.1 briggs *
21 1.1 briggs * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 1.1 briggs * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 1.1 briggs * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 1.1 briggs * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 1.1 briggs * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 1.1 briggs * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 1.1 briggs * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 1.1 briggs * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 1.1 briggs * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 1.1 briggs * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 1.1 briggs *
32 1.1 briggs * Derived from atari5380.c for the mac68k port of NetBSD.
33 1.1 briggs *
34 1.1 briggs */
35 1.1 briggs
36 1.1 briggs #include <sys/param.h>
37 1.1 briggs #include <sys/systm.h>
38 1.1 briggs #include <sys/kernel.h>
39 1.1 briggs #include <sys/device.h>
40 1.1 briggs #include <sys/syslog.h>
41 1.1 briggs #include <sys/buf.h>
42 1.1 briggs #include <scsi/scsi_all.h>
43 1.1 briggs #include <scsi/scsi_message.h>
44 1.1 briggs #include <scsi/scsiconf.h>
45 1.1 briggs
46 1.1 briggs /*
47 1.1 briggs * Include the driver definitions
48 1.1 briggs */
49 1.1 briggs #include <atari/dev/ncr5380reg.h>
50 1.1 briggs
51 1.1 briggs #include <machine/stdarg.h>
52 1.1 briggs
53 1.1 briggs #include "../mac68k/via.h"
54 1.1 briggs
55 1.1 briggs /*
56 1.1 briggs * Set the various driver options
57 1.1 briggs */
58 1.1 briggs #define NREQ 18 /* Size of issue queue */
59 1.1 briggs #define AUTO_SENSE 1 /* Automatically issue a request-sense */
60 1.1 briggs
61 1.1 briggs #define DRNAME ncrscsi /* used in various prints */
62 1.1 briggs #undef DBG_SEL /* Show the selection process */
63 1.1 briggs #undef DBG_REQ /* Show enqueued/ready requests */
64 1.1 briggs #undef DBG_NOWRITE /* Do not allow writes to the targets */
65 1.1 briggs #undef DBG_PIO /* Show the polled-I/O process */
66 1.1 briggs #undef DBG_INF /* Show information transfer process */
67 1.1 briggs #define DBG_NOSTATIC /* No static functions, all in DDB trace*/
68 1.4 briggs #undef DBG_PID /* Keep track of driver */
69 1.1 briggs #undef REAL_DMA /* Use DMA if sensible */
70 1.1 briggs #define fair_to_keep_dma() 1
71 1.1 briggs #define claimed_dma() 1
72 1.1 briggs #define reconsider_dma()
73 1.1 briggs #define USE_PDMA 1 /* Use special pdma-transfer function */
74 1.1 briggs
75 1.1 briggs #define ENABLE_NCR5380(sc) cur_softc = sc;
76 1.1 briggs
77 1.1 briggs /*
78 1.1 briggs * softc of currently active controller (well, we only have one for now).
79 1.1 briggs */
80 1.1 briggs
81 1.1 briggs static struct ncr_softc *cur_softc;
82 1.1 briggs
83 1.1 briggs struct scsi_5380 {
84 1.1 briggs volatile u_char scsi_5380[8*16]; /* 8 regs, 1 every 16th byte. */
85 1.1 briggs };
86 1.1 briggs
87 1.1 briggs extern vm_offset_t SCSIBase;
88 1.1 briggs static volatile u_char *ncr = (volatile u_char *) 0x10000;
89 1.1 briggs static volatile u_char *ncr_5380_with_drq = (volatile u_char *) 0x6000;
90 1.1 briggs static volatile u_char *ncr_5380_without_drq = (volatile u_char *) 0x12000;
91 1.1 briggs
92 1.4 briggs static volatile u_char *scsi_enable = NULL;
93 1.4 briggs
94 1.1 briggs #define SCSI_5380 ((struct scsi_5380 *) ncr)
95 1.1 briggs #define GET_5380_REG(rnum) SCSI_5380->scsi_5380[((rnum)<<4)]
96 1.1 briggs #define SET_5380_REG(rnum,val) (SCSI_5380->scsi_5380[((rnum)<<4)] = (val))
97 1.1 briggs
98 1.4 briggs void ncr5380_irq_intr(void);
99 1.4 briggs void ncr5380_drq_intr(void);
100 1.4 briggs
101 1.1 briggs static __inline__ void
102 1.1 briggs scsi_clr_ipend()
103 1.1 briggs {
104 1.1 briggs int tmp;
105 1.1 briggs
106 1.1 briggs tmp = GET_5380_REG(NCR5380_IRCV);
107 1.1 briggs }
108 1.1 briggs
109 1.1 briggs extern __inline__ void
110 1.1 briggs scsi_ienable()
111 1.1 briggs {
112 1.1 briggs int s;
113 1.1 briggs
114 1.1 briggs s = splhigh();
115 1.4 briggs *scsi_enable = 0x80 | (V2IF_SCSIIRQ | V2IF_SCSIDRQ);
116 1.1 briggs splx(s);
117 1.1 briggs }
118 1.1 briggs
119 1.1 briggs extern __inline__ void
120 1.1 briggs scsi_idisable()
121 1.1 briggs {
122 1.1 briggs int s;
123 1.1 briggs
124 1.1 briggs s = splhigh();
125 1.4 briggs *scsi_enable = V2IF_SCSIIRQ | V2IF_SCSIDRQ;
126 1.1 briggs splx(s);
127 1.1 briggs }
128 1.1 briggs
129 1.1 briggs static void
130 1.1 briggs scsi_mach_init(sc)
131 1.1 briggs struct ncr_softc *sc;
132 1.1 briggs {
133 1.1 briggs static int initted = 0;
134 1.1 briggs
135 1.1 briggs if (initted++)
136 1.1 briggs panic("scsi_mach_init called again.\n");
137 1.1 briggs
138 1.1 briggs ncr = (volatile u_char *)
139 1.1 briggs (SCSIBase + (u_long) ncr);
140 1.1 briggs ncr_5380_with_drq = (volatile u_char *)
141 1.1 briggs (SCSIBase + (u_int) ncr_5380_with_drq);
142 1.1 briggs ncr_5380_without_drq = (volatile u_char *)
143 1.1 briggs (SCSIBase + (u_int) ncr_5380_without_drq);
144 1.4 briggs
145 1.4 briggs if (VIA2 == VIA2OFF)
146 1.4 briggs scsi_enable = Via1Base + VIA2 * 0x2000 + vIER;
147 1.4 briggs else
148 1.4 briggs scsi_enable = Via1Base + VIA2 * 0x2000 + rIER;
149 1.4 briggs
150 1.4 briggs mac68k_register_scsi_irq(ncr5380_irq_intr);
151 1.4 briggs mac68k_register_scsi_drq(ncr5380_drq_intr);
152 1.1 briggs }
153 1.1 briggs
154 1.1 briggs static int
155 1.1 briggs machine_match(pdp, cdp, auxp, cd)
156 1.1 briggs struct device *pdp;
157 1.1 briggs struct cfdata *cdp;
158 1.1 briggs void *auxp;
159 1.1 briggs struct cfdriver *cd;
160 1.1 briggs {
161 1.1 briggs if (matchbyname(pdp, cdp, auxp) == 0)
162 1.1 briggs return 0;
163 1.1 briggs if (!mac68k_machine.scsi80)
164 1.1 briggs return 0;
165 1.1 briggs if (cdp->cf_unit != 0)
166 1.1 briggs return 0;
167 1.1 briggs return 1;
168 1.1 briggs }
169 1.1 briggs
170 1.1 briggs #if USE_PDMA
171 1.4 briggs int pdma_5380_dir = 0;
172 1.1 briggs
173 1.4 briggs u_char *pending_5380_data;
174 1.4 briggs u_long pending_5380_count;
175 1.1 briggs
176 1.4 briggs /* #define DEBUG 1 Maybe we try with this off eventually. */
177 1.1 briggs #if DEBUG
178 1.1 briggs int pdma_5380_sends = 0;
179 1.2 briggs int pdma_5380_bytes = 0;
180 1.1 briggs
181 1.4 briggs char *pdma_5380_state="";
182 1.4 briggs
183 1.1 briggs void
184 1.1 briggs pdma_stat()
185 1.1 briggs {
186 1.2 briggs printf("PDMA SCSI: %d xfers completed for %d bytes, pending = %d.\n",
187 1.4 briggs pdma_5380_sends, pdma_5380_bytes);
188 1.4 briggs printf("pdma_5380_dir = %d.\n",
189 1.4 briggs pdma_5380_dir);
190 1.1 briggs printf("datap = 0x%x, remainder = %d.\n",
191 1.1 briggs pending_5380_data, pending_5380_count);
192 1.1 briggs printf("pdma_5380_state = %s.\n", pdma_5380_state);
193 1.1 briggs }
194 1.1 briggs #endif
195 1.1 briggs #endif
196 1.1 briggs
197 1.1 briggs void
198 1.2 briggs pdma_cleanup(void)
199 1.2 briggs {
200 1.2 briggs SC_REQ *reqp = connected;
201 1.2 briggs int bytes, s;
202 1.2 briggs
203 1.2 briggs s = splbio();
204 1.2 briggs
205 1.4 briggs pdma_5380_dir = 0;
206 1.2 briggs
207 1.2 briggs #if DEBUG
208 1.2 briggs pdma_5380_state = "in pdma_cleanup().";
209 1.2 briggs pdma_5380_sends++;
210 1.2 briggs pdma_5380_bytes+=(reqp->xdata_len - pending_5380_count);
211 1.2 briggs #endif
212 1.2 briggs
213 1.2 briggs /*
214 1.2 briggs * Update pointers.
215 1.2 briggs */
216 1.2 briggs reqp->xdata_ptr += reqp->xdata_len - pending_5380_count;
217 1.2 briggs reqp->xdata_len = pending_5380_count;
218 1.2 briggs
219 1.2 briggs /*
220 1.2 briggs * Reset DMA mode.
221 1.2 briggs */
222 1.2 briggs SET_5380_REG(NCR5380_MODE, GET_5380_REG(NCR5380_MODE) & ~SC_M_DMA);
223 1.2 briggs
224 1.2 briggs /*
225 1.2 briggs * Tell interrupt functions that DMA has ended.
226 1.2 briggs */
227 1.2 briggs reqp->dr_flag &= ~DRIVER_IN_DMA;
228 1.2 briggs
229 1.2 briggs SET_5380_REG(NCR5380_MODE, IMODE_BASE);
230 1.2 briggs SET_5380_REG(NCR5380_ICOM, 0);
231 1.2 briggs
232 1.2 briggs splx(s);
233 1.2 briggs
234 1.2 briggs /*
235 1.2 briggs * Back for more punishment.
236 1.2 briggs */
237 1.2 briggs run_main(cur_softc);
238 1.2 briggs }
239 1.2 briggs
240 1.4 briggs static __inline__ int
241 1.3 briggs scsi_main_irq()
242 1.1 briggs {
243 1.4 briggs if (pdma_5380_dir) {
244 1.1 briggs #if DEBUG
245 1.1 briggs pdma_5380_state = "got irq interrupt in xfer.";
246 1.1 briggs #endif
247 1.1 briggs /*
248 1.1 briggs * If Mr. IRQ isn't set one might wonder how we got
249 1.1 briggs * here. It does happen, though.
250 1.1 briggs */
251 1.1 briggs if (!(GET_5380_REG(NCR5380_DMSTAT) & SC_IRQ_SET)) {
252 1.3 briggs return 0;
253 1.1 briggs }
254 1.1 briggs /*
255 1.1 briggs * For a phase mis-match, ATN is a "don't care," IRQ is 1 and
256 1.1 briggs * all other bits in the Bus & Status Register are 0. Also,
257 1.1 briggs * the current SCSI Bus Status Register has a 1 for BSY and
258 1.1 briggs * REQ. Since we're just checking that this interrupt isn't a
259 1.1 briggs * reselection or a reset, we just check for either.
260 1.1 briggs */
261 1.1 briggs if ( ((GET_5380_REG(NCR5380_DMSTAT) & (0xff & ~SC_ATN_STAT))
262 1.1 briggs == SC_IRQ_SET)
263 1.1 briggs && (GET_5380_REG(NCR5380_IDSTAT) & (SC_S_BSY|SC_S_REQ))) {
264 1.2 briggs pdma_cleanup();
265 1.3 briggs return 1;
266 1.2 briggs } else {
267 1.2 briggs scsi_show();
268 1.2 briggs panic("Spurious interrupt during PDMA xfer.\n");
269 1.1 briggs }
270 1.3 briggs }
271 1.3 briggs return 0;
272 1.3 briggs }
273 1.3 briggs
274 1.3 briggs void
275 1.3 briggs ncr5380_irq_intr(void)
276 1.3 briggs {
277 1.3 briggs if (scsi_main_irq()) {
278 1.3 briggs return;
279 1.1 briggs }
280 1.1 briggs if (GET_5380_REG(NCR5380_DMSTAT) & SC_IRQ_SET) {
281 1.1 briggs scsi_idisable();
282 1.1 briggs ncr_ctrl_intr(cur_softc);
283 1.1 briggs }
284 1.1 briggs }
285 1.1 briggs
286 1.4 briggs #if USE_PDMA
287 1.4 briggs /*
288 1.4 briggs * Macroed for readability.
289 1.4 briggs */
290 1.4 briggs #define DONE ( (GET_5380_REG(NCR5380_DMSTAT) & SC_ACK_STAT) \
291 1.4 briggs || (GET_5380_REG(NCR5380_IDSTAT) & SC_S_REQ) )
292 1.4 briggs #endif
293 1.4 briggs
294 1.1 briggs void
295 1.1 briggs ncr5380_drq_intr(void)
296 1.1 briggs {
297 1.1 briggs #if USE_PDMA
298 1.4 briggs
299 1.1 briggs #if DEBUG
300 1.4 briggs pdma_5380_state = "got drq interrupt.";
301 1.1 briggs #endif
302 1.4 briggs if (pdma_5380_dir == 2) { /* Data In */
303 1.4 briggs /*
304 1.4 briggs * Can we "unroll" this any? I don't think so--in fact, I
305 1.4 briggs * question the safety of using long word transfers. The
306 1.4 briggs * device could theoretically disconnect at any time.
307 1.4 briggs * The long word xfer is controlled by the Mac's circuitry,
308 1.4 briggs * and we can't know how much it transferred if the device
309 1.4 briggs * decides to disconnect on us.
310 1.4 briggs * If it does disconnect in the middle of a long xfer, it
311 1.4 briggs * should get a bus error--we might be able to derive from
312 1.4 briggs * that bus error where the transaction stopped, but I
313 1.4 briggs * don't want to think about that...
314 1.4 briggs */
315 1.4 briggs while (GET_5380_REG(NCR5380_DMSTAT) & SC_DMA_REQ)
316 1.4 briggs if (pending_5380_count) {
317 1.4 briggs *pending_5380_data++ = *ncr_5380_with_drq;
318 1.4 briggs pending_5380_count --;
319 1.4 briggs } else {
320 1.4 briggs #if DEBUG
321 1.4 briggs pdma_5380_state = "done in xfer in.";
322 1.4 briggs #endif
323 1.4 briggs SET_5380_REG(NCR5380_MODE,
324 1.4 briggs GET_5380_REG(NCR5380_MODE) & ~SC_M_DMA);
325 1.4 briggs return;
326 1.4 briggs }
327 1.1 briggs #if DEBUG
328 1.4 briggs pdma_5380_state = "handled drq interrupt.";
329 1.1 briggs #endif
330 1.4 briggs return;
331 1.4 briggs } else if (pdma_5380_dir == 1) {
332 1.4 briggs /*
333 1.4 briggs * See comment on pdma_xfer_in(), above.
334 1.4 briggs */
335 1.4 briggs while (GET_5380_REG(NCR5380_DMSTAT) & SC_DMA_REQ)
336 1.4 briggs if (pending_5380_count) {
337 1.4 briggs *ncr_5380_with_drq = *pending_5380_data++;
338 1.4 briggs pending_5380_count --;
339 1.4 briggs } else {
340 1.2 briggs #if DEBUG
341 1.4 briggs pdma_5380_state = "done in xfer out--waiting.";
342 1.2 briggs #endif
343 1.4 briggs while (!DONE);
344 1.1 briggs #if DEBUG
345 1.4 briggs pdma_5380_state = "really done in xfer out.";
346 1.1 briggs #endif
347 1.4 briggs pdma_cleanup();
348 1.4 briggs return;
349 1.4 briggs }
350 1.1 briggs #if DEBUG
351 1.4 briggs } else {
352 1.4 briggs pdma_5380_state = "drq when out of phase.";
353 1.4 briggs return;
354 1.1 briggs #endif
355 1.4 briggs }
356 1.2 briggs #if DEBUG
357 1.2 briggs pdma_5380_state = "handled drq interrupt.";
358 1.2 briggs #endif
359 1.4 briggs #endif /* if USE_PDMA */
360 1.1 briggs }
361 1.1 briggs
362 1.4 briggs #if USE_PDMA
363 1.4 briggs
364 1.1 briggs #define SCSI_TIMEOUT_VAL 10000000
365 1.1 briggs
366 1.1 briggs static int
367 1.1 briggs transfer_pdma(phasep, data, count)
368 1.1 briggs u_char *phasep;
369 1.1 briggs u_char *data;
370 1.1 briggs u_long *count;
371 1.1 briggs {
372 1.1 briggs SC_REQ *reqp = connected;
373 1.1 briggs int len = *count, i, scsi_timeout = SCSI_TIMEOUT_VAL;
374 1.1 briggs int s, err;
375 1.1 briggs
376 1.4 briggs if (pdma_5380_dir) {
377 1.1 briggs panic("ncrscsi: transfer_pdma called when operation already "
378 1.1 briggs "pending.\n");
379 1.1 briggs }
380 1.1 briggs #if DEBUG
381 1.1 briggs pdma_5380_state = "in transfer_pdma.";
382 1.1 briggs #endif
383 1.1 briggs
384 1.1 briggs scsi_idisable();
385 1.1 briggs
386 1.2 briggs /*
387 1.2 briggs * Don't bother with PDMA for short transfers or if we can't sleep.
388 1.2 briggs */
389 1.2 briggs if ((reqp->dr_flag & DRIVER_NOINT) || (*count < 128)) {
390 1.1 briggs #if DEBUG
391 1.1 briggs pdma_5380_state = "using transfer_pio.";
392 1.1 briggs #endif
393 1.2 briggs transfer_pio(phasep, data, count);
394 1.2 briggs return -1;
395 1.1 briggs }
396 1.1 briggs
397 1.1 briggs /*
398 1.1 briggs * Match phases with target.
399 1.1 briggs */
400 1.1 briggs SET_5380_REG(NCR5380_TCOM, *phasep);
401 1.2 briggs
402 1.2 briggs /*
403 1.2 briggs * We are probably already at spl2(), so this is likely a no-op.
404 1.2 briggs * Paranoia.
405 1.2 briggs */
406 1.2 briggs s = splbio();
407 1.2 briggs
408 1.2 briggs /*
409 1.2 briggs * Clear pending interrupts.
410 1.2 briggs */
411 1.1 briggs scsi_clr_ipend();
412 1.1 briggs
413 1.1 briggs /*
414 1.1 briggs * Wait until target asserts BSY.
415 1.1 briggs */
416 1.1 briggs while ( ((GET_5380_REG(NCR5380_IDSTAT) & SC_S_BSY) == 0) &&
417 1.1 briggs ((GET_5380_REG(NCR5380_IDSTAT) & SC_S_BSY) == 0) &&
418 1.1 briggs ((GET_5380_REG(NCR5380_IDSTAT) & SC_S_BSY) == 0) &&
419 1.1 briggs (--scsi_timeout) );
420 1.1 briggs if (!scsi_timeout) {
421 1.1 briggs #if DIAGNOSTIC
422 1.1 briggs printf("scsi timeout: waiting for BSY in %s.\n",
423 1.1 briggs (pdma_5380_dir == 1) ? "pdma_out" : "pdma_in");
424 1.1 briggs #endif
425 1.1 briggs goto scsi_timeout_error;
426 1.1 briggs }
427 1.1 briggs
428 1.1 briggs /*
429 1.2 briggs * Tell the driver that we're in DMA mode.
430 1.2 briggs */
431 1.2 briggs reqp->dr_flag |= DRIVER_IN_DMA;
432 1.2 briggs
433 1.2 briggs /*
434 1.1 briggs * Set DMA mode and assert data bus.
435 1.1 briggs */
436 1.1 briggs SET_5380_REG(NCR5380_MODE, GET_5380_REG(NCR5380_MODE) | SC_M_DMA);
437 1.1 briggs SET_5380_REG(NCR5380_ICOM, GET_5380_REG(NCR5380_ICOM) | SC_ADTB);
438 1.1 briggs
439 1.1 briggs /*
440 1.4 briggs * Load transfer values for DRQ interrupt handlers.
441 1.1 briggs */
442 1.4 briggs pending_5380_data = data;
443 1.1 briggs pending_5380_count = len;
444 1.1 briggs
445 1.1 briggs #if DEBUG
446 1.1 briggs pdma_5380_state = "wait for interrupt.";
447 1.1 briggs #endif
448 1.1 briggs
449 1.1 briggs /*
450 1.1 briggs * Set the transfer function to be called on DRQ interrupts.
451 1.2 briggs * And note that we're waiting.
452 1.1 briggs */
453 1.4 briggs switch (*phasep) {
454 1.4 briggs default:
455 1.4 briggs panic("Unexpected phase in transfer_pdma.\n");
456 1.4 briggs case PH_DATAOUT:
457 1.4 briggs pdma_5380_dir = 1;
458 1.4 briggs break;
459 1.4 briggs case PH_DATAIN:
460 1.4 briggs pdma_5380_dir = 2;
461 1.4 briggs break;
462 1.4 briggs }
463 1.1 briggs
464 1.1 briggs /*
465 1.1 briggs * Initiate the DMA transaction--sending or receiving.
466 1.1 briggs */
467 1.1 briggs if (pdma_5380_dir == 1) {
468 1.1 briggs SET_5380_REG(NCR5380_DMSTAT, 0);
469 1.1 briggs } else {
470 1.1 briggs SET_5380_REG(NCR5380_IRCV, 0);
471 1.1 briggs }
472 1.1 briggs
473 1.1 briggs /*
474 1.1 briggs * Now that we're set up, enable interrupts and drop processor
475 1.2 briggs * priority back down.
476 1.1 briggs */
477 1.1 briggs scsi_ienable();
478 1.1 briggs splx(s);
479 1.2 briggs return 0;
480 1.1 briggs
481 1.1 briggs scsi_timeout_error:
482 1.1 briggs /*
483 1.1 briggs * Clear the DMA mode.
484 1.1 briggs */
485 1.1 briggs SET_5380_REG(NCR5380_MODE, GET_5380_REG(NCR5380_MODE) & ~SC_M_DMA);
486 1.1 briggs return -1;
487 1.1 briggs }
488 1.1 briggs #endif /* if USE_PDMA */
489 1.1 briggs
490 1.1 briggs /* Include general routines. */
491 1.1 briggs #include <atari/dev/ncr5380.c>
492