mac68k5380.c revision 1.6 1 /* $NetBSD: mac68k5380.c,v 1.6 1995/09/04 05:07:16 briggs Exp $ */
2
3 /*
4 * Copyright (c) 1995 Allen Briggs
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Allen Briggs
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * Derived from atari5380.c for the mac68k port of NetBSD.
33 *
34 */
35
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/kernel.h>
39 #include <sys/device.h>
40 #include <sys/syslog.h>
41 #include <sys/buf.h>
42 #include <scsi/scsi_all.h>
43 #include <scsi/scsi_message.h>
44 #include <scsi/scsiconf.h>
45
46 /*
47 * Include the driver definitions
48 */
49 #include <mac68k/dev/ncr5380reg.h>
50
51 #include <machine/stdarg.h>
52
53 #include "../mac68k/via.h"
54
55 /*
56 * Set the various driver options
57 */
58 #define NREQ 18 /* Size of issue queue */
59 #define AUTO_SENSE 1 /* Automatically issue a request-sense */
60
61 #define DRNAME ncrscsi /* used in various prints */
62 #undef DBG_SEL /* Show the selection process */
63 #undef DBG_REQ /* Show enqueued/ready requests */
64 #undef DBG_NOWRITE /* Do not allow writes to the targets */
65 #undef DBG_PIO /* Show the polled-I/O process */
66 #undef DBG_INF /* Show information transfer process */
67 #define DBG_NOSTATIC /* No static functions, all in DDB trace*/
68 #undef DBG_PID /* Keep track of driver */
69 #undef REAL_DMA /* Use DMA if sensible */
70 #define fair_to_keep_dma() 1
71 #define claimed_dma() 1
72 #define reconsider_dma()
73 #define USE_PDMA 1 /* Use special pdma-transfer function */
74
75 #define ENABLE_NCR5380(sc) cur_softc = sc;
76
77 /*
78 * softc of currently active controller (well, we only have one for now).
79 */
80
81 static struct ncr_softc *cur_softc;
82
83 struct scsi_5380 {
84 volatile u_char scsi_5380[8*16]; /* 8 regs, 1 every 16th byte. */
85 };
86
87 extern vm_offset_t SCSIBase;
88 static volatile u_char *ncr = (volatile u_char *) 0x10000;
89 static volatile u_char *ncr_5380_with_drq = (volatile u_char *) 0x6000;
90 static volatile u_char *ncr_5380_without_drq = (volatile u_char *) 0x12000;
91
92 static volatile u_char *scsi_enable = NULL;
93
94 #define SCSI_5380 ((struct scsi_5380 *) ncr)
95 #define GET_5380_REG(rnum) SCSI_5380->scsi_5380[((rnum)<<4)]
96 #define SET_5380_REG(rnum,val) (SCSI_5380->scsi_5380[((rnum)<<4)] = (val))
97
98 void ncr5380_irq_intr(void *);
99 void ncr5380_drq_intr(void *);
100
101 static __inline__ void
102 scsi_clr_ipend()
103 {
104 int tmp;
105
106 tmp = GET_5380_REG(NCR5380_IRCV);
107 }
108
109 extern __inline__ void
110 scsi_ienable()
111 {
112 int s;
113
114 s = splhigh();
115 *scsi_enable = 0x80 | (V2IF_SCSIIRQ | V2IF_SCSIDRQ);
116 splx(s);
117 }
118
119 extern __inline__ void
120 scsi_idisable()
121 {
122 int s;
123
124 s = splhigh();
125 *scsi_enable = V2IF_SCSIIRQ | V2IF_SCSIDRQ;
126 splx(s);
127 }
128
129 static void
130 scsi_mach_init(sc)
131 struct ncr_softc *sc;
132 {
133 static int initted = 0;
134
135 if (initted++)
136 panic("scsi_mach_init called again.\n");
137
138 ncr = (volatile u_char *)
139 (SCSIBase + (u_long) ncr);
140 ncr_5380_with_drq = (volatile u_char *)
141 (SCSIBase + (u_int) ncr_5380_with_drq);
142 ncr_5380_without_drq = (volatile u_char *)
143 (SCSIBase + (u_int) ncr_5380_without_drq);
144
145 if (VIA2 == VIA2OFF)
146 scsi_enable = Via1Base + VIA2 * 0x2000 + vIER;
147 else
148 scsi_enable = Via1Base + VIA2 * 0x2000 + rIER;
149
150 mac68k_register_scsi_irq(ncr5380_irq_intr, sc);
151 mac68k_register_scsi_drq(ncr5380_drq_intr, sc);
152 }
153
154 static int
155 machine_match(pdp, cdp, auxp, cd)
156 struct device *pdp;
157 struct cfdata *cdp;
158 void *auxp;
159 struct cfdriver *cd;
160 {
161 if (matchbyname(pdp, cdp, auxp) == 0)
162 return 0;
163 if (!mac68k_machine.scsi80)
164 return 0;
165 if (cdp->cf_unit != 0)
166 return 0;
167 return 1;
168 }
169
170 #if USE_PDMA
171 int pdma_5380_dir = 0;
172
173 u_char *pending_5380_data;
174 u_long pending_5380_count;
175
176 /* #define DEBUG 1 Maybe we try with this off eventually. */
177 #if DEBUG
178 int pdma_5380_sends = 0;
179 int pdma_5380_bytes = 0;
180
181 char *pdma_5380_state="";
182
183 void
184 pdma_stat()
185 {
186 printf("PDMA SCSI: %d xfers completed for %d bytes, pending = %d.\n",
187 pdma_5380_sends, pdma_5380_bytes);
188 printf("pdma_5380_dir = %d.\n",
189 pdma_5380_dir);
190 printf("datap = 0x%x, remainder = %d.\n",
191 pending_5380_data, pending_5380_count);
192 printf("pdma_5380_state = %s.\n", pdma_5380_state);
193 }
194 #endif
195 #endif
196
197 void
198 pdma_cleanup(void)
199 {
200 SC_REQ *reqp = connected;
201 int bytes, s;
202
203 s = splbio();
204
205 pdma_5380_dir = 0;
206
207 #if DEBUG
208 pdma_5380_state = "in pdma_cleanup().";
209 pdma_5380_sends++;
210 pdma_5380_bytes+=(reqp->xdata_len - pending_5380_count);
211 #endif
212
213 /*
214 * Update pointers.
215 */
216 reqp->xdata_ptr += reqp->xdata_len - pending_5380_count;
217 reqp->xdata_len = pending_5380_count;
218
219 /*
220 * Reset DMA mode.
221 */
222 SET_5380_REG(NCR5380_MODE, GET_5380_REG(NCR5380_MODE) & ~SC_M_DMA);
223
224 /*
225 * Tell interrupt functions that DMA has ended.
226 */
227 reqp->dr_flag &= ~DRIVER_IN_DMA;
228
229 SET_5380_REG(NCR5380_MODE, IMODE_BASE);
230 SET_5380_REG(NCR5380_ICOM, 0);
231
232 splx(s);
233
234 /*
235 * Back for more punishment.
236 */
237 run_main(cur_softc);
238 }
239
240 static __inline__ int
241 scsi_main_irq()
242 {
243 if (pdma_5380_dir) {
244 #if DEBUG
245 pdma_5380_state = "got irq interrupt in xfer.";
246 #endif
247 /*
248 * If Mr. IRQ isn't set one might wonder how we got
249 * here. It does happen, though.
250 */
251 if (!(GET_5380_REG(NCR5380_DMSTAT) & SC_IRQ_SET)) {
252 return 0;
253 }
254 /*
255 * For a phase mis-match, ATN is a "don't care," IRQ is 1 and
256 * all other bits in the Bus & Status Register are 0. Also,
257 * the current SCSI Bus Status Register has a 1 for BSY and
258 * REQ. Since we're just checking that this interrupt isn't a
259 * reselection or a reset, we just check for either.
260 */
261 if ( ((GET_5380_REG(NCR5380_DMSTAT) & (0xff & ~SC_ATN_STAT))
262 == SC_IRQ_SET)
263 && (GET_5380_REG(NCR5380_IDSTAT) & (SC_S_BSY|SC_S_REQ))) {
264 pdma_cleanup();
265 return 1;
266 } else {
267 scsi_show();
268 panic("Spurious interrupt during PDMA xfer.\n");
269 }
270 }
271 return 0;
272 }
273
274 void
275 ncr5380_irq_intr(p)
276 void *p;
277 {
278 struct ncr_softc *sc = p;
279
280 if (scsi_main_irq()) {
281 return;
282 }
283 if (GET_5380_REG(NCR5380_DMSTAT) & SC_IRQ_SET) {
284 scsi_idisable();
285 ncr_ctrl_intr(cur_softc);
286 }
287 }
288
289 #if USE_PDMA
290 /*
291 * Macroed for readability.
292 */
293 #define DONE ( (GET_5380_REG(NCR5380_DMSTAT) & SC_ACK_STAT) \
294 || (GET_5380_REG(NCR5380_IDSTAT) & SC_S_REQ) )
295 #endif
296
297 void
298 ncr5380_drq_intr(p)
299 void *p;
300 {
301 struct ncr_softc *sc = p;
302 #if USE_PDMA
303
304 #if DEBUG
305 pdma_5380_state = "got drq interrupt.";
306 #endif
307 if (pdma_5380_dir == 2) { /* Data In */
308 /*
309 * Can we "unroll" this any? I don't think so--in fact, I
310 * question the safety of using long word transfers. The
311 * device could theoretically disconnect at any time.
312 * The long word xfer is controlled by the Mac's circuitry,
313 * and we can't know how much it transferred if the device
314 * decides to disconnect on us.
315 * If it does disconnect in the middle of a long xfer, it
316 * should get a bus error--we might be able to derive from
317 * that bus error where the transaction stopped, but I
318 * don't want to think about that...
319 */
320 while (GET_5380_REG(NCR5380_DMSTAT) & SC_DMA_REQ)
321 if (pending_5380_count) {
322 *pending_5380_data++ = *ncr_5380_with_drq;
323 pending_5380_count --;
324 } else {
325 #if DEBUG
326 pdma_5380_state = "done in xfer in.";
327 #endif
328 SET_5380_REG(NCR5380_MODE,
329 GET_5380_REG(NCR5380_MODE) & ~SC_M_DMA);
330 return;
331 }
332 #if DEBUG
333 pdma_5380_state = "handled drq interrupt.";
334 #endif
335 return;
336 } else if (pdma_5380_dir == 1) {
337 /*
338 * See comment on pdma_xfer_in(), above.
339 */
340 while (GET_5380_REG(NCR5380_DMSTAT) & SC_DMA_REQ)
341 if (pending_5380_count) {
342 *ncr_5380_with_drq = *pending_5380_data++;
343 pending_5380_count --;
344 } else {
345 #if DEBUG
346 pdma_5380_state = "done in xfer out--waiting.";
347 #endif
348 while (!DONE);
349 #if DEBUG
350 pdma_5380_state = "really done in xfer out.";
351 #endif
352 pdma_cleanup();
353 return;
354 }
355 #if DEBUG
356 } else {
357 pdma_5380_state = "drq when out of phase.";
358 return;
359 #endif
360 }
361 #if DEBUG
362 pdma_5380_state = "handled drq interrupt.";
363 #endif
364 #endif /* if USE_PDMA */
365 }
366
367 #if USE_PDMA
368
369 #define SCSI_TIMEOUT_VAL 10000000
370
371 static int
372 transfer_pdma(phasep, data, count)
373 u_char *phasep;
374 u_char *data;
375 u_long *count;
376 {
377 SC_REQ *reqp = connected;
378 int len = *count, i, scsi_timeout = SCSI_TIMEOUT_VAL;
379 int s, err;
380
381 if (pdma_5380_dir) {
382 panic("ncrscsi: transfer_pdma called when operation already "
383 "pending.\n");
384 }
385 #if DEBUG
386 pdma_5380_state = "in transfer_pdma.";
387 #endif
388
389 scsi_idisable();
390
391 /*
392 * Don't bother with PDMA for short transfers or if we can't sleep.
393 */
394 if ((reqp->dr_flag & DRIVER_NOINT) || (*count < 128)) {
395 #if DEBUG
396 pdma_5380_state = "using transfer_pio.";
397 #endif
398 transfer_pio(phasep, data, count);
399 return -1;
400 }
401
402 /*
403 * Match phases with target.
404 */
405 SET_5380_REG(NCR5380_TCOM, *phasep);
406
407 /*
408 * We are probably already at spl2(), so this is likely a no-op.
409 * Paranoia.
410 */
411 s = splbio();
412
413 /*
414 * Clear pending interrupts.
415 */
416 scsi_clr_ipend();
417
418 /*
419 * Wait until target asserts BSY.
420 */
421 while ( ((GET_5380_REG(NCR5380_IDSTAT) & SC_S_BSY) == 0) &&
422 ((GET_5380_REG(NCR5380_IDSTAT) & SC_S_BSY) == 0) &&
423 ((GET_5380_REG(NCR5380_IDSTAT) & SC_S_BSY) == 0) &&
424 (--scsi_timeout) );
425 if (!scsi_timeout) {
426 #if DIAGNOSTIC
427 printf("scsi timeout: waiting for BSY in %s.\n",
428 (pdma_5380_dir == 1) ? "pdma_out" : "pdma_in");
429 #endif
430 goto scsi_timeout_error;
431 }
432
433 /*
434 * Tell the driver that we're in DMA mode.
435 */
436 reqp->dr_flag |= DRIVER_IN_DMA;
437
438 /*
439 * Set DMA mode and assert data bus.
440 */
441 SET_5380_REG(NCR5380_MODE, GET_5380_REG(NCR5380_MODE) | SC_M_DMA);
442 SET_5380_REG(NCR5380_ICOM, GET_5380_REG(NCR5380_ICOM) | SC_ADTB);
443
444 /*
445 * Load transfer values for DRQ interrupt handlers.
446 */
447 pending_5380_data = data;
448 pending_5380_count = len;
449
450 #if DEBUG
451 pdma_5380_state = "wait for interrupt.";
452 #endif
453
454 /*
455 * Set the transfer function to be called on DRQ interrupts.
456 * And note that we're waiting.
457 */
458 switch (*phasep) {
459 default:
460 panic("Unexpected phase in transfer_pdma.\n");
461 case PH_DATAOUT:
462 pdma_5380_dir = 1;
463 break;
464 case PH_DATAIN:
465 pdma_5380_dir = 2;
466 break;
467 }
468
469 /*
470 * Initiate the DMA transaction--sending or receiving.
471 */
472 if (pdma_5380_dir == 1) {
473 SET_5380_REG(NCR5380_DMSTAT, 0);
474 } else {
475 SET_5380_REG(NCR5380_IRCV, 0);
476 }
477
478 /*
479 * Now that we're set up, enable interrupts and drop processor
480 * priority back down.
481 */
482 scsi_ienable();
483 splx(s);
484 return 0;
485
486 scsi_timeout_error:
487 /*
488 * Clear the DMA mode.
489 */
490 SET_5380_REG(NCR5380_MODE, GET_5380_REG(NCR5380_MODE) & ~SC_M_DMA);
491 return -1;
492 }
493 #endif /* if USE_PDMA */
494
495 /* Include general routines. */
496 #include <mac68k/dev/ncr5380.c>
497