bus.h revision 1.28 1 1.28 skrll /* $NetBSD: bus.h,v 1.28 2019/09/23 16:17:56 skrll Exp $ */
2 1.7 thorpej
3 1.7 thorpej /*-
4 1.9 scottr * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
5 1.7 thorpej * All rights reserved.
6 1.7 thorpej *
7 1.7 thorpej * This code is derived from software contributed to The NetBSD Foundation
8 1.7 thorpej * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.7 thorpej * NASA Ames Research Center.
10 1.7 thorpej *
11 1.7 thorpej * Redistribution and use in source and binary forms, with or without
12 1.7 thorpej * modification, are permitted provided that the following conditions
13 1.7 thorpej * are met:
14 1.7 thorpej * 1. Redistributions of source code must retain the above copyright
15 1.7 thorpej * notice, this list of conditions and the following disclaimer.
16 1.7 thorpej * 2. Redistributions in binary form must reproduce the above copyright
17 1.7 thorpej * notice, this list of conditions and the following disclaimer in the
18 1.7 thorpej * documentation and/or other materials provided with the distribution.
19 1.7 thorpej *
20 1.7 thorpej * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 1.7 thorpej * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 1.7 thorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 1.7 thorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 1.7 thorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 1.7 thorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 1.7 thorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 1.7 thorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 1.7 thorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 1.7 thorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 1.7 thorpej * POSSIBILITY OF SUCH DAMAGE.
31 1.7 thorpej */
32 1.1 scottr
33 1.1 scottr /*
34 1.5 scottr * Copyright (C) 1997 Scott Reynolds. All rights reserved.
35 1.1 scottr *
36 1.1 scottr * Redistribution and use in source and binary forms, with or without
37 1.1 scottr * modification, are permitted provided that the following conditions
38 1.1 scottr * are met:
39 1.1 scottr * 1. Redistributions of source code must retain the above copyright
40 1.1 scottr * notice, this list of conditions and the following disclaimer.
41 1.1 scottr * 2. Redistributions in binary form must reproduce the above copyright
42 1.1 scottr * notice, this list of conditions and the following disclaimer in the
43 1.1 scottr * documentation and/or other materials provided with the distribution.
44 1.8 scottr * 3. The name of the author may not be used to endorse or promote products
45 1.1 scottr * derived from this software without specific prior written permission
46 1.1 scottr *
47 1.1 scottr * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
48 1.1 scottr * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
49 1.1 scottr * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
50 1.1 scottr * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
51 1.1 scottr * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
52 1.1 scottr * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
53 1.1 scottr * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
54 1.1 scottr * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
55 1.1 scottr * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
56 1.1 scottr * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
57 1.1 scottr */
58 1.1 scottr
59 1.1 scottr #ifndef _MAC68K_BUS_H_
60 1.1 scottr #define _MAC68K_BUS_H_
61 1.1 scottr
62 1.1 scottr /*
63 1.1 scottr * Value for the mac68k bus space tag, not to be used directly by MI code.
64 1.1 scottr */
65 1.1 scottr #define MAC68K_BUS_SPACE_MEM 0 /* space is mem space */
66 1.18 briggs
67 1.18 briggs #define __BUS_SPACE_HAS_STREAM_METHODS 1
68 1.1 scottr
69 1.1 scottr /*
70 1.1 scottr * Bus address and size types
71 1.1 scottr */
72 1.1 scottr typedef u_long bus_addr_t;
73 1.1 scottr typedef u_long bus_size_t;
74 1.1 scottr
75 1.28 skrll #define PRIxBUSADDR "lx"
76 1.28 skrll #define PRIxBUSSIZE "lx"
77 1.28 skrll #define PRIuBUSSIZE "lu"
78 1.1 scottr /*
79 1.1 scottr * Access methods for bus resources and address space.
80 1.1 scottr */
81 1.17 briggs #define BSH_T struct bus_space_handle_s
82 1.2 scottr typedef int bus_space_tag_t;
83 1.14 briggs typedef struct bus_space_handle_s {
84 1.14 briggs u_long base;
85 1.14 briggs int swapped;
86 1.14 briggs int stride;
87 1.28 skrll
88 1.21 chs u_int8_t (*bsr1)(bus_space_tag_t, BSH_T *, bus_size_t);
89 1.21 chs u_int16_t (*bsr2)(bus_space_tag_t, BSH_T *, bus_size_t);
90 1.21 chs u_int32_t (*bsr4)(bus_space_tag_t, BSH_T *, bus_size_t);
91 1.21 chs u_int8_t (*bsrs1)(bus_space_tag_t, BSH_T *, bus_size_t);
92 1.21 chs u_int16_t (*bsrs2)(bus_space_tag_t, BSH_T *, bus_size_t);
93 1.21 chs u_int32_t (*bsrs4)(bus_space_tag_t, BSH_T *, bus_size_t);
94 1.21 chs void (*bsrm1)(bus_space_tag_t, BSH_T *, bus_size_t,
95 1.21 chs u_int8_t *, size_t);
96 1.21 chs void (*bsrm2)(bus_space_tag_t, BSH_T *, bus_size_t,
97 1.21 chs u_int16_t *, size_t);
98 1.21 chs void (*bsrm4)(bus_space_tag_t, BSH_T *, bus_size_t,
99 1.21 chs u_int32_t *, size_t);
100 1.21 chs void (*bsrms1)(bus_space_tag_t, BSH_T *, bus_size_t,
101 1.21 chs u_int8_t *, size_t);
102 1.21 chs void (*bsrms2)(bus_space_tag_t, BSH_T *, bus_size_t,
103 1.21 chs u_int16_t *, size_t);
104 1.21 chs void (*bsrms4)(bus_space_tag_t, BSH_T *, bus_size_t,
105 1.21 chs u_int32_t *, size_t);
106 1.21 chs void (*bsrr1)(bus_space_tag_t, BSH_T *, bus_size_t,
107 1.21 chs u_int8_t *, size_t);
108 1.21 chs void (*bsrr2)(bus_space_tag_t, BSH_T *, bus_size_t,
109 1.21 chs u_int16_t *, size_t);
110 1.21 chs void (*bsrr4)(bus_space_tag_t, BSH_T *, bus_size_t,
111 1.21 chs u_int32_t *, size_t);
112 1.21 chs void (*bsrrs1)(bus_space_tag_t, BSH_T *, bus_size_t,
113 1.21 chs u_int8_t *, size_t);
114 1.21 chs void (*bsrrs2)(bus_space_tag_t, BSH_T *, bus_size_t,
115 1.21 chs u_int16_t *, size_t);
116 1.21 chs void (*bsrrs4)(bus_space_tag_t, BSH_T *, bus_size_t,
117 1.21 chs u_int32_t *, size_t);
118 1.21 chs void (*bsw1)(bus_space_tag_t, BSH_T *, bus_size_t, u_int8_t);
119 1.21 chs void (*bsw2)(bus_space_tag_t, BSH_T *, bus_size_t,
120 1.21 chs u_int16_t);
121 1.21 chs void (*bsw4)(bus_space_tag_t, BSH_T *, bus_size_t,
122 1.21 chs u_int32_t);
123 1.21 chs void (*bsws1)(bus_space_tag_t, BSH_T *, bus_size_t,
124 1.21 chs u_int8_t);
125 1.21 chs void (*bsws2)(bus_space_tag_t, BSH_T *, bus_size_t,
126 1.21 chs u_int16_t);
127 1.21 chs void (*bsws4)(bus_space_tag_t, BSH_T *, bus_size_t,
128 1.21 chs u_int32_t);
129 1.21 chs void (*bswm1)(bus_space_tag_t, BSH_T *, bus_size_t,
130 1.21 chs const u_int8_t *, size_t);
131 1.21 chs void (*bswm2)(bus_space_tag_t, BSH_T *, bus_size_t,
132 1.21 chs const u_int16_t *, size_t);
133 1.21 chs void (*bswm4)(bus_space_tag_t, BSH_T *, bus_size_t,
134 1.21 chs const u_int32_t *, size_t);
135 1.21 chs void (*bswms1)(bus_space_tag_t, BSH_T *, bus_size_t,
136 1.21 chs const u_int8_t *, size_t);
137 1.21 chs void (*bswms2)(bus_space_tag_t, BSH_T *, bus_size_t,
138 1.21 chs const u_int16_t *, size_t);
139 1.21 chs void (*bswms4)(bus_space_tag_t, BSH_T *, bus_size_t,
140 1.21 chs const u_int32_t *, size_t);
141 1.21 chs void (*bswr1)(bus_space_tag_t, BSH_T *, bus_size_t,
142 1.21 chs const u_int8_t *, size_t);
143 1.21 chs void (*bswr2)(bus_space_tag_t, BSH_T *, bus_size_t,
144 1.21 chs const u_int16_t *, size_t);
145 1.21 chs void (*bswr4)(bus_space_tag_t, BSH_T *, bus_size_t,
146 1.21 chs const u_int32_t *, size_t);
147 1.21 chs void (*bswrs1)(bus_space_tag_t, BSH_T *, bus_size_t,
148 1.21 chs const u_int8_t *, size_t);
149 1.21 chs void (*bswrs2)(bus_space_tag_t, BSH_T *, bus_size_t,
150 1.21 chs const u_int16_t *, size_t);
151 1.21 chs void (*bswrs4)(bus_space_tag_t, BSH_T *, bus_size_t,
152 1.21 chs const u_int32_t *, size_t);
153 1.21 chs void (*bssm1)(bus_space_tag_t, BSH_T *, bus_size_t,
154 1.21 chs u_int8_t v, size_t);
155 1.21 chs void (*bssm2)(bus_space_tag_t, BSH_T *, bus_size_t,
156 1.21 chs u_int16_t v, size_t);
157 1.21 chs void (*bssm4)(bus_space_tag_t, BSH_T *, bus_size_t,
158 1.21 chs u_int32_t v, size_t);
159 1.21 chs void (*bssr1)(bus_space_tag_t, BSH_T *, bus_size_t,
160 1.21 chs u_int8_t v, size_t);
161 1.21 chs void (*bssr2)(bus_space_tag_t, BSH_T *, bus_size_t,
162 1.21 chs u_int16_t v, size_t);
163 1.21 chs void (*bssr4)(bus_space_tag_t, BSH_T *, bus_size_t,
164 1.21 chs u_int32_t v, size_t);
165 1.14 briggs } bus_space_handle_t;
166 1.17 briggs #undef BSH_T
167 1.14 briggs
168 1.21 chs void mac68k_bus_space_handle_swapped(bus_space_tag_t,
169 1.21 chs bus_space_handle_t *);
170 1.21 chs void mac68k_bus_space_handle_set_stride(bus_space_tag_t,
171 1.21 chs bus_space_handle_t *, int);
172 1.1 scottr
173 1.9 scottr /*
174 1.21 chs * int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
175 1.21 chs * bus_size_t size, int flags, bus_space_handle_t *bshp);
176 1.9 scottr *
177 1.9 scottr * Map a region of bus space.
178 1.9 scottr */
179 1.9 scottr
180 1.9 scottr #define BUS_SPACE_MAP_CACHEABLE 0x01
181 1.9 scottr #define BUS_SPACE_MAP_LINEAR 0x02
182 1.13 drochner #define BUS_SPACE_MAP_PREFETCHABLE 0x04
183 1.9 scottr
184 1.21 chs int bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t,
185 1.21 chs int, bus_space_handle_t *);
186 1.9 scottr
187 1.9 scottr /*
188 1.21 chs * void bus_space_unmap(bus_space_tag_t t, bus_space_handle_t bsh,
189 1.21 chs * bus_size_t size);
190 1.9 scottr *
191 1.9 scottr * Unmap a region of bus space.
192 1.9 scottr */
193 1.9 scottr
194 1.21 chs void bus_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t);
195 1.9 scottr
196 1.9 scottr /*
197 1.21 chs * int bus_space_subregion(bus_space_tag_t t, bus_space_handle_t bsh,
198 1.21 chs * bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp);
199 1.9 scottr *
200 1.9 scottr * Get a new handle for a subregion of an already-mapped area of bus space.
201 1.9 scottr */
202 1.9 scottr
203 1.21 chs int bus_space_subregion(bus_space_tag_t, bus_space_handle_t,
204 1.21 chs bus_size_t, bus_size_t size, bus_space_handle_t *);
205 1.3 scottr
206 1.9 scottr /*
207 1.21 chs * int bus_space_alloc(bus_space_tag_t t, bus_addr_t, rstart,
208 1.9 scottr * bus_addr_t rend, bus_size_t size, bus_size_t align,
209 1.9 scottr * bus_size_t boundary, int flags, bus_addr_t *addrp,
210 1.21 chs * bus_space_handle_t *bshp);
211 1.9 scottr *
212 1.9 scottr * Allocate a region of bus space.
213 1.9 scottr */
214 1.9 scottr
215 1.21 chs int bus_space_alloc(bus_space_tag_t, bus_addr_t rstart,
216 1.3 scottr bus_addr_t rend, bus_size_t size, bus_size_t align,
217 1.3 scottr bus_size_t boundary, int cacheable, bus_addr_t *addrp,
218 1.21 chs bus_space_handle_t *bshp);
219 1.9 scottr
220 1.9 scottr /*
221 1.21 chs * int bus_space_free(bus_space_tag_t t, bus_space_handle_t bsh,
222 1.21 chs * bus_size_t size);
223 1.9 scottr *
224 1.9 scottr * Free a region of bus space.
225 1.9 scottr */
226 1.9 scottr
227 1.21 chs void bus_space_free(bus_space_tag_t, bus_space_handle_t bsh,
228 1.21 chs bus_size_t size);
229 1.1 scottr
230 1.1 scottr /*
231 1.21 chs * int mac68k_bus_space_probe(bus_space_tag_t t, bus_space_handle_t bsh,
232 1.21 chs * bus_size_t offset, int sz);
233 1.9 scottr *
234 1.9 scottr * Probe the bus at t/bsh/offset, using sz as the size of the load.
235 1.9 scottr *
236 1.9 scottr * This is a machine-dependent extension, and is not to be used by
237 1.9 scottr * machine-independent code.
238 1.9 scottr */
239 1.9 scottr
240 1.21 chs int mac68k_bus_space_probe(bus_space_tag_t,
241 1.21 chs bus_space_handle_t bsh, bus_size_t, int sz);
242 1.9 scottr
243 1.9 scottr /*
244 1.21 chs * u_intN_t bus_space_read_N(bus_space_tag_t tag,
245 1.21 chs * bus_space_handle_t bsh, bus_size_t offset);
246 1.1 scottr *
247 1.1 scottr * Read a 1, 2, 4, or 8 byte quantity from bus space
248 1.1 scottr * described by tag/handle/offset.
249 1.1 scottr */
250 1.1 scottr
251 1.21 chs u_int8_t mac68k_bsr1(bus_space_tag_t, bus_space_handle_t *, bus_size_t);
252 1.21 chs u_int8_t mac68k_bsr1_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t);
253 1.21 chs u_int16_t mac68k_bsr2(bus_space_tag_t, bus_space_handle_t *, bus_size_t);
254 1.21 chs u_int16_t mac68k_bsr2_swap(bus_space_tag_t, bus_space_handle_t *, bus_size_t);
255 1.21 chs u_int16_t mac68k_bsr2_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t);
256 1.21 chs u_int16_t mac68k_bsrs2_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t);
257 1.21 chs u_int32_t mac68k_bsr4(bus_space_tag_t, bus_space_handle_t *, bus_size_t);
258 1.21 chs u_int32_t mac68k_bsr4_swap(bus_space_tag_t, bus_space_handle_t *, bus_size_t);
259 1.21 chs u_int32_t mac68k_bsr4_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t);
260 1.21 chs u_int32_t mac68k_bsrs4_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t);
261 1.14 briggs
262 1.14 briggs #define bus_space_read_1(t,h,o) (h).bsr1((t), &(h), (o))
263 1.14 briggs #define bus_space_read_2(t,h,o) (h).bsr2((t), &(h), (o))
264 1.14 briggs #define bus_space_read_4(t,h,o) (h).bsr4((t), &(h), (o))
265 1.17 briggs #define bus_space_read_stream_1(t,h,o) (h).bsrs1((t), &(h), (o))
266 1.17 briggs #define bus_space_read_stream_2(t,h,o) (h).bsrs2((t), &(h), (o))
267 1.17 briggs #define bus_space_read_stream_4(t,h,o) (h).bsrs4((t), &(h), (o))
268 1.1 scottr
269 1.1 scottr #if 0 /* Cause a link error for bus_space_read_8 */
270 1.1 scottr #define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!!
271 1.17 briggs #define bus_space_read_stream_8(t, h, o) \
272 1.17 briggs !!! bus_space_read_stream_8 unimplemented !!!
273 1.1 scottr #endif
274 1.1 scottr
275 1.1 scottr /*
276 1.21 chs * void bus_space_read_multi_N(bus_space_tag_t tag,
277 1.21 chs * bus_space_handle_t bsh, bus_size_t offset, u_intN_t *addr,
278 1.21 chs * size_t count);
279 1.1 scottr *
280 1.1 scottr * Read `count' 1, 2, 4, or 8 byte quantities from bus space
281 1.1 scottr * described by tag/handle/offset and copy into buffer provided.
282 1.1 scottr */
283 1.1 scottr
284 1.21 chs void mac68k_bsrm1(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
285 1.21 chs u_int8_t *, size_t);
286 1.21 chs void mac68k_bsrm1_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
287 1.21 chs u_int8_t *, size_t);
288 1.21 chs void mac68k_bsrm2(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
289 1.21 chs u_int16_t *, size_t);
290 1.21 chs void mac68k_bsrm2_swap(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
291 1.21 chs u_int16_t *, size_t);
292 1.21 chs void mac68k_bsrm2_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
293 1.21 chs u_int16_t *, size_t);
294 1.21 chs void mac68k_bsrms2_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
295 1.21 chs u_int16_t *, size_t);
296 1.21 chs void mac68k_bsrm4(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
297 1.21 chs u_int32_t *, size_t);
298 1.21 chs void mac68k_bsrms4(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
299 1.21 chs u_int32_t *, size_t);
300 1.21 chs void mac68k_bsrm4_swap(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
301 1.21 chs u_int32_t *, size_t);
302 1.21 chs void mac68k_bsrm4_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
303 1.21 chs u_int32_t *, size_t);
304 1.21 chs void mac68k_bsrms4_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
305 1.21 chs u_int32_t *, size_t);
306 1.14 briggs
307 1.16 briggs #if defined(DIAGNOSTIC)
308 1.16 briggs #define bus_space_read_multi_1(t, h, o, a, c) do { \
309 1.25 tsutsui if ((c) == 0) \
310 1.25 tsutsui panic("bus_space_read_multi_1 called with zero count."); \
311 1.16 briggs (h).bsrm1(t,&(h),o,a,c); } while (0)
312 1.16 briggs #define bus_space_read_multi_2(t, h, o, a, c) do { \
313 1.25 tsutsui if ((c) == 0) \
314 1.25 tsutsui panic("bus_space_read_multi_2 called with zero count."); \
315 1.16 briggs (h).bsrm2(t,&(h),o,a,c); } while (0)
316 1.16 briggs #define bus_space_read_multi_4(t, h, o, a, c) do { \
317 1.25 tsutsui if ((c) == 0) \
318 1.25 tsutsui panic("bus_space_read_multi_4 called with zero count."); \
319 1.16 briggs (h).bsrm4(t,&(h),o,a,c); } while (0)
320 1.17 briggs #define bus_space_read_multi_stream_1(t, h, o, a, c) do { \
321 1.25 tsutsui if ((c) == 0) \
322 1.25 tsutsui panic("bus_space_read_multi_stream_1 called with count=0."); \
323 1.17 briggs (h).bsrms1(t,&(h),o,a,c); } while (0)
324 1.17 briggs #define bus_space_read_multi_stream_2(t, h, o, a, c) do { \
325 1.25 tsutsui if ((c) == 0) \
326 1.25 tsutsui panic("bus_space_read_multi_stream_2 called with count=0."); \
327 1.17 briggs (h).bsrms2(t,&(h),o,a,c); } while (0)
328 1.17 briggs #define bus_space_read_multi_stream_4(t, h, o, a, c) do { \
329 1.25 tsutsui if ((c) == 0) \
330 1.25 tsutsui panic("bus_space_read_multi_stream_4 called with count=0."); \
331 1.17 briggs (h).bsrms4(t,&(h),o,a,c); } while (0)
332 1.16 briggs #else
333 1.15 briggs #define bus_space_read_multi_1(t, h, o, a, c) \
334 1.15 briggs do { if (c) (h).bsrm1(t, &(h), o, a, c); } while (0)
335 1.15 briggs #define bus_space_read_multi_2(t, h, o, a, c) \
336 1.15 briggs do { if (c) (h).bsrm2(t, &(h), o, a, c); } while (0)
337 1.15 briggs #define bus_space_read_multi_4(t, h, o, a, c) \
338 1.15 briggs do { if (c) (h).bsrm4(t, &(h), o, a, c); } while (0)
339 1.17 briggs #define bus_space_read_multi_stream_1(t, h, o, a, c) \
340 1.17 briggs do { if (c) (h).bsrms1(t, &(h), o, a, c); } while (0)
341 1.17 briggs #define bus_space_read_multi_stream_2(t, h, o, a, c) \
342 1.17 briggs do { if (c) (h).bsrms2(t, &(h), o, a, c); } while (0)
343 1.17 briggs #define bus_space_read_multi_stream_4(t, h, o, a, c) \
344 1.17 briggs do { if (c) (h).bsrms4(t, &(h), o, a, c); } while (0)
345 1.16 briggs #endif
346 1.1 scottr
347 1.1 scottr #if 0 /* Cause a link error for bus_space_read_multi_8 */
348 1.1 scottr #define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!!
349 1.17 briggs #define bus_space_read_multi_stream_8 \
350 1.17 briggs !!! bus_space_read_multi_stream_8 unimplemented !!!
351 1.1 scottr #endif
352 1.1 scottr
353 1.1 scottr /*
354 1.21 chs * void bus_space_read_region_N(bus_space_tag_t tag,
355 1.1 scottr * bus_space_handle_t bsh, bus_size_t offset,
356 1.21 chs * u_intN_t *addr, size_t count);
357 1.1 scottr *
358 1.1 scottr * Read `count' 1, 2, 4, or 8 byte quantities from bus space
359 1.1 scottr * described by tag/handle and starting at `offset' and copy into
360 1.1 scottr * buffer provided.
361 1.1 scottr */
362 1.1 scottr
363 1.21 chs void mac68k_bsrr1(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
364 1.21 chs u_int8_t *, size_t);
365 1.21 chs void mac68k_bsrr1_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
366 1.21 chs u_int8_t *, size_t);
367 1.21 chs void mac68k_bsrr2(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
368 1.21 chs u_int16_t *, size_t);
369 1.21 chs void mac68k_bsrr2_swap(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
370 1.21 chs u_int16_t *, size_t);
371 1.21 chs void mac68k_bsrr2_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
372 1.21 chs u_int16_t *, size_t);
373 1.21 chs void mac68k_bsrrs2_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
374 1.21 chs u_int16_t *, size_t);
375 1.21 chs void mac68k_bsrr4(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
376 1.21 chs u_int32_t *, size_t);
377 1.21 chs void mac68k_bsrr4_swap(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
378 1.21 chs u_int32_t *, size_t);
379 1.21 chs void mac68k_bsrr4_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
380 1.21 chs u_int32_t *, size_t);
381 1.21 chs void mac68k_bsrrs4_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
382 1.21 chs u_int32_t *, size_t);
383 1.14 briggs
384 1.16 briggs #if defined(DIAGNOSTIC)
385 1.16 briggs #define bus_space_read_region_1(t, h, o, a, c) do { \
386 1.25 tsutsui if ((c) == 0) \
387 1.25 tsutsui panic("bus_space_read_region_1 called with zero count."); \
388 1.16 briggs (h).bsrr1(t,&(h),o,a,c); } while (0)
389 1.16 briggs #define bus_space_read_region_2(t, h, o, a, c) do { \
390 1.25 tsutsui if ((c) == 0) \
391 1.25 tsutsui panic("bus_space_read_region_2 called with zero count."); \
392 1.16 briggs (h).bsrr2(t,&(h),o,a,c); } while (0)
393 1.16 briggs #define bus_space_read_region_4(t, h, o, a, c) do { \
394 1.25 tsutsui if ((c) == 0) \
395 1.25 tsutsui panic("bus_space_read_region_4 called with zero count."); \
396 1.16 briggs (h).bsrr4(t,&(h),o,a,c); } while (0)
397 1.17 briggs #define bus_space_read_region_stream_1(t, h, o, a, c) do { \
398 1.25 tsutsui if ((c) == 0) \
399 1.25 tsutsui panic("bus_space_read_region_stream_1 called with count=0."); \
400 1.17 briggs (h).bsrrs1(t,&(h),o,a,c); } while (0)
401 1.17 briggs #define bus_space_read_region_stream_2(t, h, o, a, c) do { \
402 1.25 tsutsui if ((c) == 0) \
403 1.25 tsutsui panic("bus_space_read_region_stream_2 called with count=0."); \
404 1.17 briggs (h).bsrrs2(t,&(h),o,a,c); } while (0)
405 1.17 briggs #define bus_space_read_region_stream_4(t, h, o, a, c) do { \
406 1.25 tsutsui if ((c) == 0) \
407 1.25 tsutsui panic("bus_space_read_region_stream_4 called with count=0."); \
408 1.17 briggs (h).bsrrs4(t,&(h),o,a,c); } while (0)
409 1.16 briggs #else
410 1.15 briggs #define bus_space_read_region_1(t, h, o, a, c) \
411 1.15 briggs do { if (c) (h).bsrr1(t,&(h),o,a,c); } while (0)
412 1.15 briggs #define bus_space_read_region_2(t, h, o, a, c) \
413 1.15 briggs do { if (c) (h).bsrr2(t,&(h),o,a,c); } while (0)
414 1.15 briggs #define bus_space_read_region_4(t, h, o, a, c) \
415 1.15 briggs do { if (c) (h).bsrr4(t,&(h),o,a,c); } while (0)
416 1.17 briggs #define bus_space_read_region_stream_1(t, h, o, a, c) \
417 1.17 briggs do { if (c) (h).bsrrs1(t,&(h),o,a,c); } while (0)
418 1.17 briggs #define bus_space_read_region_stream_2(t, h, o, a, c) \
419 1.17 briggs do { if (c) (h).bsrrs2(t,&(h),o,a,c); } while (0)
420 1.17 briggs #define bus_space_read_region_stream_4(t, h, o, a, c) \
421 1.17 briggs do { if (c) (h).bsrrs4(t,&(h),o,a,c); } while (0)
422 1.16 briggs #endif
423 1.1 scottr
424 1.1 scottr #if 0 /* Cause a link error for bus_space_read_region_8 */
425 1.1 scottr #define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!!
426 1.17 briggs #define bus_space_read_region_stream_8 \
427 1.17 briggs !!! bus_space_read_region_stream_8 unimplemented !!!
428 1.1 scottr #endif
429 1.1 scottr
430 1.1 scottr /*
431 1.21 chs * void bus_space_write_N(bus_space_tag_t tag,
432 1.21 chs * bus_space_handle_t bsh, bus_size_t offset, u_intN_t value);
433 1.1 scottr *
434 1.1 scottr * Write the 1, 2, 4, or 8 byte value `value' to bus space
435 1.1 scottr * described by tag/handle/offset.
436 1.1 scottr */
437 1.1 scottr
438 1.21 chs void mac68k_bsw1(bus_space_tag_t, bus_space_handle_t *, bus_size_t, u_int8_t);
439 1.21 chs void mac68k_bsw1_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
440 1.21 chs u_int8_t);
441 1.21 chs void mac68k_bsw2(bus_space_tag_t, bus_space_handle_t *, bus_size_t, u_int16_t);
442 1.21 chs void mac68k_bsw2_swap(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
443 1.21 chs u_int16_t);
444 1.21 chs void mac68k_bsw2_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
445 1.21 chs u_int16_t);
446 1.21 chs void mac68k_bsws2_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
447 1.21 chs u_int16_t);
448 1.21 chs void mac68k_bsw4(bus_space_tag_t, bus_space_handle_t *, bus_size_t, u_int32_t);
449 1.21 chs void mac68k_bsw4_swap(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
450 1.21 chs u_int32_t);
451 1.21 chs void mac68k_bsw4_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
452 1.21 chs u_int32_t);
453 1.21 chs void mac68k_bsws4_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
454 1.21 chs u_int32_t);
455 1.14 briggs
456 1.14 briggs #define bus_space_write_1(t, h, o, v) (h).bsw1(t, &(h), o, v)
457 1.14 briggs #define bus_space_write_2(t, h, o, v) (h).bsw2(t, &(h), o, v)
458 1.14 briggs #define bus_space_write_4(t, h, o, v) (h).bsw4(t, &(h), o, v)
459 1.17 briggs #define bus_space_write_stream_1(t, h, o, v) (h).bsws1(t, &(h), o, v)
460 1.17 briggs #define bus_space_write_stream_2(t, h, o, v) (h).bsws2(t, &(h), o, v)
461 1.17 briggs #define bus_space_write_stream_4(t, h, o, v) (h).bsws4(t, &(h), o, v)
462 1.1 scottr
463 1.1 scottr #if 0 /* Cause a link error for bus_space_write_8 */
464 1.1 scottr #define bus_space_write_8 !!! bus_space_write_8 not implemented !!!
465 1.17 briggs #define bus_space_write_stream_8 \
466 1.17 briggs !!! bus_space_write_stream_8 not implemented !!!
467 1.1 scottr #endif
468 1.1 scottr
469 1.1 scottr /*
470 1.21 chs * void bus_space_write_multi_N(bus_space_tag_t tag,
471 1.21 chs * bus_space_handle_t bsh, bus_size_t offset, const u_intN_t *addr,
472 1.21 chs * size_t count);
473 1.1 scottr *
474 1.1 scottr * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
475 1.1 scottr * provided to bus space described by tag/handle/offset.
476 1.1 scottr */
477 1.1 scottr
478 1.21 chs void mac68k_bswm1(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
479 1.21 chs const u_int8_t *, size_t);
480 1.21 chs void mac68k_bswm1_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
481 1.21 chs const u_int8_t *, size_t);
482 1.21 chs void mac68k_bswm2(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
483 1.21 chs const u_int16_t *, size_t);
484 1.21 chs void mac68k_bswm2_swap(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
485 1.21 chs const u_int16_t *, size_t);
486 1.21 chs void mac68k_bswm2_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
487 1.21 chs const u_int16_t *, size_t);
488 1.21 chs void mac68k_bswms2_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
489 1.21 chs const u_int16_t *, size_t);
490 1.21 chs void mac68k_bswm4(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
491 1.21 chs const u_int32_t *, size_t);
492 1.21 chs void mac68k_bswm4_swap(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
493 1.21 chs const u_int32_t *, size_t);
494 1.21 chs void mac68k_bswm4_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
495 1.21 chs const u_int32_t *, size_t);
496 1.21 chs void mac68k_bswms4_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
497 1.21 chs const u_int32_t *, size_t);
498 1.14 briggs
499 1.16 briggs #if defined(DIAGNOSTIC)
500 1.16 briggs #define bus_space_write_multi_1(t, h, o, a, c) do { \
501 1.25 tsutsui if ((c) == 0) \
502 1.25 tsutsui panic("bus_space_write_multi_1 called with zero count."); \
503 1.16 briggs (h).bswm1(t,&(h),o,a,c); } while (0)
504 1.16 briggs #define bus_space_write_multi_2(t, h, o, a, c) do { \
505 1.25 tsutsui if ((c) == 0) \
506 1.25 tsutsui panic("bus_space_write_multi_2 called with zero count."); \
507 1.16 briggs (h).bswm2(t,&(h),o,a,c); } while (0)
508 1.16 briggs #define bus_space_write_multi_4(t, h, o, a, c) do { \
509 1.25 tsutsui if ((c) == 0) \
510 1.25 tsutsui panic("bus_space_write_multi_4 called with zero count."); \
511 1.16 briggs (h).bswm4(t,&(h),o,a,c); } while (0)
512 1.17 briggs #define bus_space_write_multi_stream_1(t, h, o, a, c) do { \
513 1.25 tsutsui if ((c) == 0) \
514 1.25 tsutsui panic("bus_space_write_multi_stream_1 called with count=0."); \
515 1.17 briggs (h).bswms1(t,&(h),o,a,c); } while (0)
516 1.17 briggs #define bus_space_write_multi_stream_2(t, h, o, a, c) do { \
517 1.25 tsutsui if ((c) == 0) \
518 1.25 tsutsui panic("bus_space_write_multi_stream_2 called with count=0."); \
519 1.17 briggs (h).bswms2(t,&(h),o,a,c); } while (0)
520 1.17 briggs #define bus_space_write_multi_stream_4(t, h, o, a, c) do { \
521 1.25 tsutsui if ((c) == 0) \
522 1.25 tsutsui panic("bus_space_write_multi_stream_4 called with count=0."); \
523 1.17 briggs (h).bswms4(t,&(h),o,a,c); } while (0)
524 1.16 briggs #else
525 1.15 briggs #define bus_space_write_multi_1(t, h, o, a, c) \
526 1.15 briggs do { if (c) (h).bswm1(t, &(h), o, a, c); } while (0)
527 1.15 briggs #define bus_space_write_multi_2(t, h, o, a, c) \
528 1.15 briggs do { if (c) (h).bswm2(t, &(h), o, a, c); } while (0)
529 1.15 briggs #define bus_space_write_multi_4(t, h, o, a, c) \
530 1.15 briggs do { if (c) (h).bswm4(t, &(h), o, a, c); } while (0)
531 1.17 briggs #define bus_space_write_multi_stream_1(t, h, o, a, c) \
532 1.17 briggs do { if (c) (h).bswms1(t, &(h), o, a, c); } while (0)
533 1.17 briggs #define bus_space_write_multi_stream_2(t, h, o, a, c) \
534 1.17 briggs do { if (c) (h).bswms2(t, &(h), o, a, c); } while (0)
535 1.17 briggs #define bus_space_write_multi_stream_4(t, h, o, a, c) \
536 1.17 briggs do { if (c) (h).bswms4(t, &(h), o, a, c); } while (0)
537 1.16 briggs #endif
538 1.1 scottr
539 1.1 scottr #if 0 /* Cause a link error for bus_space_write_8 */
540 1.1 scottr #define bus_space_write_multi_8(t, h, o, a, c) \
541 1.1 scottr !!! bus_space_write_multi_8 unimplimented !!!
542 1.17 briggs #define bus_space_write_multi_stream_8(t, h, o, a, c) \
543 1.17 briggs !!! bus_space_write_multi_stream_8 unimplimented !!!
544 1.1 scottr #endif
545 1.1 scottr
546 1.1 scottr /*
547 1.21 chs * void bus_space_write_region_N(bus_space_tag_t tag,
548 1.21 chs * bus_space_handle_t bsh, bus_size_t offset, const u_intN_t *addr,
549 1.21 chs * size_t count);
550 1.1 scottr *
551 1.1 scottr * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
552 1.1 scottr * to bus space described by tag/handle starting at `offset'.
553 1.1 scottr */
554 1.1 scottr
555 1.21 chs void mac68k_bswr1(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
556 1.21 chs const u_int8_t *, size_t);
557 1.21 chs void mac68k_bswr1_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
558 1.21 chs const u_int8_t *, size_t);
559 1.21 chs void mac68k_bswr2(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
560 1.21 chs const u_int16_t *, size_t);
561 1.21 chs void mac68k_bswr2_swap(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
562 1.21 chs const u_int16_t *, size_t);
563 1.21 chs void mac68k_bswr2_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
564 1.21 chs const u_int16_t *, size_t);
565 1.21 chs void mac68k_bswrs2_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
566 1.21 chs const u_int16_t *, size_t);
567 1.21 chs void mac68k_bswr4(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
568 1.21 chs const u_int32_t *, size_t);
569 1.21 chs void mac68k_bswr4_swap(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
570 1.21 chs const u_int32_t *, size_t);
571 1.21 chs void mac68k_bswr4_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
572 1.21 chs const u_int32_t *, size_t);
573 1.21 chs void mac68k_bswrs4_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
574 1.21 chs const u_int32_t *, size_t);
575 1.14 briggs
576 1.16 briggs #if defined(DIAGNOSTIC)
577 1.16 briggs #define bus_space_write_region_1(t, h, o, a, c) do { \
578 1.25 tsutsui if ((c) == 0) \
579 1.25 tsutsui panic("bus_space_write_region_1 called with zero count."); \
580 1.16 briggs (h).bswr1(t,&(h),o,a,c); } while (0)
581 1.16 briggs #define bus_space_write_region_2(t, h, o, a, c) do { \
582 1.25 tsutsui if ((c) == 0) \
583 1.25 tsutsui panic("bus_space_write_region_2 called with zero count."); \
584 1.16 briggs (h).bswr2(t,&(h),o,a,c); } while (0)
585 1.16 briggs #define bus_space_write_region_4(t, h, o, a, c) do { \
586 1.25 tsutsui if ((c) == 0) \
587 1.25 tsutsui panic("bus_space_write_region_4 called with zero count."); \
588 1.16 briggs (h).bswr4(t,&(h),o,a,c); } while (0)
589 1.17 briggs #define bus_space_write_region_stream_1(t, h, o, a, c) do { \
590 1.25 tsutsui if ((c) == 0) \
591 1.25 tsutsui panic("bus_space_write_region_stream_1 called with count=0."); \
592 1.17 briggs (h).bswrs1(t,&(h),o,a,c); } while (0)
593 1.17 briggs #define bus_space_write_region_stream_2(t, h, o, a, c) do { \
594 1.25 tsutsui if ((c) == 0) \
595 1.25 tsutsui panic("bus_space_write_region_stream_2 called with count=0."); \
596 1.17 briggs (h).bswrs2(t,&(h),o,a,c); } while (0)
597 1.17 briggs #define bus_space_write_region_stream_4(t, h, o, a, c) do { \
598 1.25 tsutsui if ((c) == 0) \
599 1.25 tsutsui panic("bus_space_write_region_stream_4 called with count=0."); \
600 1.17 briggs (h).bswrs4(t,&(h),o,a,c); } while (0)
601 1.16 briggs #else
602 1.15 briggs #define bus_space_write_region_1(t, h, o, a, c) \
603 1.15 briggs do { if (c) (h).bswr1(t,&(h),o,a,c); } while (0)
604 1.15 briggs #define bus_space_write_region_2(t, h, o, a, c) \
605 1.15 briggs do { if (c) (h).bswr2(t,&(h),o,a,c); } while (0)
606 1.15 briggs #define bus_space_write_region_4(t, h, o, a, c) \
607 1.15 briggs do { if (c) (h).bswr4(t,&(h),o,a,c); } while (0)
608 1.17 briggs #define bus_space_write_region_stream_1(t, h, o, a, c) \
609 1.17 briggs do { if (c) (h).bswrs1(t,&(h),o,a,c); } while (0)
610 1.17 briggs #define bus_space_write_region_stream_2(t, h, o, a, c) \
611 1.17 briggs do { if (c) (h).bswrs2(t,&(h),o,a,c); } while (0)
612 1.17 briggs #define bus_space_write_region_stream_4(t, h, o, a, c) \
613 1.17 briggs do { if (c) (h).bswrs4(t,&(h),o,a,c); } while (0)
614 1.16 briggs #endif
615 1.1 scottr
616 1.1 scottr #if 0 /* Cause a link error for bus_space_write_region_8 */
617 1.1 scottr #define bus_space_write_region_8 \
618 1.1 scottr !!! bus_space_write_region_8 unimplemented !!!
619 1.17 briggs #define bus_space_write_region_stream_8 \
620 1.17 briggs !!! bus_space_write_region_stream_8 unimplemented !!!
621 1.1 scottr #endif
622 1.1 scottr
623 1.1 scottr /*
624 1.21 chs * void bus_space_set_multi_N(bus_space_tag_t tag,
625 1.1 scottr * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
626 1.21 chs * size_t count);
627 1.1 scottr *
628 1.1 scottr * Write the 1, 2, 4, or 8 byte value `val' to bus space described
629 1.1 scottr * by tag/handle/offset `count' times.
630 1.1 scottr */
631 1.1 scottr
632 1.21 chs void mac68k_bssm1(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
633 1.21 chs u_int8_t, size_t);
634 1.21 chs void mac68k_bssm1_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
635 1.21 chs u_int8_t, size_t);
636 1.21 chs void mac68k_bssm2(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
637 1.21 chs u_int16_t, size_t);
638 1.21 chs void mac68k_bssm2_swap(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
639 1.21 chs u_int16_t, size_t);
640 1.21 chs void mac68k_bssm2_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
641 1.21 chs u_int16_t, size_t);
642 1.21 chs void mac68k_bssm4(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
643 1.21 chs u_int32_t, size_t);
644 1.21 chs void mac68k_bssm4_swap(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
645 1.21 chs u_int32_t, size_t);
646 1.21 chs void mac68k_bssm4_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
647 1.21 chs u_int32_t, size_t);
648 1.14 briggs
649 1.16 briggs #if defined(DIAGNOSTIC)
650 1.16 briggs #define bus_space_set_multi_1(t, h, o, val, c) do { \
651 1.25 tsutsui if ((c) == 0) \
652 1.25 tsutsui panic("bus_space_set_multi_1 called with zero count."); \
653 1.16 briggs (h).bssm1(t,&(h),o,val,c); } while (0)
654 1.16 briggs #define bus_space_set_multi_2(t, h, o, val, c) do { \
655 1.25 tsutsui if ((c) == 0) \
656 1.25 tsutsui panic("bus_space_set_multi_2 called with zero count."); \
657 1.16 briggs (h).bssm2(t,&(h),o,val,c); } while (0)
658 1.16 briggs #define bus_space_set_multi_4(t, h, o, val, c) do { \
659 1.25 tsutsui if ((c) == 0) \
660 1.25 tsutsui panic("bus_space_set_multi_4 called with zero count."); \
661 1.16 briggs (h).bssm4(t,&(h),o,val,c); } while (0)
662 1.16 briggs #else
663 1.15 briggs #define bus_space_set_multi_1(t, h, o, val, c) \
664 1.15 briggs do { if (c) (h).bssm1(t,&(h),o,val,c); } while (0)
665 1.15 briggs #define bus_space_set_multi_2(t, h, o, val, c) \
666 1.15 briggs do { if (c) (h).bssm2(t,&(h),o,val,c); } while (0)
667 1.15 briggs #define bus_space_set_multi_4(t, h, o, val, c) \
668 1.15 briggs do { if (c) (h).bssm4(t,&(h),o,val,c); } while (0)
669 1.16 briggs #endif
670 1.4 scottr
671 1.4 scottr #if 0 /* Cause a link error for bus_space_set_multi_8 */
672 1.4 scottr #define bus_space_set_multi_8 \
673 1.4 scottr !!! bus_space_set_multi_8 unimplemented !!!
674 1.4 scottr #endif
675 1.1 scottr
676 1.1 scottr /*
677 1.21 chs * void bus_space_set_region_N(bus_space_tag_t tag,
678 1.21 chs * bus_space_handle_t bsh, bus_size_t, u_intN_t val,
679 1.21 chs * size_t count);
680 1.1 scottr *
681 1.1 scottr * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
682 1.1 scottr * by tag/handle starting at `offset'.
683 1.1 scottr */
684 1.1 scottr
685 1.21 chs void mac68k_bssr1(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
686 1.21 chs u_int8_t, size_t);
687 1.21 chs void mac68k_bssr1_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
688 1.21 chs u_int8_t, size_t);
689 1.21 chs void mac68k_bssr2(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
690 1.21 chs u_int16_t, size_t);
691 1.21 chs void mac68k_bssr2_swap(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
692 1.21 chs u_int16_t, size_t);
693 1.21 chs void mac68k_bssr2_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
694 1.21 chs u_int16_t, size_t);
695 1.21 chs void mac68k_bssr4(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
696 1.21 chs u_int32_t, size_t);
697 1.21 chs void mac68k_bssr4_swap(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
698 1.21 chs u_int32_t, size_t);
699 1.21 chs void mac68k_bssr4_gen(bus_space_tag_t, bus_space_handle_t *, bus_size_t,
700 1.21 chs u_int32_t, size_t);
701 1.14 briggs
702 1.16 briggs #if defined(DIAGNOSTIC)
703 1.16 briggs #define bus_space_set_region_1(t, h, o, val, c) do { \
704 1.25 tsutsui if ((c) == 0) \
705 1.25 tsutsui panic("bus_space_set_region_1 called with zero count."); \
706 1.16 briggs (h).bssr1(t,&(h),o,val,c); } while (0)
707 1.16 briggs #define bus_space_set_region_2(t, h, o, val, c) do { \
708 1.25 tsutsui if ((c) == 0) \
709 1.25 tsutsui panic("bus_space_set_region_2 called with zero count."); \
710 1.16 briggs (h).bssr2(t,&(h),o,val,c); } while (0)
711 1.16 briggs #define bus_space_set_region_4(t, h, o, val, c) do { \
712 1.25 tsutsui if ((c) == 0) \
713 1.25 tsutsui panic("bus_space_set_region_4 called with zero count."); \
714 1.16 briggs (h).bssr4(t,&(h),o,val,c); } while (0)
715 1.16 briggs #else
716 1.15 briggs #define bus_space_set_region_1(t, h, o, val, c) \
717 1.15 briggs do { if (c) (h).bssr1(t,&(h),o,val,c); } while (0)
718 1.15 briggs #define bus_space_set_region_2(t, h, o, val, c) \
719 1.15 briggs do { if (c) (h).bssr2(t,&(h),o,val,c); } while (0)
720 1.15 briggs #define bus_space_set_region_4(t, h, o, val, c) \
721 1.15 briggs do { if (c) (h).bssr4(t,&(h),o,val,c); } while (0)
722 1.16 briggs #endif
723 1.4 scottr
724 1.4 scottr #if 0 /* Cause a link error for bus_space_set_region_8 */
725 1.4 scottr #define bus_space_set_region_8 \
726 1.4 scottr !!! bus_space_set_region_8 unimplemented !!!
727 1.4 scottr #endif
728 1.1 scottr
729 1.1 scottr /*
730 1.21 chs * void bus_space_copy_N(bus_space_tag_t tag,
731 1.1 scottr * bus_space_handle_t bsh1, bus_size_t off1,
732 1.21 chs * bus_space_handle_t bsh2, bus_size_t off2, size_t count);
733 1.1 scottr *
734 1.1 scottr * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
735 1.1 scottr * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
736 1.1 scottr */
737 1.1 scottr
738 1.9 scottr #define __MAC68K_copy_region_N(BYTES) \
739 1.24 perry static __inline void __CONCAT(bus_space_copy_region_,BYTES) \
740 1.21 chs (bus_space_tag_t, \
741 1.21 chs bus_space_handle_t, bus_size_t, \
742 1.21 chs bus_space_handle_t, bus_size_t, \
743 1.21 chs bus_size_t); \
744 1.9 scottr \
745 1.24 perry static __inline void \
746 1.21 chs __CONCAT(bus_space_copy_region_,BYTES)( \
747 1.21 chs bus_space_tag_t t, \
748 1.21 chs bus_space_handle_t h1, \
749 1.21 chs bus_size_t o1, \
750 1.21 chs bus_space_handle_t h2, \
751 1.21 chs bus_size_t o2, \
752 1.21 chs bus_size_t c) \
753 1.9 scottr { \
754 1.9 scottr bus_size_t o; \
755 1.9 scottr \
756 1.14 briggs if ((h1.base + o1) >= (h2.base + o2)) { \
757 1.9 scottr /* src after dest: copy forward */ \
758 1.9 scottr for (o = 0; c != 0; c--, o += BYTES) \
759 1.9 scottr __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \
760 1.9 scottr __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
761 1.9 scottr } else { \
762 1.9 scottr /* dest after src: copy backwards */ \
763 1.9 scottr for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \
764 1.9 scottr __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \
765 1.9 scottr __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
766 1.9 scottr } \
767 1.9 scottr }
768 1.9 scottr __MAC68K_copy_region_N(1)
769 1.9 scottr __MAC68K_copy_region_N(2)
770 1.9 scottr __MAC68K_copy_region_N(4)
771 1.4 scottr #if 0 /* Cause a link error for bus_space_copy_8 */
772 1.4 scottr #define bus_space_copy_8 \
773 1.4 scottr !!! bus_space_copy_8 unimplemented !!!
774 1.4 scottr #endif
775 1.1 scottr
776 1.9 scottr #undef __MAC68K_copy_region_N
777 1.9 scottr
778 1.1 scottr /*
779 1.1 scottr * Bus read/write barrier methods.
780 1.1 scottr *
781 1.21 chs * void bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh,
782 1.21 chs * bus_size_t offset, bus_size_t len, int flags);
783 1.1 scottr *
784 1.1 scottr * Note: the 680x0 does not currently require barriers, but we must
785 1.1 scottr * provide the flags to MI code.
786 1.1 scottr */
787 1.1 scottr #define bus_space_barrier(t, h, o, l, f) \
788 1.1 scottr ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
789 1.9 scottr #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
790 1.9 scottr #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
791 1.12 drochner
792 1.27 rin /*
793 1.27 rin * void *bus_space_vaddr(bus_space_tag_t, bus_space_handle_t);
794 1.27 rin *
795 1.27 rin * Get the kernel virtual address for the mapped bus space.
796 1.27 rin */
797 1.27 rin #define bus_space_vaddr(t, h) ((void)(t), (void *)(h.base))
798 1.27 rin
799 1.12 drochner #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
800 1.20 briggs
801 1.20 briggs #include <m68k/bus_dma.h>
802 1.1 scottr
803 1.1 scottr #endif /* _MAC68K_BUS_H_ */
804