bus.h revision 1.7
1 /* $NetBSD: bus.h,v 1.7 1997/10/04 17:36:56 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (C) 1997 Scott Reynolds. All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by Scott Reynolds and 54 * Jason Thorpe for the NetBSD Project. 55 * 4. The name of the author may not be used to endorse or promote products 56 * derived from this software without specific prior written permission 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 60 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 61 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 62 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 63 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 64 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 65 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 66 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 67 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 68 */ 69 70 #ifndef _MAC68K_BUS_H_ 71 #define _MAC68K_BUS_H_ 72 73 /* 74 * Value for the mac68k bus space tag, not to be used directly by MI code. 75 */ 76 #define MAC68K_BUS_SPACE_MEM 0 /* space is mem space */ 77 78 /* 79 * Bus address and size types 80 */ 81 typedef u_long bus_addr_t; 82 typedef u_long bus_size_t; 83 84 /* 85 * Access methods for bus resources and address space. 86 */ 87 typedef int bus_space_tag_t; 88 typedef u_long bus_space_handle_t; 89 90 int bus_space_map __P((bus_space_tag_t, bus_addr_t, bus_size_t, 91 int, bus_space_handle_t *)); 92 void bus_space_unmap __P((bus_space_tag_t, bus_space_handle_t, 93 bus_size_t)); 94 int bus_space_subregion __P((bus_space_tag_t t, bus_space_handle_t bsh, 95 bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)); 96 97 int bus_space_alloc __P((bus_space_tag_t t, bus_addr_t rstart, 98 bus_addr_t rend, bus_size_t size, bus_size_t align, 99 bus_size_t boundary, int cacheable, bus_addr_t *addrp, 100 bus_space_handle_t *bshp)); 101 void bus_space_free __P((bus_space_tag_t t, bus_space_handle_t bsh, 102 bus_size_t size)); 103 104 /* 105 * u_intN_t bus_space_read_N __P((bus_space_tag_t tag, 106 * bus_space_handle_t bsh, bus_size_t offset)); 107 * 108 * Read a 1, 2, 4, or 8 byte quantity from bus space 109 * described by tag/handle/offset. 110 */ 111 112 #define bus_space_read_1(t, h, o) \ 113 ((void) t, (*(volatile u_int8_t *)((h) + (o)))) 114 115 #define bus_space_read_2(t, h, o) \ 116 ((void) t, (*(volatile u_int16_t *)((h) + (o)))) 117 118 #define bus_space_read_4(t, h, o) \ 119 ((void) t, (*(volatile u_int32_t *)((h) + (o)))) 120 121 #if 0 /* Cause a link error for bus_space_read_8 */ 122 #define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!! 123 #endif 124 125 /* 126 * void bus_space_read_multi_N __P((bus_space_tag_t tag, 127 * bus_space_handle_t bsh, bus_size_t offset, 128 * u_intN_t *addr, size_t count)); 129 * 130 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 131 * described by tag/handle/offset and copy into buffer provided. 132 */ 133 134 #define bus_space_read_multi_1(t, h, o, a, c) do { \ 135 (void) t; \ 136 __asm __volatile (" \ 137 movl %0,a0 ; \ 138 movl %1,a1 ; \ 139 movl %2,d0 ; \ 140 1: movb a0@,a1@+ ; \ 141 subql #1,d0 ; \ 142 jne 1b" : \ 143 : \ 144 "r" ((h) + (o)), "g" (a), "g" (c) : \ 145 "a0","a1","d0"); \ 146 } while (0); 147 148 #define bus_space_read_multi_2(t, h, o, a, c) do { \ 149 (void) t; \ 150 __asm __volatile (" \ 151 movl %0,a0 ; \ 152 movl %1,a1 ; \ 153 movl %2,d0 ; \ 154 1: movw a0@,a1@+ ; \ 155 subql #1,d0 ; \ 156 jne 1b" : \ 157 : \ 158 "r" ((h) + (o)), "g" (a), "g" (c) : \ 159 "a0","a1","d0"); \ 160 } while (0); 161 162 #define bus_space_read_multi_4(t, h, o, a, c) do { \ 163 (void) t; \ 164 __asm __volatile (" \ 165 movl %0,a0 ; \ 166 movl %1,a1 ; \ 167 movl %2,d0 ; \ 168 1: movl a0@,a1@+ ; \ 169 subql #1,d0 ; \ 170 jne 1b" : \ 171 : \ 172 "r" ((h) + (o)), "g" (a), "g" (c) : \ 173 "a0","a1","d0"); \ 174 } while (0); 175 176 #if 0 /* Cause a link error for bus_space_read_multi_8 */ 177 #define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!! 178 #endif 179 180 /* 181 * void bus_space_read_region_N __P((bus_space_tag_t tag, 182 * bus_space_handle_t bsh, bus_size_t offset, 183 * u_intN_t *addr, size_t count)); 184 * 185 * Read `count' 1, 2, 4, or 8 byte quantities from bus space 186 * described by tag/handle and starting at `offset' and copy into 187 * buffer provided. 188 */ 189 190 #define bus_space_read_region_1(t, h, o, a, c) do { \ 191 (void) t; \ 192 __asm __volatile (" \ 193 movl %0,a0 ; \ 194 movl %1,a1 ; \ 195 movl %2,d0 ; \ 196 1: movb a0@+,a1@+ ; \ 197 subql #1,d0 ; \ 198 jne 1b" : \ 199 : \ 200 "r" ((h) + (o)), "g" (a), "g" (c) : \ 201 "a0","a1","d0"); \ 202 } while (0); 203 204 #define bus_space_read_region_2(t, h, o, a, c) do { \ 205 (void) t; \ 206 __asm __volatile (" \ 207 movl %0,a0 ; \ 208 movl %1,a1 ; \ 209 movl %2,d0 ; \ 210 1: movw a0@+,a1@+ ; \ 211 subql #1,d0 ; \ 212 jne 1b" : \ 213 : \ 214 "r" ((h) + (o)), "g" (a), "g" (c) : \ 215 "a0","a1","d0"); \ 216 } while (0); 217 218 #define bus_space_read_region_4(t, h, o, a, c) do { \ 219 (void) t; \ 220 __asm __volatile (" \ 221 movl %0,a0 ; \ 222 movl %1,a1 ; \ 223 movl %2,d0 ; \ 224 1: movl a0@+,a1@+ ; \ 225 subql #1,d0 ; \ 226 jne 1b" : \ 227 : \ 228 "r" ((h) + (o)), "g" (a), "g" (c) : \ 229 "a0","a1","d0"); \ 230 } while (0); 231 232 #if 0 /* Cause a link error for bus_space_read_region_8 */ 233 #define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!! 234 #endif 235 236 /* 237 * void bus_space_write_N __P((bus_space_tag_t tag, 238 * bus_space_handle_t bsh, bus_size_t offset, 239 * u_intN_t value)); 240 * 241 * Write the 1, 2, 4, or 8 byte value `value' to bus space 242 * described by tag/handle/offset. 243 */ 244 245 #define bus_space_write_1(t, h, o, v) \ 246 ((void) t, ((void)(*(volatile u_int8_t *)((h) + (o)) = (v)))) 247 248 #define bus_space_write_2(t, h, o, v) \ 249 ((void) t, ((void)(*(volatile u_int16_t *)((h) + (o)) = (v)))) 250 251 #define bus_space_write_4(t, h, o, v) \ 252 ((void) t, ((void)(*(volatile u_int32_t *)((h) + (o)) = (v)))) 253 254 #if 0 /* Cause a link error for bus_space_write_8 */ 255 #define bus_space_write_8 !!! bus_space_write_8 not implemented !!! 256 #endif 257 258 /* 259 * void bus_space_write_multi_N __P((bus_space_tag_t tag, 260 * bus_space_handle_t bsh, bus_size_t offset, 261 * const u_intN_t *addr, size_t count)); 262 * 263 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer 264 * provided to bus space described by tag/handle/offset. 265 */ 266 267 #define bus_space_write_multi_1(t, h, o, a, c) do { \ 268 (void) t; \ 269 __asm __volatile (" \ 270 movl %0,a0 ; \ 271 movl %1,a1 ; \ 272 movl %2,d0 ; \ 273 1: movb a1@+,a0@ ; \ 274 subql #1,d0 ; \ 275 jne 1b" : \ 276 : \ 277 "r" ((h) + (o)), "g" (a), "g" (c) : \ 278 "a0","a1","d0"); \ 279 } while (0); 280 281 #define bus_space_write_multi_2(t, h, o, a, c) do { \ 282 (void) t; \ 283 __asm __volatile (" \ 284 movl %0,a0 ; \ 285 movl %1,a1 ; \ 286 movl %2,d0 ; \ 287 1: movw a1@+,a0@ ; \ 288 subql #1,d0 ; \ 289 jne 1b" : \ 290 : \ 291 "r" ((h) + (o)), "g" (a), "g" (c) : \ 292 "a0","a1","d0"); \ 293 } while (0); 294 295 #define bus_space_write_multi_4(t, h, o, a, c) do { \ 296 (void) t; \ 297 __asm __volatile (" \ 298 movl %0,a0 ; \ 299 movl %1,a1 ; \ 300 movl %2,d0 ; \ 301 1: movl a1@+,a0@ ; \ 302 subql #1,d0 ; \ 303 jne 1b" : \ 304 : \ 305 "r" ((h) + (o)), "g" (a), "g" (c) : \ 306 "a0","a1","d0"); \ 307 } while (0); 308 309 #if 0 /* Cause a link error for bus_space_write_8 */ 310 #define bus_space_write_multi_8(t, h, o, a, c) \ 311 !!! bus_space_write_multi_8 unimplimented !!! 312 #endif 313 314 /* 315 * void bus_space_write_region_N __P((bus_space_tag_t tag, 316 * bus_space_handle_t bsh, bus_size_t offset, 317 * const u_intN_t *addr, size_t count)); 318 * 319 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided 320 * to bus space described by tag/handle starting at `offset'. 321 */ 322 323 #define bus_space_write_region_1(t, h, o, a, c) do { \ 324 (void) t; \ 325 __asm __volatile (" \ 326 movl %0,a0 ; \ 327 movl %1,a1 ; \ 328 movl %2,d0 ; \ 329 1: movb a1@+,a0@+ ; \ 330 subql #1,d0 ; \ 331 jne 1b" : \ 332 : \ 333 "r" ((h) + (o)), "g" (a), "g" (c) : \ 334 "a0","a1","d0"); \ 335 } while (0); 336 337 #define bus_space_write_region_2(t, h, o, a, c) do { \ 338 (void) t; \ 339 __asm __volatile (" \ 340 movl %0,a0 ; \ 341 movl %1,a1 ; \ 342 movl %2,d0 ; \ 343 1: movw a1@+,a0@+ ; \ 344 subql #1,d0 ; \ 345 jne 1b" : \ 346 : \ 347 "r" ((h) + (o)), "g" (a), "g" (c) : \ 348 "a0","a1","d0"); \ 349 } while (0); 350 351 #define bus_space_write_region_4(t, h, o, a, c) do { \ 352 (void) t; \ 353 __asm __volatile (" \ 354 movl %0,a0 ; \ 355 movl %1,a1 ; \ 356 movl %2,d0 ; \ 357 1: movl a1@+,a0@+ ; \ 358 subql #1,d0 ; \ 359 jne 1b" : \ 360 : \ 361 "r" ((h) + (o)), "g" (a), "g" (c) : \ 362 "a0","a1","d0"); \ 363 } while (0); 364 365 #if 0 /* Cause a link error for bus_space_write_region_8 */ 366 #define bus_space_write_region_8 \ 367 !!! bus_space_write_region_8 unimplemented !!! 368 #endif 369 370 /* 371 * void bus_space_set_multi_N __P((bus_space_tag_t tag, 372 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 373 * size_t count)); 374 * 375 * Write the 1, 2, 4, or 8 byte value `val' to bus space described 376 * by tag/handle/offset `count' times. 377 */ 378 379 #define bus_space_set_multi_1(t, h, o, val, c) do { \ 380 (void) t; \ 381 __asm __volatile (" \ 382 movl %0,a0 ; \ 383 movl %1,d1 ; \ 384 movl %2,d0 ; \ 385 1: movb d1,a0@ ; \ 386 subql #1,d0 ; \ 387 jne 1b" : \ 388 : \ 389 "r" ((h) + (o)), "g" (val), "g" (c) : \ 390 "a0","d0","d1"); \ 391 } while (0); 392 393 #define bus_space_set_multi_2(t, h, o, val, c) do { \ 394 (void) t; \ 395 __asm __volatile (" \ 396 movl %0,a0 ; \ 397 movl %1,d1 ; \ 398 movl %2,d0 ; \ 399 1: movw d1,a0@ ; \ 400 subql #1,d0 ; \ 401 jne 1b" : \ 402 : \ 403 "r" ((h) + (o)), "g" (val), "g" (c) : \ 404 "a0","d0","d1"); \ 405 } while (0); 406 407 #define bus_space_set_multi_4(t, h, o, val, c) do { \ 408 (void) t; \ 409 __asm __volatile (" \ 410 movl %0,a0 ; \ 411 movl %1,d1 ; \ 412 movl %2,d0 ; \ 413 1: movl d1,a0@ ; \ 414 subql #1,d0 ; \ 415 jne 1b" : \ 416 : \ 417 "r" ((h) + (o)), "g" (val), "g" (c) : \ 418 "a0","d0","d1"); \ 419 } while (0); 420 421 #if 0 /* Cause a link error for bus_space_set_multi_8 */ 422 #define bus_space_set_multi_8 \ 423 !!! bus_space_set_multi_8 unimplemented !!! 424 #endif 425 426 /* 427 * void bus_space_set_region_N __P((bus_space_tag_t tag, 428 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val, 429 * size_t count)); 430 * 431 * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described 432 * by tag/handle starting at `offset'. 433 */ 434 435 #define bus_space_set_region_1(t, h, o, val, c) do { \ 436 (void) t; \ 437 __asm __volatile (" \ 438 movl %0,a0 ; \ 439 movl %1,d1 ; \ 440 movl %2,d0 ; \ 441 1: movb d1,a0@+ ; \ 442 subql #1,d0 ; \ 443 jne 1b" : \ 444 : \ 445 "r" ((h) + (o)), "g" (val), "g" (c) : \ 446 "a0","d0","d1"); \ 447 } while (0); 448 449 #define bus_space_set_region_2(t, h, o, val, c) do { \ 450 (void) t; \ 451 __asm __volatile (" \ 452 movl %0,a0 ; \ 453 movl %1,d1 ; \ 454 movl %2,d0 ; \ 455 1: movw d1,a0@+ ; \ 456 subql #1,d0 ; \ 457 jne 1b" : \ 458 : \ 459 "r" ((h) + (o)), "g" (val), "g" (c) : \ 460 "a0","d0","d1"); \ 461 } while (0); 462 463 #define bus_space_set_region_4(t, h, o, val, c) do { \ 464 (void) t; \ 465 __asm __volatile (" \ 466 movl %0,a0 ; \ 467 movl %1,d1 ; \ 468 movl %2,d0 ; \ 469 1: movl d1,a0@+ ; \ 470 subql #1,d0 ; \ 471 jne 1b" : \ 472 : \ 473 "r" ((h) + (o)), "g" (val), "g" (c) : \ 474 "a0","d0","d1"); \ 475 } while (0); 476 477 #if 0 /* Cause a link error for bus_space_set_region_8 */ 478 #define bus_space_set_region_8 \ 479 !!! bus_space_set_region_8 unimplemented !!! 480 #endif 481 482 /* 483 * void bus_space_copy_N __P((bus_space_tag_t tag, 484 * bus_space_handle_t bsh1, bus_size_t off1, 485 * bus_space_handle_t bsh2, bus_size_t off2, 486 * size_t count)); 487 * 488 * Copy `count' 1, 2, 4, or 8 byte values from bus space starting 489 * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2. 490 */ 491 492 #define bus_space_copy_1(t, h1, o1, h2, o2, c) do { \ 493 (void) t; \ 494 __asm __volatile (" \ 495 movl %0,a0 ; \ 496 movl %1,a1 ; \ 497 movl %2,d0 ; \ 498 1: movb a0@+,a1@+ ; \ 499 subql #1,d0 ; \ 500 jne 1b" : \ 501 : \ 502 "r" ((h1) + (o1)), "r" ((h2) + (o2)), "g" (c) : \ 503 "a0","a1","d0"); \ 504 } while (0); 505 506 #define bus_space_copy_2(t, h1, o1, h2, o2, c) do { \ 507 (void) t; \ 508 __asm __volatile (" \ 509 movl %0,a0 ; \ 510 movl %1,a1 ; \ 511 movl %2,d0 ; \ 512 1: movw a0@+,a1@+ ; \ 513 subql #1,d0 ; \ 514 jne 1b" : \ 515 : \ 516 "r" ((h1) + (o1)), "r" ((h2) + (o2)), "g" (c) : \ 517 "a0","a1","d0"); \ 518 } while (0); 519 520 #define bus_space_copy_4(t, h1, o1, h2, o2, c) do { \ 521 (void) t; \ 522 __asm __volatile (" \ 523 movl %0,a0 ; \ 524 movl %1,a1 ; \ 525 movl %2,d0 ; \ 526 1: movl a0@+,a1@+ ; \ 527 subql #1,d0 ; \ 528 jne 1b" : \ 529 : \ 530 "r" ((h1) + (o1)), "r" ((h2) + (o2)), "g" (c) : \ 531 "a0","a1","d0"); \ 532 } while (0); 533 534 #if 0 /* Cause a link error for bus_space_copy_8 */ 535 #define bus_space_copy_8 \ 536 !!! bus_space_copy_8 unimplemented !!! 537 #endif 538 539 /* 540 * Bus read/write barrier methods. 541 * 542 * void bus_space_barrier __P((bus_space_tag_t tag, 543 * bus_space_handle_t bsh, bus_size_t offset, 544 * bus_size_t len, int flags)); 545 * 546 * Note: the 680x0 does not currently require barriers, but we must 547 * provide the flags to MI code. 548 */ 549 #define bus_space_barrier(t, h, o, l, f) \ 550 ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f))) 551 #define BUS_BARRIER_READ 0x01 /* force read barrier */ 552 #define BUS_BARRIER_WRITE 0x02 /* force write barrier */ 553 554 /* 555 * Machine-dependent extensions. 556 */ 557 int bus_probe __P((bus_space_tag_t t, bus_space_handle_t bsh, 558 bus_size_t offset, int sz)); 559 560 #endif /* _MAC68K_BUS_H_ */ 561
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