cpu.h revision 1.45 1 1.45 scottr /* $NetBSD: cpu.h,v 1.45 1997/02/10 22:13:40 scottr Exp $ */
2 1.16 cgd
3 1.1 briggs /*
4 1.1 briggs * Copyright (c) 1988 University of Utah.
5 1.1 briggs * Copyright (c) 1982, 1990 The Regents of the University of California.
6 1.1 briggs * All rights reserved.
7 1.1 briggs *
8 1.1 briggs * This code is derived from software contributed to Berkeley by
9 1.1 briggs * the Systems Programming Group of the University of Utah Computer
10 1.1 briggs * Science Department.
11 1.1 briggs *
12 1.1 briggs * Redistribution and use in source and binary forms, with or without
13 1.1 briggs * modification, are permitted provided that the following conditions
14 1.1 briggs * are met:
15 1.1 briggs * 1. Redistributions of source code must retain the above copyright
16 1.1 briggs * notice, this list of conditions and the following disclaimer.
17 1.1 briggs * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 briggs * notice, this list of conditions and the following disclaimer in the
19 1.1 briggs * documentation and/or other materials provided with the distribution.
20 1.1 briggs * 3. All advertising materials mentioning features or use of this software
21 1.1 briggs * must display the following acknowledgement:
22 1.1 briggs * This product includes software developed by the University of
23 1.1 briggs * California, Berkeley and its contributors.
24 1.1 briggs * 4. Neither the name of the University nor the names of its contributors
25 1.1 briggs * may be used to endorse or promote products derived from this software
26 1.1 briggs * without specific prior written permission.
27 1.1 briggs *
28 1.1 briggs * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 1.1 briggs * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 1.1 briggs * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 1.1 briggs * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 1.1 briggs * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 1.1 briggs * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 1.1 briggs * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 1.1 briggs * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 1.1 briggs * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 1.1 briggs * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 1.1 briggs * SUCH DAMAGE.
39 1.1 briggs */
40 1.2 briggs
41 1.2 briggs /*
42 1.2 briggs * Copyright (c) 1992, 1993 BCDL Labs. All rights reserved.
43 1.2 briggs * Allen Briggs, Chris Caputo, Michael Finch, Brad Grantham, Lawrence Kesteloot
44 1.2 briggs
45 1.2 briggs * Redistribution of this source code or any part thereof is permitted,
46 1.2 briggs * provided that the following conditions are met:
47 1.2 briggs * 1) Utilized source contains the copyright message above, this list
48 1.2 briggs * of conditions, and the following disclaimer.
49 1.2 briggs * 2) Binary objects containing compiled source reproduce the
50 1.2 briggs * copyright notice above on startup.
51 1.1 briggs *
52 1.2 briggs * CAVEAT: This source code is provided "as-is" by BCDL Labs, and any
53 1.2 briggs * warranties of ANY kind are disclaimed. We don't even claim that it
54 1.2 briggs * won't crash your hard disk. Basically, we want a little credit if
55 1.2 briggs * it works, but we don't want to get mail-bombed if it doesn't.
56 1.1 briggs */
57 1.1 briggs
58 1.1 briggs /*
59 1.1 briggs * from: Utah $Hdr: cpu.h 1.16 91/03/25$
60 1.1 briggs *
61 1.16 cgd * @(#)cpu.h 7.7 (Berkeley) 6/27/91
62 1.1 briggs */
63 1.1 briggs
64 1.1 briggs /*
65 1.1 briggs ALICE
66 1.1 briggs BG -- Sat May 23 23:58:23 EDT 1992
67 1.3 briggs Exported defines and stuff unique to mac68k.
68 1.3 briggs A lot of this stuff is really specific to the m68k, not just the macs,
69 1.3 briggs but there isn't time to do anything about that right now...
70 1.1 briggs */
71 1.1 briggs
72 1.29 briggs #ifndef _CPU_MACHINE_
73 1.29 briggs #define _CPU_MACHINE_
74 1.32 briggs
75 1.32 briggs #include <machine/pcb.h>
76 1.8 briggs
77 1.1 briggs /*
78 1.41 thorpej * Get common m68k definitions.
79 1.41 thorpej */
80 1.41 thorpej #include <m68k/cpu.h>
81 1.41 thorpej #define M68K_MMU_MOTOROLA
82 1.41 thorpej
83 1.41 thorpej /*
84 1.1 briggs * definitions of cpu-dependent requirements
85 1.1 briggs * referenced in generic code
86 1.1 briggs */
87 1.11 briggs #define cpu_swapin(p) /* nothing */
88 1.11 briggs #define cpu_wait(p) /* nothing */
89 1.26 mycroft #define cpu_swapout(p) /* nothing */
90 1.29 briggs void cpu_set_kpc __P((struct proc *, void (*)(struct proc *)));
91 1.1 briggs
92 1.1 briggs /*
93 1.1 briggs * Arguments to hardclock, softclock and gatherstats
94 1.1 briggs * encapsulate the previous machine state in an opaque
95 1.1 briggs * clockframe; for hp300, use just what the hardware
96 1.1 briggs * leaves on the stack.
97 1.1 briggs */
98 1.1 briggs
99 1.10 briggs struct clockframe {
100 1.11 briggs u_short sr;
101 1.11 briggs u_long pc;
102 1.11 briggs u_short vo;
103 1.10 briggs };
104 1.1 briggs
105 1.11 briggs #define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0)
106 1.11 briggs #define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0)
107 1.1 briggs #define CLKF_PC(framep) ((framep)->pc)
108 1.11 briggs #define CLKF_INTR(framep) (0) /* XXX should use PSL_M (see hp300) */
109 1.1 briggs
110 1.1 briggs /*
111 1.1 briggs * Preempt the current process if in interrupt from user mode,
112 1.1 briggs * or after the current trap/syscall if in system mode.
113 1.1 briggs */
114 1.1 briggs #define need_resched() { want_resched++; aston(); }
115 1.1 briggs
116 1.1 briggs /*
117 1.1 briggs * Give a profiling tick to the current process from the softclock
118 1.1 briggs * interrupt. Request an ast to send us through trap(),
119 1.1 briggs * marking the proc as needing a profiling tick.
120 1.1 briggs */
121 1.10 briggs #define need_proftick(p) ( (p)->p_flag |= P_OWEUPC, aston() )
122 1.1 briggs
123 1.1 briggs /*
124 1.1 briggs * Notify the current process (p) that it has a signal pending,
125 1.1 briggs * process as soon as possible.
126 1.1 briggs */
127 1.1 briggs #define signotify(p) aston()
128 1.1 briggs
129 1.1 briggs #define aston() (astpending++)
130 1.1 briggs
131 1.22 briggs int astpending; /* need to trap before returning to user mode */
132 1.22 briggs int want_resched; /* resched() was called */
133 1.1 briggs
134 1.1 briggs /*
135 1.1 briggs * simulated software interrupt register
136 1.1 briggs */
137 1.44 scottr extern volatile u_int8_t ssir;
138 1.1 briggs
139 1.44 scottr #define SIR_NET 0x01
140 1.44 scottr #define SIR_CLOCK 0x02
141 1.44 scottr #define SIR_SERIAL 0x04
142 1.1 briggs
143 1.44 scottr #define siroff(mask) \
144 1.44 scottr __asm __volatile ( "andb %0,_ssir" : : "ir" (~(mask)));
145 1.44 scottr #define setsoftnet() \
146 1.44 scottr __asm __volatile ( "orb %0,_ssir" : : "i" (SIR_NET))
147 1.44 scottr #define setsoftclock() \
148 1.44 scottr __asm __volatile ( "orb %0,_ssir" : : "i" (SIR_CLOCK))
149 1.44 scottr #define setsoftserial() \
150 1.44 scottr __asm __volatile ( "orb %0,_ssir" : : "i" (SIR_SERIAL))
151 1.1 briggs
152 1.11 briggs #define CPU_CONSDEV 1
153 1.11 briggs #define CPU_MAXID 2
154 1.11 briggs
155 1.11 briggs #define CTL_MACHDEP_NAMES { \
156 1.11 briggs { 0, 0 }, \
157 1.11 briggs { "console_device", CTLTYPE_STRUCT }, \
158 1.11 briggs }
159 1.1 briggs
160 1.7 briggs /* values for machineid --
161 1.7 briggs * These are equivalent to the MacOS Gestalt values. */
162 1.7 briggs #define MACH_MACII 6
163 1.7 briggs #define MACH_MACIIX 7
164 1.7 briggs #define MACH_MACIICX 8
165 1.2 briggs #define MACH_MACSE30 9
166 1.7 briggs #define MACH_MACIICI 11
167 1.7 briggs #define MACH_MACIIFX 13
168 1.7 briggs #define MACH_MACIISI 18
169 1.5 briggs #define MACH_MACQ900 20
170 1.5 briggs #define MACH_MACPB170 21
171 1.5 briggs #define MACH_MACQ700 22
172 1.7 briggs #define MACH_MACCLASSICII 23
173 1.7 briggs #define MACH_MACPB100 24
174 1.5 briggs #define MACH_MACPB140 25
175 1.7 briggs #define MACH_MACQ950 26
176 1.7 briggs #define MACH_MACLCIII 27
177 1.7 briggs #define MACH_MACPB210 29
178 1.7 briggs #define MACH_MACC650 30
179 1.7 briggs #define MACH_MACPB230 32
180 1.7 briggs #define MACH_MACPB180 33
181 1.7 briggs #define MACH_MACPB160 34
182 1.7 briggs #define MACH_MACQ800 35
183 1.7 briggs #define MACH_MACQ650 36
184 1.6 briggs #define MACH_MACLCII 37
185 1.7 briggs #define MACH_MACPB250 38
186 1.7 briggs #define MACH_MACIIVI 44
187 1.7 briggs #define MACH_MACP600 45
188 1.7 briggs #define MACH_MACIIVX 48
189 1.7 briggs #define MACH_MACCCLASSIC 49
190 1.7 briggs #define MACH_MACPB165C 50
191 1.7 briggs #define MACH_MACC610 52
192 1.7 briggs #define MACH_MACQ610 53
193 1.7 briggs #define MACH_MACPB145 54
194 1.7 briggs #define MACH_MACLC520 56
195 1.7 briggs #define MACH_MACC660AV 60
196 1.7 briggs #define MACH_MACP460 62
197 1.7 briggs #define MACH_MACPB180C 71
198 1.38 scottr #define MACH_MACPB500 72
199 1.7 briggs #define MACH_MACPB270 77
200 1.7 briggs #define MACH_MACQ840AV 78
201 1.7 briggs #define MACH_MACP550 80
202 1.42 scottr #define MACH_MACCCLASSICII 83
203 1.7 briggs #define MACH_MACPB165 84
204 1.7 briggs #define MACH_MACTV 88
205 1.7 briggs #define MACH_MACLC475 89
206 1.7 briggs #define MACH_MACLC575 92
207 1.7 briggs #define MACH_MACQ605 94
208 1.27 briggs #define MACH_MACQ630 98
209 1.27 briggs #define MACH_MACPB280 102
210 1.27 briggs #define MACH_MACPB280C 103
211 1.27 briggs #define MACH_MACPB150 115
212 1.1 briggs
213 1.13 briggs /*
214 1.13 briggs * Machine classes. These define subsets of the above machines.
215 1.13 briggs */
216 1.13 briggs #define MACH_CLASSH 0x0000 /* Hopeless cases... */
217 1.13 briggs #define MACH_CLASSII 0x0001 /* MacII class */
218 1.25 briggs #define MACH_CLASSIIci 0x0004 /* Have RBV, but no Egret */
219 1.25 briggs #define MACH_CLASSIIsi 0x0005 /* Similar to IIci -- Have Egret. */
220 1.25 briggs #define MACH_CLASSIIvx 0x0006 /* Similar to IIsi -- different via2 emul? */
221 1.25 briggs #define MACH_CLASSLC 0x0007 /* Low-Cost/Performa/Wal-Mart Macs. */
222 1.13 briggs #define MACH_CLASSPB 0x0008 /* Powerbooks. Power management. */
223 1.35 briggs #define MACH_CLASSDUO 0x0009 /* Powerbooks Duos. More integration/Docks. */
224 1.25 briggs #define MACH_CLASSIIfx 0x0080 /* The IIfx is in a class by itself. */
225 1.36 briggs #define MACH_CLASSQ 0x0100 /* non-A/V Centris/Quadras. */
226 1.36 briggs #define MACH_CLASSAV 0x0101 /* A/V Centris/Quadras. */
227 1.43 scottr #define MACH_CLASSQ2 0x0102 /* More Centris/Quadras, different sccA. */
228 1.13 briggs
229 1.1 briggs #define MACH_68020 0
230 1.1 briggs #define MACH_68030 1
231 1.1 briggs #define MACH_68040 2
232 1.1 briggs #define MACH_PENTIUM 3 /* 66 and 99 MHz versions *only* */
233 1.1 briggs
234 1.18 briggs #ifdef _KERNEL
235 1.13 briggs struct mac68k_machine_S {
236 1.13 briggs int cpu_model_index;
237 1.13 briggs /*
238 1.13 briggs * Misc. info from booter.
239 1.13 briggs */
240 1.13 briggs int machineid;
241 1.13 briggs int mach_processor;
242 1.13 briggs int mach_memsize;
243 1.13 briggs int booter_version;
244 1.13 briggs /*
245 1.13 briggs * Debugging flags.
246 1.13 briggs */
247 1.13 briggs int do_graybars;
248 1.13 briggs int serial_boot_echo;
249 1.15 briggs int serial_console;
250 1.37 briggs int modem_flags;
251 1.37 briggs int modem_cts_clk;
252 1.37 briggs int modem_dcd_clk;
253 1.37 briggs int print_flags;
254 1.37 briggs int print_cts_clk;
255 1.37 briggs int print_dcd_clk;
256 1.13 briggs /*
257 1.13 briggs * Misc. hardware info.
258 1.13 briggs */
259 1.13 briggs int scsi80; /* Has NCR 5380 */
260 1.13 briggs int scsi96; /* Has NCR 53C96 */
261 1.13 briggs int scsi96_2; /* Has 2nd 53C96 */
262 1.14 briggs int sonic; /* Has SONIC e-net */
263 1.13 briggs
264 1.13 briggs int sccClkConst; /* "Constant" for SCC bps */
265 1.13 briggs };
266 1.13 briggs
267 1.17 briggs /* What kind of model is this */
268 1.17 briggs struct cpu_model_info {
269 1.17 briggs int machineid; /* MacOS Gestalt value. */
270 1.17 briggs char *model_major; /* Make this distinction to save a few */
271 1.17 briggs char *model_minor; /* bytes--might be useful, too. */
272 1.17 briggs int class; /* Rough class of machine. */
273 1.17 briggs /* forwarded romvec_s is defined in mac68k/macrom.h */
274 1.17 briggs struct romvec_s *rom_vectors; /* Pointer to our known rom vectors */
275 1.17 briggs };
276 1.17 briggs extern struct cpu_model_info *current_mac_model;
277 1.17 briggs
278 1.13 briggs extern unsigned long IOBase; /* Base address of I/O */
279 1.13 briggs extern unsigned long NuBusBase; /* Base address of NuBus */
280 1.11 briggs
281 1.13 briggs extern struct mac68k_machine_S mac68k_machine;
282 1.24 briggs extern unsigned long load_addr;
283 1.18 briggs #endif /* _KERNEL */
284 1.1 briggs
285 1.1 briggs /* physical memory sections */
286 1.17 briggs #define ROMBASE (0x40800000)
287 1.36 briggs #define ROMLEN (0x00200000) /* 2MB will work for all 68k */
288 1.36 briggs #define ROMMAPSIZE btoc(ROMLEN) /* 32k of page tables. */
289 1.13 briggs
290 1.28 briggs #define IIOMAPSIZE btoc(0x00100000) /* 1MB should be enough */
291 1.1 briggs
292 1.23 briggs /* XXX -- Need to do something about superspace.
293 1.23 briggs * Technically, NuBus superspace starts at 0x60000000, but no
294 1.23 briggs * known Macintosh has used any slot lower numbered than 9, and
295 1.23 briggs * the super space is defined as 0xS000 0000 through 0xSFFF FFFF
296 1.23 briggs * where S is the slot number--ranging from 0x9 - 0xE.
297 1.23 briggs */
298 1.23 briggs #define NBSBASE 0x90000000
299 1.1 briggs #define NBSTOP 0xF0000000
300 1.1 briggs #define NBBASE 0xF9000000 /* NUBUS space */
301 1.1 briggs #define NBTOP 0xFF000000 /* NUBUS space */
302 1.1 briggs #define NBMAPSIZE btoc(NBTOP-NBBASE) /* ~ 96 megs */
303 1.1 briggs #define NBMEMSIZE 0x01000000 /* 16 megs per card */
304 1.1 briggs #define NBROMOFFSET 0x00FF0000 /* Last 64K == ROM */
305 1.30 briggs
306 1.30 briggs __BEGIN_DECLS
307 1.31 briggs /* machdep.c */
308 1.45 scottr void mac68k_set_bell_callback __P((int (*)(void *, int, int, int), void *));
309 1.45 scottr int mac68k_ring_bell __P((int, int, int));
310 1.45 scottr u_int get_mapping __P((void));
311 1.31 briggs
312 1.31 briggs /* locore.s */
313 1.34 briggs void m68881_restore __P((struct fpframe *));
314 1.31 briggs void m68881_save __P((struct fpframe *));
315 1.31 briggs u_int getsfc __P((void));
316 1.31 briggs u_int getdfc __P((void));
317 1.31 briggs void TBIA __P((void));
318 1.31 briggs void TBIAS __P((void));
319 1.31 briggs void TBIS __P((vm_offset_t));
320 1.31 briggs void DCFP __P((vm_offset_t));
321 1.31 briggs void ICPP __P((vm_offset_t));
322 1.31 briggs void DCIU __P((void));
323 1.31 briggs void ICIA __P((void));
324 1.31 briggs void DCFL __P((vm_offset_t));
325 1.31 briggs int suline __P((caddr_t, caddr_t));
326 1.31 briggs void savectx __P((struct pcb *));
327 1.31 briggs void proc_trampoline __P((void));
328 1.31 briggs
329 1.31 briggs /* trap.c */
330 1.31 briggs void child_return __P((struct proc *, struct frame));
331 1.31 briggs
332 1.30 briggs __END_DECLS
333 1.8 briggs
334 1.29 briggs #endif /* _CPU_MACHINE_ */
335