cpu.h revision 1.62 1 1.62 briggs /* $NetBSD: cpu.h,v 1.62 1999/06/28 01:56:57 briggs Exp $ */
2 1.16 cgd
3 1.1 briggs /*
4 1.1 briggs * Copyright (c) 1988 University of Utah.
5 1.1 briggs * Copyright (c) 1982, 1990 The Regents of the University of California.
6 1.1 briggs * All rights reserved.
7 1.1 briggs *
8 1.1 briggs * This code is derived from software contributed to Berkeley by
9 1.1 briggs * the Systems Programming Group of the University of Utah Computer
10 1.1 briggs * Science Department.
11 1.1 briggs *
12 1.1 briggs * Redistribution and use in source and binary forms, with or without
13 1.1 briggs * modification, are permitted provided that the following conditions
14 1.1 briggs * are met:
15 1.1 briggs * 1. Redistributions of source code must retain the above copyright
16 1.1 briggs * notice, this list of conditions and the following disclaimer.
17 1.1 briggs * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 briggs * notice, this list of conditions and the following disclaimer in the
19 1.1 briggs * documentation and/or other materials provided with the distribution.
20 1.1 briggs * 3. All advertising materials mentioning features or use of this software
21 1.1 briggs * must display the following acknowledgement:
22 1.1 briggs * This product includes software developed by the University of
23 1.1 briggs * California, Berkeley and its contributors.
24 1.1 briggs * 4. Neither the name of the University nor the names of its contributors
25 1.1 briggs * may be used to endorse or promote products derived from this software
26 1.1 briggs * without specific prior written permission.
27 1.1 briggs *
28 1.1 briggs * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 1.1 briggs * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 1.1 briggs * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 1.1 briggs * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 1.1 briggs * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 1.1 briggs * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 1.1 briggs * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 1.1 briggs * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 1.1 briggs * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 1.1 briggs * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 1.1 briggs * SUCH DAMAGE.
39 1.1 briggs */
40 1.2 briggs
41 1.2 briggs /*
42 1.2 briggs * Copyright (c) 1992, 1993 BCDL Labs. All rights reserved.
43 1.2 briggs * Allen Briggs, Chris Caputo, Michael Finch, Brad Grantham, Lawrence Kesteloot
44 1.2 briggs
45 1.2 briggs * Redistribution of this source code or any part thereof is permitted,
46 1.2 briggs * provided that the following conditions are met:
47 1.2 briggs * 1) Utilized source contains the copyright message above, this list
48 1.2 briggs * of conditions, and the following disclaimer.
49 1.2 briggs * 2) Binary objects containing compiled source reproduce the
50 1.2 briggs * copyright notice above on startup.
51 1.1 briggs *
52 1.2 briggs * CAVEAT: This source code is provided "as-is" by BCDL Labs, and any
53 1.2 briggs * warranties of ANY kind are disclaimed. We don't even claim that it
54 1.2 briggs * won't crash your hard disk. Basically, we want a little credit if
55 1.2 briggs * it works, but we don't want to get mail-bombed if it doesn't.
56 1.1 briggs */
57 1.1 briggs
58 1.1 briggs /*
59 1.1 briggs * from: Utah $Hdr: cpu.h 1.16 91/03/25$
60 1.1 briggs *
61 1.16 cgd * @(#)cpu.h 7.7 (Berkeley) 6/27/91
62 1.1 briggs */
63 1.1 briggs
64 1.29 briggs #ifndef _CPU_MACHINE_
65 1.29 briggs #define _CPU_MACHINE_
66 1.32 briggs
67 1.48 scottr /*
68 1.48 scottr * Exported definitions unique to mac68k/68k cpu support.
69 1.48 scottr */
70 1.8 briggs
71 1.1 briggs /*
72 1.41 thorpej * Get common m68k definitions.
73 1.41 thorpej */
74 1.41 thorpej #include <m68k/cpu.h>
75 1.41 thorpej #define M68K_MMU_MOTOROLA
76 1.41 thorpej
77 1.41 thorpej /*
78 1.47 scottr * Get interrupt glue.
79 1.47 scottr */
80 1.47 scottr #include <machine/intr.h>
81 1.47 scottr
82 1.47 scottr /*
83 1.1 briggs * definitions of cpu-dependent requirements
84 1.1 briggs * referenced in generic code
85 1.1 briggs */
86 1.11 briggs #define cpu_swapin(p) /* nothing */
87 1.11 briggs #define cpu_wait(p) /* nothing */
88 1.26 mycroft #define cpu_swapout(p) /* nothing */
89 1.1 briggs
90 1.1 briggs /*
91 1.48 scottr * Arguments to hardclock and gatherstats encapsulate the previous
92 1.48 scottr * machine state in an opaque clockframe. One the hp300, we use
93 1.48 scottr * what the hardware pushes on an interrupt (frame format 0).
94 1.1 briggs */
95 1.10 briggs struct clockframe {
96 1.48 scottr u_short sr; /* sr at time of interrupt */
97 1.48 scottr u_long pc; /* pc at time of interrupt */
98 1.48 scottr u_short vo; /* vector offset (4-word frame) */
99 1.10 briggs };
100 1.1 briggs
101 1.11 briggs #define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0)
102 1.11 briggs #define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0)
103 1.1 briggs #define CLKF_PC(framep) ((framep)->pc)
104 1.11 briggs #define CLKF_INTR(framep) (0) /* XXX should use PSL_M (see hp300) */
105 1.1 briggs
106 1.1 briggs /*
107 1.1 briggs * Preempt the current process if in interrupt from user mode,
108 1.1 briggs * or after the current trap/syscall if in system mode.
109 1.1 briggs */
110 1.54 scottr extern int want_resched; /* resched() was called */
111 1.1 briggs #define need_resched() { want_resched++; aston(); }
112 1.1 briggs
113 1.1 briggs /*
114 1.1 briggs * Give a profiling tick to the current process from the softclock
115 1.1 briggs * interrupt. Request an ast to send us through trap(),
116 1.1 briggs * marking the proc as needing a profiling tick.
117 1.1 briggs */
118 1.10 briggs #define need_proftick(p) ( (p)->p_flag |= P_OWEUPC, aston() )
119 1.1 briggs
120 1.1 briggs /*
121 1.1 briggs * Notify the current process (p) that it has a signal pending,
122 1.1 briggs * process as soon as possible.
123 1.1 briggs */
124 1.1 briggs #define signotify(p) aston()
125 1.1 briggs
126 1.54 scottr extern int astpending; /* need to trap before returning to user mode */
127 1.1 briggs #define aston() (astpending++)
128 1.1 briggs
129 1.11 briggs #define CPU_CONSDEV 1
130 1.11 briggs #define CPU_MAXID 2
131 1.11 briggs
132 1.11 briggs #define CTL_MACHDEP_NAMES { \
133 1.11 briggs { 0, 0 }, \
134 1.11 briggs { "console_device", CTLTYPE_STRUCT }, \
135 1.11 briggs }
136 1.1 briggs
137 1.7 briggs /* values for machineid --
138 1.7 briggs * These are equivalent to the MacOS Gestalt values. */
139 1.7 briggs #define MACH_MACII 6
140 1.7 briggs #define MACH_MACIIX 7
141 1.7 briggs #define MACH_MACIICX 8
142 1.2 briggs #define MACH_MACSE30 9
143 1.7 briggs #define MACH_MACIICI 11
144 1.7 briggs #define MACH_MACIIFX 13
145 1.7 briggs #define MACH_MACIISI 18
146 1.5 briggs #define MACH_MACQ900 20
147 1.5 briggs #define MACH_MACPB170 21
148 1.5 briggs #define MACH_MACQ700 22
149 1.7 briggs #define MACH_MACCLASSICII 23
150 1.7 briggs #define MACH_MACPB100 24
151 1.5 briggs #define MACH_MACPB140 25
152 1.7 briggs #define MACH_MACQ950 26
153 1.7 briggs #define MACH_MACLCIII 27
154 1.7 briggs #define MACH_MACPB210 29
155 1.7 briggs #define MACH_MACC650 30
156 1.7 briggs #define MACH_MACPB230 32
157 1.7 briggs #define MACH_MACPB180 33
158 1.7 briggs #define MACH_MACPB160 34
159 1.7 briggs #define MACH_MACQ800 35
160 1.7 briggs #define MACH_MACQ650 36
161 1.6 briggs #define MACH_MACLCII 37
162 1.7 briggs #define MACH_MACPB250 38
163 1.7 briggs #define MACH_MACIIVI 44
164 1.7 briggs #define MACH_MACP600 45
165 1.7 briggs #define MACH_MACIIVX 48
166 1.7 briggs #define MACH_MACCCLASSIC 49
167 1.7 briggs #define MACH_MACPB165C 50
168 1.7 briggs #define MACH_MACC610 52
169 1.7 briggs #define MACH_MACQ610 53
170 1.7 briggs #define MACH_MACPB145 54
171 1.7 briggs #define MACH_MACLC520 56
172 1.7 briggs #define MACH_MACC660AV 60
173 1.7 briggs #define MACH_MACP460 62
174 1.7 briggs #define MACH_MACPB180C 71
175 1.38 scottr #define MACH_MACPB500 72
176 1.7 briggs #define MACH_MACPB270 77
177 1.7 briggs #define MACH_MACQ840AV 78
178 1.7 briggs #define MACH_MACP550 80
179 1.42 scottr #define MACH_MACCCLASSICII 83
180 1.7 briggs #define MACH_MACPB165 84
181 1.7 briggs #define MACH_MACTV 88
182 1.7 briggs #define MACH_MACLC475 89
183 1.51 briggs #define MACH_MACLC475_33 90
184 1.7 briggs #define MACH_MACLC575 92
185 1.7 briggs #define MACH_MACQ605 94
186 1.51 briggs #define MACH_MACQ605_33 95
187 1.27 briggs #define MACH_MACQ630 98
188 1.54 scottr #define MACH_MACP580 99
189 1.27 briggs #define MACH_MACPB280 102
190 1.27 briggs #define MACH_MACPB280C 103
191 1.27 briggs #define MACH_MACPB150 115
192 1.55 scottr #define MACH_MACPB190 122
193 1.1 briggs
194 1.13 briggs /*
195 1.13 briggs * Machine classes. These define subsets of the above machines.
196 1.13 briggs */
197 1.13 briggs #define MACH_CLASSH 0x0000 /* Hopeless cases... */
198 1.13 briggs #define MACH_CLASSII 0x0001 /* MacII class */
199 1.25 briggs #define MACH_CLASSIIci 0x0004 /* Have RBV, but no Egret */
200 1.25 briggs #define MACH_CLASSIIsi 0x0005 /* Similar to IIci -- Have Egret. */
201 1.25 briggs #define MACH_CLASSIIvx 0x0006 /* Similar to IIsi -- different via2 emul? */
202 1.25 briggs #define MACH_CLASSLC 0x0007 /* Low-Cost/Performa/Wal-Mart Macs. */
203 1.13 briggs #define MACH_CLASSPB 0x0008 /* Powerbooks. Power management. */
204 1.35 briggs #define MACH_CLASSDUO 0x0009 /* Powerbooks Duos. More integration/Docks. */
205 1.25 briggs #define MACH_CLASSIIfx 0x0080 /* The IIfx is in a class by itself. */
206 1.36 briggs #define MACH_CLASSQ 0x0100 /* non-A/V Centris/Quadras. */
207 1.36 briggs #define MACH_CLASSAV 0x0101 /* A/V Centris/Quadras. */
208 1.43 scottr #define MACH_CLASSQ2 0x0102 /* More Centris/Quadras, different sccA. */
209 1.54 scottr #define MACH_CLASSP580 0x0103 /* Similar to Quadras, but not quite.. */
210 1.13 briggs
211 1.1 briggs #define MACH_68020 0
212 1.1 briggs #define MACH_68030 1
213 1.1 briggs #define MACH_68040 2
214 1.1 briggs #define MACH_PENTIUM 3 /* 66 and 99 MHz versions *only* */
215 1.1 briggs
216 1.18 briggs #ifdef _KERNEL
217 1.13 briggs struct mac68k_machine_S {
218 1.13 briggs int cpu_model_index;
219 1.13 briggs /*
220 1.13 briggs * Misc. info from booter.
221 1.13 briggs */
222 1.13 briggs int machineid;
223 1.13 briggs int mach_processor;
224 1.13 briggs int mach_memsize;
225 1.13 briggs int booter_version;
226 1.13 briggs /*
227 1.13 briggs * Debugging flags.
228 1.13 briggs */
229 1.13 briggs int do_graybars;
230 1.13 briggs int serial_boot_echo;
231 1.15 briggs int serial_console;
232 1.52 scottr
233 1.52 scottr int zs_chip; /* what type of chip we've got */
234 1.37 briggs int modem_flags;
235 1.37 briggs int modem_cts_clk;
236 1.37 briggs int modem_dcd_clk;
237 1.52 scottr int modem_d_speed;
238 1.37 briggs int print_flags;
239 1.37 briggs int print_cts_clk;
240 1.37 briggs int print_dcd_clk;
241 1.52 scottr int print_d_speed;
242 1.13 briggs /*
243 1.13 briggs * Misc. hardware info.
244 1.13 briggs */
245 1.13 briggs int scsi80; /* Has NCR 5380 */
246 1.13 briggs int scsi96; /* Has NCR 53C96 */
247 1.13 briggs int scsi96_2; /* Has 2nd 53C96 */
248 1.14 briggs int sonic; /* Has SONIC e-net */
249 1.62 briggs
250 1.62 briggs int via1_ipl;
251 1.62 briggs int via2_ipl;
252 1.62 briggs int aux_interrupts;
253 1.13 briggs };
254 1.13 briggs
255 1.17 briggs /* What kind of model is this */
256 1.17 briggs struct cpu_model_info {
257 1.17 briggs int machineid; /* MacOS Gestalt value. */
258 1.17 briggs char *model_major; /* Make this distinction to save a few */
259 1.17 briggs char *model_minor; /* bytes--might be useful, too. */
260 1.17 briggs int class; /* Rough class of machine. */
261 1.17 briggs /* forwarded romvec_s is defined in mac68k/macrom.h */
262 1.17 briggs struct romvec_s *rom_vectors; /* Pointer to our known rom vectors */
263 1.17 briggs };
264 1.17 briggs extern struct cpu_model_info *current_mac_model;
265 1.17 briggs
266 1.13 briggs extern unsigned long IOBase; /* Base address of I/O */
267 1.13 briggs extern unsigned long NuBusBase; /* Base address of NuBus */
268 1.11 briggs
269 1.13 briggs extern struct mac68k_machine_S mac68k_machine;
270 1.24 briggs extern unsigned long load_addr;
271 1.18 briggs #endif /* _KERNEL */
272 1.1 briggs
273 1.1 briggs /* physical memory sections */
274 1.17 briggs #define ROMBASE (0x40800000)
275 1.36 briggs #define ROMLEN (0x00200000) /* 2MB will work for all 68k */
276 1.36 briggs #define ROMMAPSIZE btoc(ROMLEN) /* 32k of page tables. */
277 1.13 briggs
278 1.28 briggs #define IIOMAPSIZE btoc(0x00100000) /* 1MB should be enough */
279 1.1 briggs
280 1.23 briggs /* XXX -- Need to do something about superspace.
281 1.23 briggs * Technically, NuBus superspace starts at 0x60000000, but no
282 1.23 briggs * known Macintosh has used any slot lower numbered than 9, and
283 1.23 briggs * the super space is defined as 0xS000 0000 through 0xSFFF FFFF
284 1.23 briggs * where S is the slot number--ranging from 0x9 - 0xE.
285 1.23 briggs */
286 1.23 briggs #define NBSBASE 0x90000000
287 1.1 briggs #define NBSTOP 0xF0000000
288 1.1 briggs #define NBBASE 0xF9000000 /* NUBUS space */
289 1.1 briggs #define NBTOP 0xFF000000 /* NUBUS space */
290 1.1 briggs #define NBMAPSIZE btoc(NBTOP-NBBASE) /* ~ 96 megs */
291 1.1 briggs #define NBMEMSIZE 0x01000000 /* 16 megs per card */
292 1.1 briggs #define NBROMOFFSET 0x00FF0000 /* Last 64K == ROM */
293 1.30 briggs
294 1.48 scottr #ifdef _KERNEL
295 1.48 scottr
296 1.48 scottr struct frame;
297 1.48 scottr struct fpframe;
298 1.48 scottr struct pcb;
299 1.48 scottr
300 1.31 briggs /* machdep.c */
301 1.45 scottr void mac68k_set_bell_callback __P((int (*)(void *, int, int, int), void *));
302 1.45 scottr int mac68k_ring_bell __P((int, int, int));
303 1.45 scottr u_int get_mapping __P((void));
304 1.31 briggs
305 1.57 scottr /* locore.s functions */
306 1.57 scottr void m68881_save __P((struct fpframe *));
307 1.34 briggs void m68881_restore __P((struct fpframe *));
308 1.57 scottr void DCIA __P((void));
309 1.57 scottr void DCIS __P((void));
310 1.57 scottr void DCIU __P((void));
311 1.57 scottr void ICIA __P((void));
312 1.57 scottr void ICPA __P((void));
313 1.57 scottr void PCIA __P((void));
314 1.31 briggs void TBIA __P((void));
315 1.57 scottr void TBIS __P((vaddr_t));
316 1.31 briggs void TBIAS __P((void));
317 1.57 scottr void TBIAU __P((void));
318 1.57 scottr #if defined(M68040)
319 1.57 scottr void DCFA __P((void));
320 1.57 scottr void DCFP __P((paddr_t));
321 1.57 scottr void DCFL __P((paddr_t));
322 1.57 scottr void DCPL __P((paddr_t));
323 1.57 scottr void DCPP __P((paddr_t));
324 1.57 scottr void ICPL __P((paddr_t));
325 1.57 scottr void ICPP __P((paddr_t));
326 1.57 scottr #endif
327 1.31 briggs int suline __P((caddr_t, caddr_t));
328 1.31 briggs void savectx __P((struct pcb *));
329 1.57 scottr void switch_exit __P((struct proc *));
330 1.31 briggs void proc_trampoline __P((void));
331 1.57 scottr void loadustp __P((int));
332 1.58 is
333 1.58 is /* sys_machdep.c */
334 1.60 is int cachectl1 __P((unsigned long, vaddr_t, size_t, struct proc *));
335 1.31 briggs
336 1.46 briggs /* vm_machdep.c */
337 1.46 briggs void physaccess __P((caddr_t, caddr_t, register int, register int));
338 1.46 briggs void physunaccess __P((caddr_t, register int));
339 1.61 scottr int kvtop __P((caddr_t));
340 1.56 thorpej
341 1.56 thorpej /* trap.c */
342 1.56 thorpej void child_return __P((void *));
343 1.31 briggs
344 1.48 scottr #endif
345 1.8 briggs
346 1.29 briggs #endif /* _CPU_MACHINE_ */
347