cpu.h revision 1.67.8.4 1 1.67.8.4 nathanw /* $NetBSD: cpu.h,v 1.67.8.4 2002/01/08 00:26:01 nathanw Exp $ */
2 1.67.8.2 scw
3 1.67.8.2 scw /*
4 1.67.8.2 scw * Copyright (c) 1988 University of Utah.
5 1.67.8.2 scw * Copyright (c) 1982, 1990 The Regents of the University of California.
6 1.67.8.2 scw * All rights reserved.
7 1.67.8.2 scw *
8 1.67.8.2 scw * This code is derived from software contributed to Berkeley by
9 1.67.8.2 scw * the Systems Programming Group of the University of Utah Computer
10 1.67.8.2 scw * Science Department.
11 1.67.8.2 scw *
12 1.67.8.2 scw * Redistribution and use in source and binary forms, with or without
13 1.67.8.2 scw * modification, are permitted provided that the following conditions
14 1.67.8.2 scw * are met:
15 1.67.8.2 scw * 1. Redistributions of source code must retain the above copyright
16 1.67.8.2 scw * notice, this list of conditions and the following disclaimer.
17 1.67.8.2 scw * 2. Redistributions in binary form must reproduce the above copyright
18 1.67.8.2 scw * notice, this list of conditions and the following disclaimer in the
19 1.67.8.2 scw * documentation and/or other materials provided with the distribution.
20 1.67.8.2 scw * 3. All advertising materials mentioning features or use of this software
21 1.67.8.2 scw * must display the following acknowledgement:
22 1.67.8.2 scw * This product includes software developed by the University of
23 1.67.8.2 scw * California, Berkeley and its contributors.
24 1.67.8.2 scw * 4. Neither the name of the University nor the names of its contributors
25 1.67.8.2 scw * may be used to endorse or promote products derived from this software
26 1.67.8.2 scw * without specific prior written permission.
27 1.67.8.2 scw *
28 1.67.8.2 scw * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 1.67.8.2 scw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 1.67.8.2 scw * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 1.67.8.2 scw * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 1.67.8.2 scw * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 1.67.8.2 scw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 1.67.8.2 scw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 1.67.8.2 scw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 1.67.8.2 scw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 1.67.8.2 scw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 1.67.8.2 scw * SUCH DAMAGE.
39 1.67.8.2 scw */
40 1.67.8.2 scw
41 1.67.8.2 scw /*
42 1.67.8.2 scw * Copyright (c) 1992, 1993 BCDL Labs. All rights reserved.
43 1.67.8.2 scw * Allen Briggs, Chris Caputo, Michael Finch, Brad Grantham, Lawrence Kesteloot
44 1.67.8.2 scw
45 1.67.8.2 scw * Redistribution of this source code or any part thereof is permitted,
46 1.67.8.2 scw * provided that the following conditions are met:
47 1.67.8.2 scw * 1) Utilized source contains the copyright message above, this list
48 1.67.8.2 scw * of conditions, and the following disclaimer.
49 1.67.8.2 scw * 2) Binary objects containing compiled source reproduce the
50 1.67.8.2 scw * copyright notice above on startup.
51 1.67.8.2 scw *
52 1.67.8.2 scw * CAVEAT: This source code is provided "as-is" by BCDL Labs, and any
53 1.67.8.2 scw * warranties of ANY kind are disclaimed. We don't even claim that it
54 1.67.8.2 scw * won't crash your hard disk. Basically, we want a little credit if
55 1.67.8.2 scw * it works, but we don't want to get mail-bombed if it doesn't.
56 1.67.8.2 scw */
57 1.67.8.2 scw
58 1.67.8.2 scw /*
59 1.67.8.2 scw * from: Utah $Hdr: cpu.h 1.16 91/03/25$
60 1.67.8.2 scw *
61 1.67.8.2 scw * @(#)cpu.h 7.7 (Berkeley) 6/27/91
62 1.67.8.2 scw */
63 1.67.8.2 scw
64 1.67.8.2 scw #ifndef _CPU_MACHINE_
65 1.67.8.2 scw #define _CPU_MACHINE_
66 1.67.8.2 scw
67 1.67.8.2 scw /*
68 1.67.8.2 scw * Exported definitions unique to mac68k/68k cpu support.
69 1.67.8.2 scw */
70 1.67.8.2 scw
71 1.67.8.2 scw #if defined(_KERNEL_OPT)
72 1.67.8.2 scw #include "opt_lockdebug.h"
73 1.67.8.2 scw #endif
74 1.67.8.2 scw
75 1.67.8.2 scw /*
76 1.67.8.2 scw * Get common m68k definitions.
77 1.67.8.2 scw */
78 1.67.8.2 scw #include <m68k/cpu.h>
79 1.67.8.2 scw #define M68K_MMU_MOTOROLA
80 1.67.8.2 scw
81 1.67.8.2 scw /*
82 1.67.8.2 scw * Get interrupt glue.
83 1.67.8.2 scw */
84 1.67.8.2 scw #include <machine/intr.h>
85 1.67.8.2 scw
86 1.67.8.2 scw #include <sys/sched.h>
87 1.67.8.2 scw struct cpu_info {
88 1.67.8.2 scw struct schedstate_percpu ci_schedstate; /* scheduler state */
89 1.67.8.2 scw #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
90 1.67.8.2 scw u_long ci_spin_locks; /* # of spin locks held */
91 1.67.8.2 scw u_long ci_simple_locks; /* # of simple locks held */
92 1.67.8.2 scw #endif
93 1.67.8.2 scw };
94 1.67.8.2 scw
95 1.67.8.2 scw #ifdef _KERNEL
96 1.67.8.2 scw extern struct cpu_info cpu_info_store;
97 1.67.8.2 scw
98 1.67.8.2 scw #define curcpu() (&cpu_info_store)
99 1.67.8.2 scw
100 1.67.8.2 scw /*
101 1.67.8.2 scw * definitions of cpu-dependent requirements
102 1.67.8.2 scw * referenced in generic code
103 1.67.8.2 scw */
104 1.67.8.2 scw #define cpu_swapin(p) /* nothing */
105 1.67.8.2 scw #define cpu_wait(p) /* nothing */
106 1.67.8.2 scw #define cpu_swapout(p) /* nothing */
107 1.67.8.2 scw #define cpu_number() 0
108 1.67.8.3 thorpej #define cpu_proc_fork(p1, p2) /* nothing */
109 1.67.8.2 scw
110 1.67.8.2 scw /*
111 1.67.8.2 scw * Arguments to hardclock and gatherstats encapsulate the previous
112 1.67.8.2 scw * machine state in an opaque clockframe. One the hp300, we use
113 1.67.8.2 scw * what the hardware pushes on an interrupt (frame format 0).
114 1.67.8.2 scw */
115 1.67.8.2 scw struct clockframe {
116 1.67.8.2 scw u_short sr; /* sr at time of interrupt */
117 1.67.8.2 scw u_long pc; /* pc at time of interrupt */
118 1.67.8.2 scw u_short vo; /* vector offset (4-word frame) */
119 1.67.8.4 nathanw } __attribute__((packed));
120 1.67.8.2 scw
121 1.67.8.2 scw #define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0)
122 1.67.8.2 scw #define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0)
123 1.67.8.2 scw #define CLKF_PC(framep) ((framep)->pc)
124 1.67.8.2 scw #define CLKF_INTR(framep) (0) /* XXX should use PSL_M (see hp300) */
125 1.67.8.2 scw
126 1.67.8.2 scw /*
127 1.67.8.2 scw * Preempt the current process if in interrupt from user mode,
128 1.67.8.2 scw * or after the current trap/syscall if in system mode.
129 1.67.8.2 scw */
130 1.67.8.2 scw extern int want_resched; /* resched() was called */
131 1.67.8.2 scw #define need_resched(ci) { want_resched++; aston(); }
132 1.67.8.2 scw
133 1.67.8.2 scw /*
134 1.67.8.2 scw * Give a profiling tick to the current process from the softclock
135 1.67.8.2 scw * interrupt. Request an ast to send us through trap(),
136 1.67.8.2 scw * marking the proc as needing a profiling tick.
137 1.67.8.2 scw */
138 1.67.8.2 scw #define need_proftick(p) ( (p)->p_flag |= P_OWEUPC, aston() )
139 1.67.8.2 scw
140 1.67.8.2 scw /*
141 1.67.8.2 scw * Notify the current process (p) that it has a signal pending,
142 1.67.8.2 scw * process as soon as possible.
143 1.67.8.2 scw */
144 1.67.8.2 scw #define signotify(p) aston()
145 1.67.8.2 scw
146 1.67.8.2 scw extern int astpending; /* need to trap before returning to user mode */
147 1.67.8.2 scw #define aston() (astpending++)
148 1.67.8.2 scw
149 1.67.8.2 scw #endif /* _KERNEL */
150 1.67.8.2 scw
151 1.67.8.2 scw #define CPU_CONSDEV 1
152 1.67.8.2 scw #define CPU_MAXID 2
153 1.67.8.2 scw
154 1.67.8.2 scw #define CTL_MACHDEP_NAMES { \
155 1.67.8.2 scw { 0, 0 }, \
156 1.67.8.2 scw { "console_device", CTLTYPE_STRUCT }, \
157 1.67.8.2 scw }
158 1.67.8.2 scw
159 1.67.8.2 scw /* values for machineid --
160 1.67.8.2 scw * These are equivalent to the MacOS Gestalt values. */
161 1.67.8.2 scw #define MACH_MACII 6
162 1.67.8.2 scw #define MACH_MACIIX 7
163 1.67.8.2 scw #define MACH_MACIICX 8
164 1.67.8.2 scw #define MACH_MACSE30 9
165 1.67.8.2 scw #define MACH_MACIICI 11
166 1.67.8.2 scw #define MACH_MACIIFX 13
167 1.67.8.2 scw #define MACH_MACIISI 18
168 1.67.8.2 scw #define MACH_MACQ900 20
169 1.67.8.2 scw #define MACH_MACPB170 21
170 1.67.8.2 scw #define MACH_MACQ700 22
171 1.67.8.2 scw #define MACH_MACCLASSICII 23
172 1.67.8.2 scw #define MACH_MACPB100 24
173 1.67.8.2 scw #define MACH_MACPB140 25
174 1.67.8.2 scw #define MACH_MACQ950 26
175 1.67.8.2 scw #define MACH_MACLCIII 27
176 1.67.8.2 scw #define MACH_MACPB210 29
177 1.67.8.2 scw #define MACH_MACC650 30
178 1.67.8.2 scw #define MACH_MACPB230 32
179 1.67.8.2 scw #define MACH_MACPB180 33
180 1.67.8.2 scw #define MACH_MACPB160 34
181 1.67.8.2 scw #define MACH_MACQ800 35
182 1.67.8.2 scw #define MACH_MACQ650 36
183 1.67.8.2 scw #define MACH_MACLCII 37
184 1.67.8.2 scw #define MACH_MACPB250 38
185 1.67.8.2 scw #define MACH_MACIIVI 44
186 1.67.8.2 scw #define MACH_MACP600 45
187 1.67.8.2 scw #define MACH_MACIIVX 48
188 1.67.8.2 scw #define MACH_MACCCLASSIC 49
189 1.67.8.2 scw #define MACH_MACPB165C 50
190 1.67.8.2 scw #define MACH_MACC610 52
191 1.67.8.2 scw #define MACH_MACQ610 53
192 1.67.8.2 scw #define MACH_MACPB145 54
193 1.67.8.2 scw #define MACH_MACLC520 56
194 1.67.8.2 scw #define MACH_MACC660AV 60
195 1.67.8.2 scw #define MACH_MACP460 62
196 1.67.8.2 scw #define MACH_MACPB180C 71
197 1.67.8.2 scw #define MACH_MACPB500 72
198 1.67.8.2 scw #define MACH_MACPB270 77
199 1.67.8.2 scw #define MACH_MACQ840AV 78
200 1.67.8.2 scw #define MACH_MACP550 80
201 1.67.8.2 scw #define MACH_MACCCLASSICII 83
202 1.67.8.2 scw #define MACH_MACPB165 84
203 1.67.8.2 scw #define MACH_MACTV 88
204 1.67.8.2 scw #define MACH_MACLC475 89
205 1.67.8.2 scw #define MACH_MACLC475_33 90
206 1.67.8.2 scw #define MACH_MACLC575 92
207 1.67.8.2 scw #define MACH_MACQ605 94
208 1.67.8.2 scw #define MACH_MACQ605_33 95
209 1.67.8.2 scw #define MACH_MACQ630 98
210 1.67.8.2 scw #define MACH_MACP580 99
211 1.67.8.2 scw #define MACH_MACPB280 102
212 1.67.8.2 scw #define MACH_MACPB280C 103
213 1.67.8.2 scw #define MACH_MACPB150 115
214 1.67.8.2 scw #define MACH_MACPB190 122
215 1.67.8.2 scw
216 1.67.8.2 scw /*
217 1.67.8.2 scw * Machine classes. These define subsets of the above machines.
218 1.67.8.2 scw */
219 1.67.8.2 scw #define MACH_CLASSH 0x0000 /* Hopeless cases... */
220 1.67.8.2 scw #define MACH_CLASSII 0x0001 /* MacII class */
221 1.67.8.2 scw #define MACH_CLASSIIci 0x0004 /* Have RBV, but no Egret */
222 1.67.8.2 scw #define MACH_CLASSIIsi 0x0005 /* Similar to IIci -- Have Egret. */
223 1.67.8.2 scw #define MACH_CLASSIIvx 0x0006 /* Similar to IIsi -- different via2 emul? */
224 1.67.8.2 scw #define MACH_CLASSLC 0x0007 /* Low-Cost/Performa/Wal-Mart Macs. */
225 1.67.8.2 scw #define MACH_CLASSPB 0x0008 /* Powerbooks. Power management. */
226 1.67.8.2 scw #define MACH_CLASSDUO 0x0009 /* Powerbooks Duos. More integration/Docks. */
227 1.67.8.2 scw #define MACH_CLASSIIfx 0x0080 /* The IIfx is in a class by itself. */
228 1.67.8.2 scw #define MACH_CLASSQ 0x0100 /* non-A/V Centris/Quadras. */
229 1.67.8.2 scw #define MACH_CLASSAV 0x0101 /* A/V Centris/Quadras. */
230 1.67.8.2 scw #define MACH_CLASSQ2 0x0102 /* More Centris/Quadras, different sccA. */
231 1.67.8.2 scw #define MACH_CLASSP580 0x0103 /* Similar to Quadras, but not quite.. */
232 1.67.8.2 scw
233 1.67.8.2 scw #define MACH_68020 0
234 1.67.8.2 scw #define MACH_68030 1
235 1.67.8.2 scw #define MACH_68040 2
236 1.67.8.2 scw #define MACH_PENTIUM 3 /* 66 and 99 MHz versions *only* */
237 1.67.8.2 scw
238 1.67.8.2 scw #ifdef _KERNEL
239 1.67.8.2 scw struct mac68k_machine_S {
240 1.67.8.2 scw int cpu_model_index;
241 1.67.8.2 scw /*
242 1.67.8.2 scw * Misc. info from booter.
243 1.67.8.2 scw */
244 1.67.8.2 scw int machineid;
245 1.67.8.2 scw int mach_processor;
246 1.67.8.2 scw int mach_memsize;
247 1.67.8.2 scw int booter_version;
248 1.67.8.2 scw /*
249 1.67.8.2 scw * Debugging flags.
250 1.67.8.2 scw */
251 1.67.8.2 scw int do_graybars;
252 1.67.8.2 scw int serial_boot_echo;
253 1.67.8.2 scw int serial_console;
254 1.67.8.2 scw
255 1.67.8.2 scw int zs_chip; /* what type of chip we've got */
256 1.67.8.2 scw int modem_flags;
257 1.67.8.2 scw int modem_cts_clk;
258 1.67.8.2 scw int modem_dcd_clk;
259 1.67.8.2 scw int modem_d_speed;
260 1.67.8.2 scw int print_flags;
261 1.67.8.2 scw int print_cts_clk;
262 1.67.8.2 scw int print_dcd_clk;
263 1.67.8.2 scw int print_d_speed;
264 1.67.8.2 scw /*
265 1.67.8.2 scw * Misc. hardware info.
266 1.67.8.2 scw */
267 1.67.8.2 scw int scsi80; /* Has NCR 5380 */
268 1.67.8.2 scw int scsi96; /* Has NCR 53C96 */
269 1.67.8.2 scw int scsi96_2; /* Has 2nd 53C96 */
270 1.67.8.2 scw int sonic; /* Has SONIC e-net */
271 1.67.8.2 scw
272 1.67.8.2 scw int via1_ipl;
273 1.67.8.2 scw int via2_ipl;
274 1.67.8.2 scw int aux_interrupts;
275 1.67.8.2 scw };
276 1.67.8.2 scw
277 1.67.8.2 scw /* What kind of model is this */
278 1.67.8.2 scw struct cpu_model_info {
279 1.67.8.2 scw int machineid; /* MacOS Gestalt value. */
280 1.67.8.2 scw char *model_major; /* Make this distinction to save a few */
281 1.67.8.2 scw char *model_minor; /* bytes--might be useful, too. */
282 1.67.8.2 scw int class; /* Rough class of machine. */
283 1.67.8.2 scw /* forwarded romvec_s is defined in mac68k/macrom.h */
284 1.67.8.2 scw struct romvec_s *rom_vectors; /* Pointer to our known rom vectors */
285 1.67.8.2 scw };
286 1.67.8.2 scw extern struct cpu_model_info *current_mac_model;
287 1.67.8.2 scw
288 1.67.8.2 scw extern unsigned long IOBase; /* Base address of I/O */
289 1.67.8.2 scw extern unsigned long NuBusBase; /* Base address of NuBus */
290 1.67.8.2 scw
291 1.67.8.2 scw extern struct mac68k_machine_S mac68k_machine;
292 1.67.8.2 scw extern unsigned long load_addr;
293 1.67.8.2 scw #endif /* _KERNEL */
294 1.67.8.2 scw
295 1.67.8.2 scw /* physical memory sections */
296 1.67.8.2 scw #define ROMBASE (0x40800000)
297 1.67.8.2 scw #define ROMLEN (0x00200000) /* 2MB will work for all 68k */
298 1.67.8.2 scw #define ROMMAPSIZE btoc(ROMLEN) /* 32k of page tables. */
299 1.67.8.2 scw
300 1.67.8.2 scw #define IIOMAPSIZE btoc(0x00100000) /* 1MB should be enough */
301 1.67.8.2 scw
302 1.67.8.2 scw /* XXX -- Need to do something about superspace.
303 1.67.8.2 scw * Technically, NuBus superspace starts at 0x60000000, but no
304 1.67.8.2 scw * known Macintosh has used any slot lower numbered than 9, and
305 1.67.8.2 scw * the super space is defined as 0xS000 0000 through 0xSFFF FFFF
306 1.67.8.2 scw * where S is the slot number--ranging from 0x9 - 0xE.
307 1.67.8.2 scw */
308 1.67.8.2 scw #define NBSBASE 0x90000000
309 1.67.8.2 scw #define NBSTOP 0xF0000000
310 1.67.8.2 scw #define NBBASE 0xF9000000 /* NUBUS space */
311 1.67.8.2 scw #define NBTOP 0xFF000000 /* NUBUS space */
312 1.67.8.2 scw #define NBMAPSIZE btoc(NBTOP-NBBASE) /* ~ 96 megs */
313 1.67.8.2 scw #define NBMEMSIZE 0x01000000 /* 16 megs per card */
314 1.67.8.2 scw #define NBROMOFFSET 0x00FF0000 /* Last 64K == ROM */
315 1.67.8.2 scw
316 1.67.8.2 scw #ifdef _KERNEL
317 1.67.8.2 scw
318 1.67.8.2 scw struct frame;
319 1.67.8.2 scw struct fpframe;
320 1.67.8.2 scw struct pcb;
321 1.67.8.2 scw
322 1.67.8.2 scw /* machdep.c */
323 1.67.8.2 scw void mac68k_set_bell_callback __P((int (*)(void *, int, int, int), void *));
324 1.67.8.2 scw int mac68k_ring_bell __P((int, int, int));
325 1.67.8.2 scw u_int get_mapping __P((void));
326 1.67.8.2 scw
327 1.67.8.2 scw /* locore.s functions */
328 1.67.8.2 scw void m68881_save __P((struct fpframe *));
329 1.67.8.2 scw void m68881_restore __P((struct fpframe *));
330 1.67.8.2 scw void DCIA __P((void));
331 1.67.8.2 scw void DCIS __P((void));
332 1.67.8.2 scw void DCIU __P((void));
333 1.67.8.2 scw void ICIA __P((void));
334 1.67.8.2 scw void ICPA __P((void));
335 1.67.8.2 scw void PCIA __P((void));
336 1.67.8.2 scw void TBIA __P((void));
337 1.67.8.2 scw void TBIS __P((vaddr_t));
338 1.67.8.2 scw void TBIAS __P((void));
339 1.67.8.2 scw void TBIAU __P((void));
340 1.67.8.2 scw #if defined(M68040)
341 1.67.8.2 scw void DCFA __P((void));
342 1.67.8.2 scw void DCFP __P((paddr_t));
343 1.67.8.2 scw void DCFL __P((paddr_t));
344 1.67.8.2 scw void DCPL __P((paddr_t));
345 1.67.8.2 scw void DCPP __P((paddr_t));
346 1.67.8.2 scw void ICPL __P((paddr_t));
347 1.67.8.2 scw void ICPP __P((paddr_t));
348 1.67.8.2 scw #endif
349 1.67.8.2 scw int suline __P((caddr_t, caddr_t));
350 1.67.8.2 scw void savectx __P((struct pcb *));
351 1.67.8.2 scw void switch_exit __P((struct lwp *));
352 1.67.8.2 scw void switch_lwp_exit __P((struct lwp *));
353 1.67.8.2 scw void proc_trampoline __P((void));
354 1.67.8.2 scw void loadustp __P((int));
355 1.67.8.2 scw
356 1.67.8.2 scw /* sys_machdep.c */
357 1.67.8.2 scw int cachectl1 __P((unsigned long, vaddr_t, size_t, struct proc *));
358 1.67.8.2 scw
359 1.67.8.2 scw /* vm_machdep.c */
360 1.67.8.2 scw void physaccess __P((caddr_t, caddr_t, register int, register int));
361 1.67.8.2 scw void physunaccess __P((caddr_t, register int));
362 1.67.8.2 scw int kvtop __P((caddr_t));
363 1.67.8.2 scw
364 1.67.8.2 scw #endif
365 1.67.8.2 scw
366 1.67.8.2 scw #endif /* _CPU_MACHINE_ */
367