cpu.h revision 1.72 1 1.72 thorpej /* $NetBSD: cpu.h,v 1.72 2003/01/17 23:21:39 thorpej Exp $ */
2 1.16 cgd
3 1.1 briggs /*
4 1.1 briggs * Copyright (c) 1988 University of Utah.
5 1.1 briggs * Copyright (c) 1982, 1990 The Regents of the University of California.
6 1.1 briggs * All rights reserved.
7 1.1 briggs *
8 1.1 briggs * This code is derived from software contributed to Berkeley by
9 1.1 briggs * the Systems Programming Group of the University of Utah Computer
10 1.1 briggs * Science Department.
11 1.1 briggs *
12 1.1 briggs * Redistribution and use in source and binary forms, with or without
13 1.1 briggs * modification, are permitted provided that the following conditions
14 1.1 briggs * are met:
15 1.1 briggs * 1. Redistributions of source code must retain the above copyright
16 1.1 briggs * notice, this list of conditions and the following disclaimer.
17 1.1 briggs * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 briggs * notice, this list of conditions and the following disclaimer in the
19 1.1 briggs * documentation and/or other materials provided with the distribution.
20 1.1 briggs * 3. All advertising materials mentioning features or use of this software
21 1.1 briggs * must display the following acknowledgement:
22 1.1 briggs * This product includes software developed by the University of
23 1.1 briggs * California, Berkeley and its contributors.
24 1.1 briggs * 4. Neither the name of the University nor the names of its contributors
25 1.1 briggs * may be used to endorse or promote products derived from this software
26 1.1 briggs * without specific prior written permission.
27 1.1 briggs *
28 1.1 briggs * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 1.1 briggs * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 1.1 briggs * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 1.1 briggs * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 1.1 briggs * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 1.1 briggs * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 1.1 briggs * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 1.1 briggs * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 1.1 briggs * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 1.1 briggs * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 1.1 briggs * SUCH DAMAGE.
39 1.1 briggs */
40 1.2 briggs
41 1.2 briggs /*
42 1.2 briggs * Copyright (c) 1992, 1993 BCDL Labs. All rights reserved.
43 1.2 briggs * Allen Briggs, Chris Caputo, Michael Finch, Brad Grantham, Lawrence Kesteloot
44 1.2 briggs
45 1.2 briggs * Redistribution of this source code or any part thereof is permitted,
46 1.2 briggs * provided that the following conditions are met:
47 1.2 briggs * 1) Utilized source contains the copyright message above, this list
48 1.2 briggs * of conditions, and the following disclaimer.
49 1.2 briggs * 2) Binary objects containing compiled source reproduce the
50 1.2 briggs * copyright notice above on startup.
51 1.1 briggs *
52 1.2 briggs * CAVEAT: This source code is provided "as-is" by BCDL Labs, and any
53 1.2 briggs * warranties of ANY kind are disclaimed. We don't even claim that it
54 1.2 briggs * won't crash your hard disk. Basically, we want a little credit if
55 1.2 briggs * it works, but we don't want to get mail-bombed if it doesn't.
56 1.1 briggs */
57 1.1 briggs
58 1.1 briggs /*
59 1.1 briggs * from: Utah $Hdr: cpu.h 1.16 91/03/25$
60 1.1 briggs *
61 1.16 cgd * @(#)cpu.h 7.7 (Berkeley) 6/27/91
62 1.1 briggs */
63 1.1 briggs
64 1.29 briggs #ifndef _CPU_MACHINE_
65 1.29 briggs #define _CPU_MACHINE_
66 1.32 briggs
67 1.48 scottr /*
68 1.48 scottr * Exported definitions unique to mac68k/68k cpu support.
69 1.48 scottr */
70 1.8 briggs
71 1.67 mrg #if defined(_KERNEL_OPT)
72 1.64 thorpej #include "opt_lockdebug.h"
73 1.64 thorpej #endif
74 1.64 thorpej
75 1.1 briggs /*
76 1.41 thorpej * Get common m68k definitions.
77 1.41 thorpej */
78 1.41 thorpej #include <m68k/cpu.h>
79 1.41 thorpej #define M68K_MMU_MOTOROLA
80 1.41 thorpej
81 1.41 thorpej /*
82 1.47 scottr * Get interrupt glue.
83 1.47 scottr */
84 1.47 scottr #include <machine/intr.h>
85 1.47 scottr
86 1.64 thorpej #include <sys/sched.h>
87 1.64 thorpej struct cpu_info {
88 1.64 thorpej struct schedstate_percpu ci_schedstate; /* scheduler state */
89 1.64 thorpej #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
90 1.64 thorpej u_long ci_spin_locks; /* # of spin locks held */
91 1.64 thorpej u_long ci_simple_locks; /* # of simple locks held */
92 1.64 thorpej #endif
93 1.64 thorpej };
94 1.64 thorpej
95 1.64 thorpej #ifdef _KERNEL
96 1.64 thorpej extern struct cpu_info cpu_info_store;
97 1.64 thorpej
98 1.64 thorpej #define curcpu() (&cpu_info_store)
99 1.64 thorpej
100 1.47 scottr /*
101 1.1 briggs * definitions of cpu-dependent requirements
102 1.1 briggs * referenced in generic code
103 1.1 briggs */
104 1.11 briggs #define cpu_swapin(p) /* nothing */
105 1.11 briggs #define cpu_wait(p) /* nothing */
106 1.26 mycroft #define cpu_swapout(p) /* nothing */
107 1.63 thorpej #define cpu_number() 0
108 1.1 briggs
109 1.72 thorpej void cpu_proc_fork(struct proc *, struct proc *);
110 1.72 thorpej
111 1.72 thorpej
112 1.1 briggs /*
113 1.48 scottr * Arguments to hardclock and gatherstats encapsulate the previous
114 1.48 scottr * machine state in an opaque clockframe. One the hp300, we use
115 1.48 scottr * what the hardware pushes on an interrupt (frame format 0).
116 1.1 briggs */
117 1.10 briggs struct clockframe {
118 1.48 scottr u_short sr; /* sr at time of interrupt */
119 1.48 scottr u_long pc; /* pc at time of interrupt */
120 1.48 scottr u_short vo; /* vector offset (4-word frame) */
121 1.68 chs } __attribute__((packed));
122 1.1 briggs
123 1.11 briggs #define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0)
124 1.11 briggs #define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0)
125 1.1 briggs #define CLKF_PC(framep) ((framep)->pc)
126 1.11 briggs #define CLKF_INTR(framep) (0) /* XXX should use PSL_M (see hp300) */
127 1.1 briggs
128 1.1 briggs /*
129 1.1 briggs * Preempt the current process if in interrupt from user mode,
130 1.1 briggs * or after the current trap/syscall if in system mode.
131 1.1 briggs */
132 1.54 scottr extern int want_resched; /* resched() was called */
133 1.65 thorpej #define need_resched(ci) { want_resched++; aston(); }
134 1.1 briggs
135 1.1 briggs /*
136 1.1 briggs * Give a profiling tick to the current process from the softclock
137 1.1 briggs * interrupt. Request an ast to send us through trap(),
138 1.1 briggs * marking the proc as needing a profiling tick.
139 1.1 briggs */
140 1.10 briggs #define need_proftick(p) ( (p)->p_flag |= P_OWEUPC, aston() )
141 1.1 briggs
142 1.1 briggs /*
143 1.1 briggs * Notify the current process (p) that it has a signal pending,
144 1.1 briggs * process as soon as possible.
145 1.1 briggs */
146 1.1 briggs #define signotify(p) aston()
147 1.1 briggs
148 1.54 scottr extern int astpending; /* need to trap before returning to user mode */
149 1.1 briggs #define aston() (astpending++)
150 1.64 thorpej
151 1.64 thorpej #endif /* _KERNEL */
152 1.1 briggs
153 1.11 briggs #define CPU_CONSDEV 1
154 1.11 briggs #define CPU_MAXID 2
155 1.11 briggs
156 1.11 briggs #define CTL_MACHDEP_NAMES { \
157 1.11 briggs { 0, 0 }, \
158 1.11 briggs { "console_device", CTLTYPE_STRUCT }, \
159 1.11 briggs }
160 1.1 briggs
161 1.7 briggs /* values for machineid --
162 1.7 briggs * These are equivalent to the MacOS Gestalt values. */
163 1.7 briggs #define MACH_MACII 6
164 1.7 briggs #define MACH_MACIIX 7
165 1.7 briggs #define MACH_MACIICX 8
166 1.2 briggs #define MACH_MACSE30 9
167 1.7 briggs #define MACH_MACIICI 11
168 1.7 briggs #define MACH_MACIIFX 13
169 1.7 briggs #define MACH_MACIISI 18
170 1.5 briggs #define MACH_MACQ900 20
171 1.5 briggs #define MACH_MACPB170 21
172 1.5 briggs #define MACH_MACQ700 22
173 1.7 briggs #define MACH_MACCLASSICII 23
174 1.7 briggs #define MACH_MACPB100 24
175 1.5 briggs #define MACH_MACPB140 25
176 1.7 briggs #define MACH_MACQ950 26
177 1.7 briggs #define MACH_MACLCIII 27
178 1.7 briggs #define MACH_MACPB210 29
179 1.7 briggs #define MACH_MACC650 30
180 1.7 briggs #define MACH_MACPB230 32
181 1.7 briggs #define MACH_MACPB180 33
182 1.7 briggs #define MACH_MACPB160 34
183 1.7 briggs #define MACH_MACQ800 35
184 1.7 briggs #define MACH_MACQ650 36
185 1.6 briggs #define MACH_MACLCII 37
186 1.7 briggs #define MACH_MACPB250 38
187 1.7 briggs #define MACH_MACIIVI 44
188 1.7 briggs #define MACH_MACP600 45
189 1.7 briggs #define MACH_MACIIVX 48
190 1.7 briggs #define MACH_MACCCLASSIC 49
191 1.7 briggs #define MACH_MACPB165C 50
192 1.7 briggs #define MACH_MACC610 52
193 1.7 briggs #define MACH_MACQ610 53
194 1.7 briggs #define MACH_MACPB145 54
195 1.7 briggs #define MACH_MACLC520 56
196 1.7 briggs #define MACH_MACC660AV 60
197 1.7 briggs #define MACH_MACP460 62
198 1.7 briggs #define MACH_MACPB180C 71
199 1.38 scottr #define MACH_MACPB500 72
200 1.7 briggs #define MACH_MACPB270 77
201 1.7 briggs #define MACH_MACQ840AV 78
202 1.7 briggs #define MACH_MACP550 80
203 1.42 scottr #define MACH_MACCCLASSICII 83
204 1.7 briggs #define MACH_MACPB165 84
205 1.69 shiba #define MACH_MACPB190CS 85
206 1.7 briggs #define MACH_MACTV 88
207 1.7 briggs #define MACH_MACLC475 89
208 1.51 briggs #define MACH_MACLC475_33 90
209 1.7 briggs #define MACH_MACLC575 92
210 1.7 briggs #define MACH_MACQ605 94
211 1.51 briggs #define MACH_MACQ605_33 95
212 1.27 briggs #define MACH_MACQ630 98
213 1.54 scottr #define MACH_MACP580 99
214 1.27 briggs #define MACH_MACPB280 102
215 1.27 briggs #define MACH_MACPB280C 103
216 1.27 briggs #define MACH_MACPB150 115
217 1.55 scottr #define MACH_MACPB190 122
218 1.1 briggs
219 1.13 briggs /*
220 1.13 briggs * Machine classes. These define subsets of the above machines.
221 1.13 briggs */
222 1.13 briggs #define MACH_CLASSH 0x0000 /* Hopeless cases... */
223 1.13 briggs #define MACH_CLASSII 0x0001 /* MacII class */
224 1.25 briggs #define MACH_CLASSIIci 0x0004 /* Have RBV, but no Egret */
225 1.25 briggs #define MACH_CLASSIIsi 0x0005 /* Similar to IIci -- Have Egret. */
226 1.25 briggs #define MACH_CLASSIIvx 0x0006 /* Similar to IIsi -- different via2 emul? */
227 1.25 briggs #define MACH_CLASSLC 0x0007 /* Low-Cost/Performa/Wal-Mart Macs. */
228 1.13 briggs #define MACH_CLASSPB 0x0008 /* Powerbooks. Power management. */
229 1.35 briggs #define MACH_CLASSDUO 0x0009 /* Powerbooks Duos. More integration/Docks. */
230 1.25 briggs #define MACH_CLASSIIfx 0x0080 /* The IIfx is in a class by itself. */
231 1.36 briggs #define MACH_CLASSQ 0x0100 /* non-A/V Centris/Quadras. */
232 1.36 briggs #define MACH_CLASSAV 0x0101 /* A/V Centris/Quadras. */
233 1.43 scottr #define MACH_CLASSQ2 0x0102 /* More Centris/Quadras, different sccA. */
234 1.54 scottr #define MACH_CLASSP580 0x0103 /* Similar to Quadras, but not quite.. */
235 1.13 briggs
236 1.1 briggs #define MACH_68020 0
237 1.1 briggs #define MACH_68030 1
238 1.1 briggs #define MACH_68040 2
239 1.1 briggs #define MACH_PENTIUM 3 /* 66 and 99 MHz versions *only* */
240 1.1 briggs
241 1.18 briggs #ifdef _KERNEL
242 1.13 briggs struct mac68k_machine_S {
243 1.13 briggs int cpu_model_index;
244 1.13 briggs /*
245 1.13 briggs * Misc. info from booter.
246 1.13 briggs */
247 1.13 briggs int machineid;
248 1.13 briggs int mach_processor;
249 1.13 briggs int mach_memsize;
250 1.13 briggs int booter_version;
251 1.13 briggs /*
252 1.13 briggs * Debugging flags.
253 1.13 briggs */
254 1.13 briggs int do_graybars;
255 1.13 briggs int serial_boot_echo;
256 1.15 briggs int serial_console;
257 1.52 scottr
258 1.52 scottr int zs_chip; /* what type of chip we've got */
259 1.37 briggs int modem_flags;
260 1.37 briggs int modem_cts_clk;
261 1.37 briggs int modem_dcd_clk;
262 1.52 scottr int modem_d_speed;
263 1.37 briggs int print_flags;
264 1.37 briggs int print_cts_clk;
265 1.37 briggs int print_dcd_clk;
266 1.52 scottr int print_d_speed;
267 1.13 briggs /*
268 1.13 briggs * Misc. hardware info.
269 1.13 briggs */
270 1.13 briggs int scsi80; /* Has NCR 5380 */
271 1.13 briggs int scsi96; /* Has NCR 53C96 */
272 1.13 briggs int scsi96_2; /* Has 2nd 53C96 */
273 1.14 briggs int sonic; /* Has SONIC e-net */
274 1.62 briggs
275 1.62 briggs int via1_ipl;
276 1.62 briggs int via2_ipl;
277 1.62 briggs int aux_interrupts;
278 1.13 briggs };
279 1.13 briggs
280 1.17 briggs /* What kind of model is this */
281 1.17 briggs struct cpu_model_info {
282 1.17 briggs int machineid; /* MacOS Gestalt value. */
283 1.17 briggs char *model_major; /* Make this distinction to save a few */
284 1.17 briggs char *model_minor; /* bytes--might be useful, too. */
285 1.17 briggs int class; /* Rough class of machine. */
286 1.17 briggs /* forwarded romvec_s is defined in mac68k/macrom.h */
287 1.17 briggs struct romvec_s *rom_vectors; /* Pointer to our known rom vectors */
288 1.17 briggs };
289 1.17 briggs extern struct cpu_model_info *current_mac_model;
290 1.17 briggs
291 1.13 briggs extern unsigned long IOBase; /* Base address of I/O */
292 1.13 briggs extern unsigned long NuBusBase; /* Base address of NuBus */
293 1.11 briggs
294 1.13 briggs extern struct mac68k_machine_S mac68k_machine;
295 1.24 briggs extern unsigned long load_addr;
296 1.18 briggs #endif /* _KERNEL */
297 1.1 briggs
298 1.1 briggs /* physical memory sections */
299 1.17 briggs #define ROMBASE (0x40800000)
300 1.36 briggs #define ROMLEN (0x00200000) /* 2MB will work for all 68k */
301 1.36 briggs #define ROMMAPSIZE btoc(ROMLEN) /* 32k of page tables. */
302 1.13 briggs
303 1.28 briggs #define IIOMAPSIZE btoc(0x00100000) /* 1MB should be enough */
304 1.1 briggs
305 1.23 briggs /* XXX -- Need to do something about superspace.
306 1.23 briggs * Technically, NuBus superspace starts at 0x60000000, but no
307 1.23 briggs * known Macintosh has used any slot lower numbered than 9, and
308 1.23 briggs * the super space is defined as 0xS000 0000 through 0xSFFF FFFF
309 1.23 briggs * where S is the slot number--ranging from 0x9 - 0xE.
310 1.23 briggs */
311 1.23 briggs #define NBSBASE 0x90000000
312 1.1 briggs #define NBSTOP 0xF0000000
313 1.1 briggs #define NBBASE 0xF9000000 /* NUBUS space */
314 1.1 briggs #define NBTOP 0xFF000000 /* NUBUS space */
315 1.1 briggs #define NBMAPSIZE btoc(NBTOP-NBBASE) /* ~ 96 megs */
316 1.1 briggs #define NBMEMSIZE 0x01000000 /* 16 megs per card */
317 1.1 briggs #define NBROMOFFSET 0x00FF0000 /* Last 64K == ROM */
318 1.30 briggs
319 1.48 scottr #ifdef _KERNEL
320 1.48 scottr
321 1.48 scottr struct frame;
322 1.48 scottr struct fpframe;
323 1.48 scottr struct pcb;
324 1.48 scottr
325 1.31 briggs /* machdep.c */
326 1.45 scottr void mac68k_set_bell_callback __P((int (*)(void *, int, int, int), void *));
327 1.45 scottr int mac68k_ring_bell __P((int, int, int));
328 1.45 scottr u_int get_mapping __P((void));
329 1.31 briggs
330 1.57 scottr /* locore.s functions */
331 1.57 scottr void m68881_save __P((struct fpframe *));
332 1.34 briggs void m68881_restore __P((struct fpframe *));
333 1.31 briggs int suline __P((caddr_t, caddr_t));
334 1.31 briggs void savectx __P((struct pcb *));
335 1.72 thorpej void switch_exit __P((struct lwp *));
336 1.72 thorpej void switch_lwp_exit __P((struct lwp *));
337 1.31 briggs void proc_trampoline __P((void));
338 1.57 scottr void loadustp __P((int));
339 1.58 is
340 1.58 is /* sys_machdep.c */
341 1.60 is int cachectl1 __P((unsigned long, vaddr_t, size_t, struct proc *));
342 1.31 briggs
343 1.46 briggs /* vm_machdep.c */
344 1.46 briggs void physaccess __P((caddr_t, caddr_t, register int, register int));
345 1.46 briggs void physunaccess __P((caddr_t, register int));
346 1.61 scottr int kvtop __P((caddr_t));
347 1.31 briggs
348 1.48 scottr #endif
349 1.8 briggs
350 1.29 briggs #endif /* _CPU_MACHINE_ */
351