cpu.h revision 1.67.8.6
1 /* $NetBSD: cpu.h,v 1.67.8.6 2002/04/17 00:03:34 nathanw Exp $ */ 2 3 /* 4 * Copyright (c) 1988 University of Utah. 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * the Systems Programming Group of the University of Utah Computer 10 * Science Department. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the University of 23 * California, Berkeley and its contributors. 24 * 4. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 */ 40 41 /* 42 * Copyright (c) 1992, 1993 BCDL Labs. All rights reserved. 43 * Allen Briggs, Chris Caputo, Michael Finch, Brad Grantham, Lawrence Kesteloot 44 45 * Redistribution of this source code or any part thereof is permitted, 46 * provided that the following conditions are met: 47 * 1) Utilized source contains the copyright message above, this list 48 * of conditions, and the following disclaimer. 49 * 2) Binary objects containing compiled source reproduce the 50 * copyright notice above on startup. 51 * 52 * CAVEAT: This source code is provided "as-is" by BCDL Labs, and any 53 * warranties of ANY kind are disclaimed. We don't even claim that it 54 * won't crash your hard disk. Basically, we want a little credit if 55 * it works, but we don't want to get mail-bombed if it doesn't. 56 */ 57 58 /* 59 * from: Utah $Hdr: cpu.h 1.16 91/03/25$ 60 * 61 * @(#)cpu.h 7.7 (Berkeley) 6/27/91 62 */ 63 64 #ifndef _CPU_MACHINE_ 65 #define _CPU_MACHINE_ 66 67 /* 68 * Exported definitions unique to mac68k/68k cpu support. 69 */ 70 71 #if defined(_KERNEL_OPT) 72 #include "opt_lockdebug.h" 73 #endif 74 75 /* 76 * Get common m68k definitions. 77 */ 78 #include <m68k/cpu.h> 79 #define M68K_MMU_MOTOROLA 80 #include <m68k/cacheops.h> 81 82 /* 83 * Get interrupt glue. 84 */ 85 #include <machine/intr.h> 86 87 #include <sys/sched.h> 88 struct cpu_info { 89 struct schedstate_percpu ci_schedstate; /* scheduler state */ 90 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG) 91 u_long ci_spin_locks; /* # of spin locks held */ 92 u_long ci_simple_locks; /* # of simple locks held */ 93 #endif 94 }; 95 96 #ifdef _KERNEL 97 extern struct cpu_info cpu_info_store; 98 99 #define curcpu() (&cpu_info_store) 100 101 /* 102 * definitions of cpu-dependent requirements 103 * referenced in generic code 104 */ 105 #define cpu_swapin(p) /* nothing */ 106 #define cpu_wait(p) /* nothing */ 107 #define cpu_swapout(p) /* nothing */ 108 #define cpu_number() 0 109 #define cpu_proc_fork(p1, p2) /* nothing */ 110 111 /* 112 * Arguments to hardclock and gatherstats encapsulate the previous 113 * machine state in an opaque clockframe. One the hp300, we use 114 * what the hardware pushes on an interrupt (frame format 0). 115 */ 116 struct clockframe { 117 u_short sr; /* sr at time of interrupt */ 118 u_long pc; /* pc at time of interrupt */ 119 u_short vo; /* vector offset (4-word frame) */ 120 } __attribute__((packed)); 121 122 #define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0) 123 #define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0) 124 #define CLKF_PC(framep) ((framep)->pc) 125 #define CLKF_INTR(framep) (0) /* XXX should use PSL_M (see hp300) */ 126 127 /* 128 * Preempt the current process if in interrupt from user mode, 129 * or after the current trap/syscall if in system mode. 130 */ 131 extern int want_resched; /* resched() was called */ 132 #define need_resched(ci) { want_resched++; aston(); } 133 134 /* 135 * Give a profiling tick to the current process from the softclock 136 * interrupt. Request an ast to send us through trap(), 137 * marking the proc as needing a profiling tick. 138 */ 139 #define need_proftick(p) ( (p)->p_flag |= P_OWEUPC, aston() ) 140 141 /* 142 * Notify the current process (p) that it has a signal pending, 143 * process as soon as possible. 144 */ 145 #define signotify(p) aston() 146 147 extern int astpending; /* need to trap before returning to user mode */ 148 #define aston() (astpending++) 149 150 #endif /* _KERNEL */ 151 152 #define CPU_CONSDEV 1 153 #define CPU_MAXID 2 154 155 #define CTL_MACHDEP_NAMES { \ 156 { 0, 0 }, \ 157 { "console_device", CTLTYPE_STRUCT }, \ 158 } 159 160 /* values for machineid -- 161 * These are equivalent to the MacOS Gestalt values. */ 162 #define MACH_MACII 6 163 #define MACH_MACIIX 7 164 #define MACH_MACIICX 8 165 #define MACH_MACSE30 9 166 #define MACH_MACIICI 11 167 #define MACH_MACIIFX 13 168 #define MACH_MACIISI 18 169 #define MACH_MACQ900 20 170 #define MACH_MACPB170 21 171 #define MACH_MACQ700 22 172 #define MACH_MACCLASSICII 23 173 #define MACH_MACPB100 24 174 #define MACH_MACPB140 25 175 #define MACH_MACQ950 26 176 #define MACH_MACLCIII 27 177 #define MACH_MACPB210 29 178 #define MACH_MACC650 30 179 #define MACH_MACPB230 32 180 #define MACH_MACPB180 33 181 #define MACH_MACPB160 34 182 #define MACH_MACQ800 35 183 #define MACH_MACQ650 36 184 #define MACH_MACLCII 37 185 #define MACH_MACPB250 38 186 #define MACH_MACIIVI 44 187 #define MACH_MACP600 45 188 #define MACH_MACIIVX 48 189 #define MACH_MACCCLASSIC 49 190 #define MACH_MACPB165C 50 191 #define MACH_MACC610 52 192 #define MACH_MACQ610 53 193 #define MACH_MACPB145 54 194 #define MACH_MACLC520 56 195 #define MACH_MACC660AV 60 196 #define MACH_MACP460 62 197 #define MACH_MACPB180C 71 198 #define MACH_MACPB500 72 199 #define MACH_MACPB270 77 200 #define MACH_MACQ840AV 78 201 #define MACH_MACP550 80 202 #define MACH_MACCCLASSICII 83 203 #define MACH_MACPB165 84 204 #define MACH_MACPB190CS 85 205 #define MACH_MACTV 88 206 #define MACH_MACLC475 89 207 #define MACH_MACLC475_33 90 208 #define MACH_MACLC575 92 209 #define MACH_MACQ605 94 210 #define MACH_MACQ605_33 95 211 #define MACH_MACQ630 98 212 #define MACH_MACP580 99 213 #define MACH_MACPB280 102 214 #define MACH_MACPB280C 103 215 #define MACH_MACPB150 115 216 #define MACH_MACPB190 122 217 218 /* 219 * Machine classes. These define subsets of the above machines. 220 */ 221 #define MACH_CLASSH 0x0000 /* Hopeless cases... */ 222 #define MACH_CLASSII 0x0001 /* MacII class */ 223 #define MACH_CLASSIIci 0x0004 /* Have RBV, but no Egret */ 224 #define MACH_CLASSIIsi 0x0005 /* Similar to IIci -- Have Egret. */ 225 #define MACH_CLASSIIvx 0x0006 /* Similar to IIsi -- different via2 emul? */ 226 #define MACH_CLASSLC 0x0007 /* Low-Cost/Performa/Wal-Mart Macs. */ 227 #define MACH_CLASSPB 0x0008 /* Powerbooks. Power management. */ 228 #define MACH_CLASSDUO 0x0009 /* Powerbooks Duos. More integration/Docks. */ 229 #define MACH_CLASSIIfx 0x0080 /* The IIfx is in a class by itself. */ 230 #define MACH_CLASSQ 0x0100 /* non-A/V Centris/Quadras. */ 231 #define MACH_CLASSAV 0x0101 /* A/V Centris/Quadras. */ 232 #define MACH_CLASSQ2 0x0102 /* More Centris/Quadras, different sccA. */ 233 #define MACH_CLASSP580 0x0103 /* Similar to Quadras, but not quite.. */ 234 235 #define MACH_68020 0 236 #define MACH_68030 1 237 #define MACH_68040 2 238 #define MACH_PENTIUM 3 /* 66 and 99 MHz versions *only* */ 239 240 #ifdef _KERNEL 241 struct mac68k_machine_S { 242 int cpu_model_index; 243 /* 244 * Misc. info from booter. 245 */ 246 int machineid; 247 int mach_processor; 248 int mach_memsize; 249 int booter_version; 250 /* 251 * Debugging flags. 252 */ 253 int do_graybars; 254 int serial_boot_echo; 255 int serial_console; 256 257 int zs_chip; /* what type of chip we've got */ 258 int modem_flags; 259 int modem_cts_clk; 260 int modem_dcd_clk; 261 int modem_d_speed; 262 int print_flags; 263 int print_cts_clk; 264 int print_dcd_clk; 265 int print_d_speed; 266 /* 267 * Misc. hardware info. 268 */ 269 int scsi80; /* Has NCR 5380 */ 270 int scsi96; /* Has NCR 53C96 */ 271 int scsi96_2; /* Has 2nd 53C96 */ 272 int sonic; /* Has SONIC e-net */ 273 274 int via1_ipl; 275 int via2_ipl; 276 int aux_interrupts; 277 }; 278 279 /* What kind of model is this */ 280 struct cpu_model_info { 281 int machineid; /* MacOS Gestalt value. */ 282 char *model_major; /* Make this distinction to save a few */ 283 char *model_minor; /* bytes--might be useful, too. */ 284 int class; /* Rough class of machine. */ 285 /* forwarded romvec_s is defined in mac68k/macrom.h */ 286 struct romvec_s *rom_vectors; /* Pointer to our known rom vectors */ 287 }; 288 extern struct cpu_model_info *current_mac_model; 289 290 extern unsigned long IOBase; /* Base address of I/O */ 291 extern unsigned long NuBusBase; /* Base address of NuBus */ 292 293 extern struct mac68k_machine_S mac68k_machine; 294 extern unsigned long load_addr; 295 #endif /* _KERNEL */ 296 297 /* physical memory sections */ 298 #define ROMBASE (0x40800000) 299 #define ROMLEN (0x00200000) /* 2MB will work for all 68k */ 300 #define ROMMAPSIZE btoc(ROMLEN) /* 32k of page tables. */ 301 302 #define IIOMAPSIZE btoc(0x00100000) /* 1MB should be enough */ 303 304 /* XXX -- Need to do something about superspace. 305 * Technically, NuBus superspace starts at 0x60000000, but no 306 * known Macintosh has used any slot lower numbered than 9, and 307 * the super space is defined as 0xS000 0000 through 0xSFFF FFFF 308 * where S is the slot number--ranging from 0x9 - 0xE. 309 */ 310 #define NBSBASE 0x90000000 311 #define NBSTOP 0xF0000000 312 #define NBBASE 0xF9000000 /* NUBUS space */ 313 #define NBTOP 0xFF000000 /* NUBUS space */ 314 #define NBMAPSIZE btoc(NBTOP-NBBASE) /* ~ 96 megs */ 315 #define NBMEMSIZE 0x01000000 /* 16 megs per card */ 316 #define NBROMOFFSET 0x00FF0000 /* Last 64K == ROM */ 317 318 #ifdef _KERNEL 319 320 struct frame; 321 struct fpframe; 322 struct pcb; 323 324 /* machdep.c */ 325 void mac68k_set_bell_callback __P((int (*)(void *, int, int, int), void *)); 326 int mac68k_ring_bell __P((int, int, int)); 327 u_int get_mapping __P((void)); 328 329 /* locore.s functions */ 330 void m68881_save __P((struct fpframe *)); 331 void m68881_restore __P((struct fpframe *)); 332 int suline __P((caddr_t, caddr_t)); 333 void savectx __P((struct pcb *)); 334 void switch_exit __P((struct lwp *)); 335 void switch_lwp_exit __P((struct lwp *)); 336 void proc_trampoline __P((void)); 337 void loadustp __P((int)); 338 339 /* sys_machdep.c */ 340 int cachectl1 __P((unsigned long, vaddr_t, size_t, struct proc *)); 341 342 /* vm_machdep.c */ 343 void physaccess __P((caddr_t, caddr_t, register int, register int)); 344 void physunaccess __P((caddr_t, register int)); 345 int kvtop __P((caddr_t)); 346 347 #endif 348 349 #endif /* _CPU_MACHINE_ */ 350
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