intr.h revision 1.24
11.24Syamt/* $NetBSD: intr.h,v 1.24 2006/12/21 15:55:23 yamt Exp $ */ 21.2Sscottr 31.2Sscottr/* 41.2Sscottr * Copyright (C) 1997 Scott Reynolds 51.2Sscottr * All rights reserved. 61.2Sscottr * 71.2Sscottr * Redistribution and use in source and binary forms, with or without 81.2Sscottr * modification, are permitted provided that the following conditions 91.2Sscottr * are met: 101.2Sscottr * 1. Redistributions of source code must retain the above copyright 111.2Sscottr * notice, this list of conditions and the following disclaimer. 121.2Sscottr * 2. Redistributions in binary form must reproduce the above copyright 131.2Sscottr * notice, this list of conditions and the following disclaimer in the 141.2Sscottr * documentation and/or other materials provided with the distribution. 151.6Sscottr * 3. The name of the author may not be used to endorse or promote products 161.2Sscottr * derived from this software without specific prior written permission. 171.2Sscottr * 181.2Sscottr * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 191.2Sscottr * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 201.2Sscottr * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 211.2Sscottr * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 221.2Sscottr * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 231.2Sscottr * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 241.2Sscottr * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 251.2Sscottr * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 261.2Sscottr * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 271.2Sscottr * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 281.2Sscottr */ 291.1Sscottr 301.1Sscottr#ifndef _MAC68K_INTR_H_ 311.1Sscottr#define _MAC68K_INTR_H_ 321.1Sscottr 331.16Sthorpej#include <machine/psl.h> 341.16Sthorpej 351.1Sscottr#ifdef _KERNEL 361.1Sscottr 371.1Sscottr/* spl0 requires checking for software interrupts */ 381.1Sscottr 391.15Sthorpej/* 401.15Sthorpej * This array contains the appropriate PSL_S|PSL_IPL? values 411.15Sthorpej * to raise interrupt priority to the requested level. 421.15Sthorpej */ 431.15Sthorpejextern unsigned short mac68k_ipls[]; 441.15Sthorpej 451.22Syamt#define MAC68K_IPL_NONE 0 461.22Syamt#define MAC68K_IPL_SOFT 1 471.22Syamt#define MAC68K_IPL_BIO 2 481.22Syamt#define MAC68K_IPL_NET 3 491.22Syamt#define MAC68K_IPL_TTY 4 501.22Syamt#define MAC68K_IPL_IMP 5 511.22Syamt#define MAC68K_IPL_AUDIO 6 521.22Syamt#define MAC68K_IPL_SERIAL 7 531.22Syamt#define MAC68K_IPL_ADB 8 541.22Syamt#define MAC68K_IPL_CLOCK 9 551.22Syamt#define MAC68K_IPL_STATCLOCK 10 561.22Syamt#define MAC68K_IPL_SCHED 11 571.22Syamt#define MAC68K_IPL_HIGH 12 581.22Syamt#define MAC68K_NIPLS 13 591.15Sthorpej 601.4Sscottr/* These spl calls are _not_ to be used by machine-independent code. */ 611.17Sscottr#define spladb() _splraise(mac68k_ipls[MAC68K_IPL_ADB]) 621.4Sscottr#define splzs() splserial() 631.7Sbriggs 641.7Sbriggs/* 651.1Sscottr * These should be used for: 661.1Sscottr * 1) ensuring mutual exclusion (why use processor level?) 671.1Sscottr * 2) allowing faster devices to take priority 681.1Sscottr */ 691.16Sthorpej#define spllowersoftclock() spl1() 701.1Sscottr 711.1Sscottr/* watch out for side effects */ 721.1Sscottr#define splx(s) ((s) & PSL_IPL ? _spl(s) : spl0()) 731.1Sscottr 741.22Syamt#define IPL_NONE MAC68K_IPL_NONE 751.22Syamt#define IPL_SOFTCLOCK MAC68K_IPL_SOFT 761.22Syamt#define IPL_SOFTNET MAC68K_IPL_SOFT 771.22Syamt#define IPL_BIO MAC68K_IPL_BIO 781.22Syamt#define IPL_NET MAC68K_IPL_NET 791.22Syamt#define IPL_TTY MAC68K_IPL_TTY 801.22Syamt#define IPL_VM MAC68K_IPL_IMP 811.22Syamt#define IPL_AUDIO MAC68K_IPL_AUDIO 821.22Syamt#define IPL_CLOCK MAC68K_IPL_CLOCK 831.22Syamt#define IPL_STATCLOCK MAC68K_IPL_STATCLOCK 841.22Syamt#define IPL_SCHED MAC68K_IPL_SCHED 851.22Syamt#define IPL_HIGH MAC68K_IPL_HIGH 861.22Syamt#define IPL_LOCK MAC68K_IPL_HIGH 871.22Syamt#define IPL_SERIAL MAC68K_IPL_SERIAL 881.22Syamt 891.24Syamttypedef int ipl_t; 901.24Syamttypedef struct { 911.24Syamt ipl_t _ipl; 921.24Syamt} ipl_cookie_t; 931.24Syamt 941.24Syamtstatic inline ipl_cookie_t 951.24Syamtmakeiplcookie(ipl_t ipl) 961.24Syamt{ 971.24Syamt 981.24Syamt return (ipl_cookie_t){._ipl = ipl}; 991.24Syamt} 1001.24Syamt 1011.24Syamtstatic inline int 1021.24Syamtsplraiseipl(ipl_cookie_t icookie) 1031.24Syamt{ 1041.24Syamt 1051.24Syamt return _splraise(mac68k_ipls[icookie._ipl]); 1061.24Syamt} 1071.22Syamt 1081.22Syamt#include <sys/spl.h> 1091.22Syamt 1101.1Sscottr/* 1111.1Sscottr * simulated software interrupt register 1121.1Sscottr */ 1131.1Sscottrextern volatile u_int8_t ssir; 1141.1Sscottr 1151.1Sscottr#define SIR_NET 0x01 1161.1Sscottr#define SIR_CLOCK 0x02 1171.1Sscottr#define SIR_SERIAL 0x04 1181.3Sscottr#define SIR_DTMGR 0x08 1191.8Sscottr#define SIR_ADB 0x10 1201.1Sscottr 1211.1Sscottr#define siron(mask) \ 1221.23Sperry __asm volatile ( "orb %1,%0" : "=m" (ssir) : "i" (mask)) 1231.1Sscottr#define siroff(mask) \ 1241.23Sperry __asm volatile ( "andb %1,%0" : "=m" (ssir) : "ir" (~(mask))); 1251.1Sscottr 1261.1Sscottr#define setsoftnet() siron(SIR_NET) 1271.1Sscottr#define setsoftclock() siron(SIR_CLOCK) 1281.1Sscottr#define setsoftserial() siron(SIR_SERIAL) 1291.3Sscottr#define setsoftdtmgr() siron(SIR_DTMGR) 1301.8Sscottr#define setsoftadb() siron(SIR_ADB) 1311.9Sscottr 1321.9Sscottr/* intr.c */ 1331.21Schsvoid intr_init(void); 1341.21Schsvoid intr_establish(int (*)(void *), void *, int); 1351.21Schsvoid intr_disestablish(int); 1361.21Schsvoid intr_dispatch(int); 1371.1Sscottr 1381.1Sscottr/* locore.s */ 1391.21Schsint spl0(void); 1401.1Sscottr#endif /* _KERNEL */ 1411.1Sscottr 1421.1Sscottr#endif /* _MAC68K_INTR_H_ */ 143