intr.h revision 1.4
11.4Sscottr/*	$NetBSD: intr.h,v 1.4 1997/07/23 06:24:33 scottr Exp $	*/
21.2Sscottr
31.2Sscottr/*
41.2Sscottr * Copyright (C) 1997 Scott Reynolds
51.2Sscottr * All rights reserved.
61.2Sscottr *
71.2Sscottr * Redistribution and use in source and binary forms, with or without
81.2Sscottr * modification, are permitted provided that the following conditions
91.2Sscottr * are met:
101.2Sscottr * 1. Redistributions of source code must retain the above copyright
111.2Sscottr *    notice, this list of conditions and the following disclaimer.
121.2Sscottr * 2. Redistributions in binary form must reproduce the above copyright
131.2Sscottr *    notice, this list of conditions and the following disclaimer in the
141.2Sscottr *    documentation and/or other materials provided with the distribution.
151.2Sscottr * 3. All advertising materials mentioning features or use of this software
161.2Sscottr *    must display the following acknowledgement:
171.2Sscottr *      This product includes software developed by Scott Reynolds for
181.2Sscottr *      the NetBSD Project.
191.2Sscottr * 4. The name of the author may not be used to endorse or promote products
201.2Sscottr *    derived from this software without specific prior written permission.
211.2Sscottr *
221.2Sscottr * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
231.2Sscottr * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
241.2Sscottr * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
251.2Sscottr * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
261.2Sscottr * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
271.2Sscottr * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
281.2Sscottr * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
291.2Sscottr * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
301.2Sscottr * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
311.2Sscottr * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
321.2Sscottr */
331.1Sscottr
341.1Sscottr#ifndef _MAC68K_INTR_H_
351.1Sscottr#define _MAC68K_INTR_H_
361.1Sscottr
371.1Sscottr#ifdef _KERNEL
381.1Sscottr/*
391.1Sscottr * spl functions; all but spl0 are done in-line
401.1Sscottr */
411.1Sscottr
421.1Sscottr#define _spl(s)								\
431.1Sscottr({									\
441.1Sscottr        register int _spl_r;						\
451.1Sscottr									\
461.1Sscottr        __asm __volatile ("clrl %0; movew sr,%0; movew %1,sr" :		\
471.1Sscottr                "&=d" (_spl_r) : "di" (s));				\
481.1Sscottr        _spl_r;								\
491.1Sscottr})
501.1Sscottr
511.1Sscottr#define _splraise(s)							\
521.1Sscottr({									\
531.4Sscottr	int _spl_r;							\
541.1Sscottr									\
551.4Sscottr	__asm __volatile ("						\
561.4Sscottr		clrl	d0					;	\
571.4Sscottr		movw	sr,d0					;	\
581.4Sscottr		movl	d0,%0					;	\
591.4Sscottr		andw	#0x700,d0				;	\
601.4Sscottr		movw	%1,d1					;	\
611.4Sscottr		andw	#0x700,d1				;	\
621.4Sscottr		cmpw	d0,d1					;	\
631.4Sscottr		jle	1f					;	\
641.4Sscottr		movw	%1,sr					;	\
651.4Sscottr	    1:"							:	\
661.4Sscottr		    "&=d" (_spl_r)				:	\
671.4Sscottr		    "di" (s)					:	\
681.4Sscottr		    "d0", "d1");					\
691.1Sscottr	_spl_r;								\
701.1Sscottr})
711.1Sscottr
721.1Sscottr/* spl0 requires checking for software interrupts */
731.1Sscottr#define spl1()  _spl(PSL_S|PSL_IPL1)
741.1Sscottr#define spl2()  _spl(PSL_S|PSL_IPL2)
751.1Sscottr#define spl3()  _spl(PSL_S|PSL_IPL3)
761.1Sscottr#define spl4()  _spl(PSL_S|PSL_IPL4)
771.1Sscottr#define spl5()  _spl(PSL_S|PSL_IPL5)
781.1Sscottr#define spl6()  _spl(PSL_S|PSL_IPL6)
791.1Sscottr#define spl7()  _spl(PSL_S|PSL_IPL7)
801.1Sscottr
811.4Sscottr/* These spl calls are _not_ to be used by machine-independent code. */
821.4Sscottr#define	spladb()	splhigh()
831.4Sscottr#define	splzs()		splserial()
841.4Sscottr#define	splsoft()	spl1()
851.4Sscottr
861.1Sscottr/*
871.1Sscottr * These should be used for:
881.1Sscottr * 1) ensuring mutual exclusion (why use processor level?)
891.1Sscottr * 2) allowing faster devices to take priority
901.1Sscottr *
911.1Sscottr * Note that on the Mac, most things are masked at spl1, almost
921.1Sscottr * everything at spl2, and everything but the panic switch and
931.1Sscottr * power at spl4.
941.1Sscottr */
951.4Sscottr#define	splsoftclock()	splsoft()
961.4Sscottr#define	splsoftnet()	splsoft()
971.4Sscottr#define	spltty()	_splraise(PSL_S|PSL_IPL1)
981.4Sscottr#define	splbio()	spl2()
991.4Sscottr#define	splnet()	spl2()
1001.4Sscottr#define	splimp()	spl2()
1011.4Sscottr#define	splclock()	spl2()
1021.4Sscottr#define	splstatclock()	spl2()
1031.4Sscottr#define	splserial()	spl4()
1041.4Sscottr#define	splsched()	spl7()
1051.4Sscottr#define	splhigh()	spl7()
1061.1Sscottr
1071.1Sscottr/* watch out for side effects */
1081.1Sscottr#define splx(s)         ((s) & PSL_IPL ? _spl(s) : spl0())
1091.1Sscottr
1101.1Sscottr/*
1111.1Sscottr * simulated software interrupt register
1121.1Sscottr */
1131.1Sscottrextern volatile u_int8_t ssir;
1141.1Sscottr
1151.1Sscottr#define	SIR_NET		0x01
1161.1Sscottr#define	SIR_CLOCK	0x02
1171.1Sscottr#define	SIR_SERIAL	0x04
1181.3Sscottr#define SIR_DTMGR	0x08
1191.1Sscottr
1201.1Sscottr#define	siron(mask)	\
1211.1Sscottr	__asm __volatile ( "orb %0,_ssir" : : "i" (mask))
1221.1Sscottr#define	siroff(mask)	\
1231.1Sscottr	__asm __volatile ( "andb %0,_ssir" : : "ir" (~(mask)));
1241.1Sscottr
1251.1Sscottr#define	setsoftnet()	siron(SIR_NET)
1261.1Sscottr#define	setsoftclock()	siron(SIR_CLOCK)
1271.1Sscottr#define	setsoftserial()	siron(SIR_SERIAL)
1281.3Sscottr#define	setsoftdtmgr()	siron(SIR_DTMGR)
1291.1Sscottr
1301.1Sscottr/* locore.s */
1311.1Sscottrint	spl0 __P((void));
1321.1Sscottr#endif /* _KERNEL */
1331.1Sscottr
1341.1Sscottr#endif /* _MAC68K_INTR_H_ */
135