intr.h revision 1.1 
1/*	$NetBSD: intr.h,v 1.1 1997/04/13 05:12:40 scottr Exp $	*/
2
3#ifndef _MAC68K_INTR_H_
4#define _MAC68K_INTR_H_
5
6#ifdef _KERNEL
7/*
8 * spl functions; all but spl0 are done in-line
9 */
10
11#define _spl(s)								\
12({									\
13        register int _spl_r;						\
14									\
15        __asm __volatile ("clrl %0; movew sr,%0; movew %1,sr" :		\
16                "&=d" (_spl_r) : "di" (s));				\
17        _spl_r;								\
18})
19
20#define _splraise(s)							\
21({									\
22	register int _spl_r;						\
23									\
24	__asm __volatile ("clrl %0; movew sr,%0;" : "&=d" (_spl_r) : );	\
25	if ((_spl_r & PSL_IPL) < ((s) & PSL_IPL))			\
26		__asm __volatile ("movew %0,sr;" : : "di" (s));		\
27	_spl_r;								\
28})
29
30/* spl0 requires checking for software interrupts */
31#define spl1()  _spl(PSL_S|PSL_IPL1)
32#define spl2()  _spl(PSL_S|PSL_IPL2)
33#define spl3()  _spl(PSL_S|PSL_IPL3)
34#define spl4()  _spl(PSL_S|PSL_IPL4)
35#define spl5()  _spl(PSL_S|PSL_IPL5)
36#define spl6()  _spl(PSL_S|PSL_IPL6)
37#define spl7()  _spl(PSL_S|PSL_IPL7)
38
39/*
40 * These should be used for:
41 * 1) ensuring mutual exclusion (why use processor level?)
42 * 2) allowing faster devices to take priority
43 *
44 * Note that on the Mac, most things are masked at spl1, almost
45 * everything at spl2, and everything but the panic switch and
46 * power at spl4.
47 */
48#define	splsoftclock()	spl1()	/* disallow softclock */
49#define	splsoftnet()	spl1()	/* disallow network */
50#define	spltty()	spl1()	/* disallow tty (softserial & ADB) */
51#define	splbio()	spl2()	/* disallow block I/O */
52#define	splnet()	spl2()	/* disallow network */
53#define	splimp()	spl2()	/* mutual exclusion for memory allocation */
54#define	splclock()	spl2()	/* disallow clock (and other) interrupts */
55#define	splstatclock()	spl2()	/* ditto */
56#define	splzs()		spl4()	/* disallow serial hw interrupts */
57#define	spladb()	spl7()	/* disallow adb interrupts */
58#define	splhigh()	spl7()	/* disallow everything */
59#define	splsched()	spl7()	/* disallow scheduling */
60
61/* watch out for side effects */
62#define splx(s)         ((s) & PSL_IPL ? _spl(s) : spl0())
63
64/*
65 * simulated software interrupt register
66 */
67extern volatile u_int8_t ssir;
68
69#define	SIR_NET		0x01
70#define	SIR_CLOCK	0x02
71#define	SIR_SERIAL	0x04
72
73#define	siron(mask)	\
74	__asm __volatile ( "orb %0,_ssir" : : "i" (mask))
75#define	siroff(mask)	\
76	__asm __volatile ( "andb %0,_ssir" : : "ir" (~(mask)));
77
78#define	setsoftnet()	siron(SIR_NET)
79#define	setsoftclock()	siron(SIR_CLOCK)
80#define	setsoftserial()	siron(SIR_SERIAL)
81
82/* locore.s */
83int	spl0 __P((void));
84#endif /* _KERNEL */
85
86#endif /* _MAC68K_INTR_H_ */
87