intr.h revision 1.5 
1/*	$NetBSD: intr.h,v 1.5 1997/08/03 07:20:40 scottr Exp $	*/
2
3/*
4 * Copyright (C) 1997 Scott Reynolds
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 *    must display the following acknowledgement:
17 *      This product includes software developed by Scott Reynolds for
18 *      the NetBSD Project.
19 * 4. The name of the author may not be used to endorse or promote products
20 *    derived from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34#ifndef _MAC68K_INTR_H_
35#define _MAC68K_INTR_H_
36
37#ifdef _KERNEL
38/*
39 * spl functions; all but spl0 are done in-line
40 */
41
42#define _spl(s)								\
43({									\
44        register int _spl_r;						\
45									\
46        __asm __volatile ("clrl %0; movew sr,%0; movew %1,sr" :		\
47                "&=d" (_spl_r) : "di" (s));				\
48        _spl_r;								\
49})
50
51#define _splraise(s)							\
52({									\
53	int _spl_r;							\
54									\
55	__asm __volatile ("						\
56		clrl	d0					;	\
57		movw	sr,d0					;	\
58		movl	d0,%0					;	\
59		andw	#0x700,d0				;	\
60		movw	%1,d1					;	\
61		andw	#0x700,d1				;	\
62		cmpw	d0,d1					;	\
63		jle	1f					;	\
64		movw	%1,sr					;	\
65	    1:"							:	\
66		    "&=d" (_spl_r)				:	\
67		    "di" (s)					:	\
68		    "d0", "d1");					\
69	_spl_r;								\
70})
71
72/* spl0 requires checking for software interrupts */
73#define spl1()  _spl(PSL_S|PSL_IPL1)
74#define spl2()  _spl(PSL_S|PSL_IPL2)
75#define spl3()  _spl(PSL_S|PSL_IPL3)
76#define spl4()  _spl(PSL_S|PSL_IPL4)
77#define spl5()  _spl(PSL_S|PSL_IPL5)
78#define spl6()  _spl(PSL_S|PSL_IPL6)
79#define spl7()  _spl(PSL_S|PSL_IPL7)
80
81/* These spl calls are _not_ to be used by machine-independent code. */
82#define	spladb()	splhigh()
83#define	splzs()		splserial()
84#define	splsoft()	spl1()
85
86/*
87 * These should be used for:
88 * 1) ensuring mutual exclusion (why use processor level?)
89 * 2) allowing faster devices to take priority
90 *
91 * Note that on the Mac, most things are masked at spl1, almost
92 * everything at spl2, and everything but the panic switch and
93 * power at spl4.
94 */
95#define	splsoftclock()	splsoft()
96#define	splsoftnet()	splsoft()
97#define	spltty()	_splraise(PSL_S|PSL_IPL1)
98#define	splbio()	spl2()
99#define	splnet()	spl2()
100#define	splimp()	spl2()
101#define	splclock()	spl2()
102#define	splstatclock()	spl2()
103#define	splsched()	spl3()
104#define	splserial()	spl4()
105#define	splhigh()	spl7()
106
107/* watch out for side effects */
108#define splx(s)         ((s) & PSL_IPL ? _spl(s) : spl0())
109
110/*
111 * simulated software interrupt register
112 */
113extern volatile u_int8_t ssir;
114
115#define	SIR_NET		0x01
116#define	SIR_CLOCK	0x02
117#define	SIR_SERIAL	0x04
118#define SIR_DTMGR	0x08
119
120#define	siron(mask)	\
121	__asm __volatile ( "orb %0,_ssir" : : "i" (mask))
122#define	siroff(mask)	\
123	__asm __volatile ( "andb %0,_ssir" : : "ir" (~(mask)));
124
125#define	setsoftnet()	siron(SIR_NET)
126#define	setsoftclock()	siron(SIR_CLOCK)
127#define	setsoftserial()	siron(SIR_SERIAL)
128#define	setsoftdtmgr()	siron(SIR_DTMGR)
129
130/* locore.s */
131int	spl0 __P((void));
132#endif /* _KERNEL */
133
134#endif /* _MAC68K_INTR_H_ */
135