z8530var.h revision 1.12 1 1.12 ad /* $NetBSD: z8530var.h,v 1.12 2007/11/07 15:56:12 ad Exp $ */
2 1.1 briggs
3 1.1 briggs /*
4 1.1 briggs * Copyright (c) 1992, 1993
5 1.1 briggs * The Regents of the University of California. All rights reserved.
6 1.7 agc *
7 1.7 agc * This software was developed by the Computer Systems Engineering group
8 1.7 agc * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9 1.7 agc * contributed to Berkeley.
10 1.7 agc *
11 1.7 agc * All advertising materials mentioning features or use of this software
12 1.7 agc * must display the following acknowledgement:
13 1.7 agc * This product includes software developed by the University of
14 1.7 agc * California, Lawrence Berkeley Laboratory.
15 1.7 agc *
16 1.7 agc * Redistribution and use in source and binary forms, with or without
17 1.7 agc * modification, are permitted provided that the following conditions
18 1.7 agc * are met:
19 1.7 agc * 1. Redistributions of source code must retain the above copyright
20 1.7 agc * notice, this list of conditions and the following disclaimer.
21 1.7 agc * 2. Redistributions in binary form must reproduce the above copyright
22 1.7 agc * notice, this list of conditions and the following disclaimer in the
23 1.7 agc * documentation and/or other materials provided with the distribution.
24 1.7 agc * 3. Neither the name of the University nor the names of its contributors
25 1.7 agc * may be used to endorse or promote products derived from this software
26 1.7 agc * without specific prior written permission.
27 1.7 agc *
28 1.7 agc * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 1.7 agc * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 1.7 agc * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 1.7 agc * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 1.7 agc * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 1.7 agc * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 1.7 agc * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 1.7 agc * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 1.7 agc * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 1.7 agc * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 1.7 agc * SUCH DAMAGE.
39 1.7 agc *
40 1.7 agc * @(#)zsvar.h 8.1 (Berkeley) 6/11/93
41 1.7 agc */
42 1.7 agc
43 1.7 agc /*
44 1.7 agc * Copyright (c) 1994 Gordon W. Ross
45 1.1 briggs *
46 1.1 briggs * This software was developed by the Computer Systems Engineering group
47 1.1 briggs * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
48 1.1 briggs * contributed to Berkeley.
49 1.1 briggs *
50 1.1 briggs * All advertising materials mentioning features or use of this software
51 1.1 briggs * must display the following acknowledgement:
52 1.1 briggs * This product includes software developed by the University of
53 1.1 briggs * California, Lawrence Berkeley Laboratory.
54 1.1 briggs *
55 1.1 briggs * Redistribution and use in source and binary forms, with or without
56 1.1 briggs * modification, are permitted provided that the following conditions
57 1.1 briggs * are met:
58 1.1 briggs * 1. Redistributions of source code must retain the above copyright
59 1.1 briggs * notice, this list of conditions and the following disclaimer.
60 1.1 briggs * 2. Redistributions in binary form must reproduce the above copyright
61 1.1 briggs * notice, this list of conditions and the following disclaimer in the
62 1.1 briggs * documentation and/or other materials provided with the distribution.
63 1.1 briggs * 3. All advertising materials mentioning features or use of this software
64 1.1 briggs * must display the following acknowledgement:
65 1.1 briggs * This product includes software developed by the University of
66 1.1 briggs * California, Berkeley and its contributors.
67 1.1 briggs * 4. Neither the name of the University nor the names of its contributors
68 1.1 briggs * may be used to endorse or promote products derived from this software
69 1.1 briggs * without specific prior written permission.
70 1.1 briggs *
71 1.1 briggs * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
72 1.1 briggs * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
73 1.1 briggs * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
74 1.1 briggs * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
75 1.1 briggs * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
76 1.1 briggs * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
77 1.1 briggs * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
78 1.1 briggs * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
79 1.1 briggs * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
80 1.1 briggs * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
81 1.1 briggs * SUCH DAMAGE.
82 1.1 briggs *
83 1.1 briggs * @(#)zsvar.h 8.1 (Berkeley) 6/11/93
84 1.1 briggs */
85 1.1 briggs
86 1.5 scottr #include <dev/ic/z8530sc.h>
87 1.5 scottr
88 1.5 scottr /*
89 1.5 scottr * Clock source info structure, added here so xzs_chanstate works
90 1.5 scottr */
91 1.5 scottr struct zsclksrc {
92 1.5 scottr long clk; /* clock rate, in MHz, present on signal line */
93 1.5 scottr int flags; /* Specifies how this source can be used
94 1.5 scottr (RTxC divided, RTxC BRG, PCLK BRG, TRxC divided)
95 1.5 scottr and also if the source is "external" and if it
96 1.5 scottr is changeable (by an ioctl ex.). The
97 1.5 scottr source usage flags are used by the tty
98 1.5 scottr child. The other bits tell zsloadchannelregs
99 1.5 scottr if it should call an md signal source
100 1.5 scottr changing routine. ZSC_VARIABLE says if
101 1.5 scottr an ioctl should be able to cahnge the
102 1.5 scottr clock rate.*/
103 1.5 scottr };
104 1.5 scottr #define ZSC_PCLK 0x01
105 1.5 scottr #define ZSC_RTXBRG 0x02
106 1.5 scottr #define ZSC_RTXDIV 0x04
107 1.5 scottr #define ZSC_TRXDIV 0x08
108 1.5 scottr #define ZSC_VARIABLE 0x40
109 1.5 scottr #define ZSC_EXTERN 0x80
110 1.5 scottr
111 1.5 scottr #define ZSC_BRG 0x03
112 1.5 scottr #define ZSC_DIV 0x0c
113 1.5 scottr
114 1.5 scottr
115 1.5 scottr /*
116 1.5 scottr * These are the machine-dependent (extended) variants of
117 1.5 scottr * struct zs_chanstate and struct zsc_softc
118 1.5 scottr */
119 1.5 scottr struct xzs_chanstate {
120 1.5 scottr /* machine-independent part (First!)*/
121 1.5 scottr struct zs_chanstate xzs_cs;
122 1.5 scottr /* machine-dependent extensions */
123 1.5 scottr int cs_hwflags;
124 1.5 scottr int cs_chip; /* type of chip */
125 1.5 scottr /* Clock source info... */
126 1.5 scottr int cs_clock_count; /* how many signal sources available */
127 1.5 scottr struct zsclksrc cs_clocks[4]; /* info on available signal sources */
128 1.5 scottr long cs_cclk_flag; /* flag for current clock source */
129 1.5 scottr long cs_pclk_flag; /* flag for pending clock source */
130 1.5 scottr int cs_csource; /* current source # */
131 1.5 scottr int cs_psource; /* pending source # */
132 1.5 scottr };
133 1.5 scottr
134 1.5 scottr struct zsc_softc {
135 1.5 scottr struct device zsc_dev; /* required first: base device */
136 1.5 scottr struct zs_chanstate *zsc_cs[2]; /* channel A and B soft state */
137 1.5 scottr /* Machine-dependent part follows... */
138 1.5 scottr struct xzs_chanstate xzsc_xcs_store[2];
139 1.11 tsutsui void *zsc_softintr_cookie;
140 1.5 scottr };
141 1.1 briggs
142 1.1 briggs /*
143 1.1 briggs * Functions to read and write individual registers in a channel.
144 1.1 briggs * The ZS chip requires a 1.6 uSec. recovery time between accesses,
145 1.1 briggs * and the Sun3 hardware does NOT take care of this for you.
146 1.1 briggs * MacII hardware DOES dake care of the delay for us. :-)
147 1.5 scottr * XXX - Then these should be inline functions! -gwr
148 1.5 scottr * Some clock-chirped macs loose serial ports. It could be that the
149 1.5 scottr * hardware delay is tied to the CPU speed, and that the minimum delay
150 1.5 scottr * no longer's respected. For them, ZS_DELAY might help.
151 1.5 scottr * XXX - no one seems to want to try and check this -wrs
152 1.1 briggs */
153 1.1 briggs
154 1.8 chs u_char zs_read_reg(struct zs_chanstate *, u_char);
155 1.8 chs u_char zs_read_csr(struct zs_chanstate *);
156 1.8 chs u_char zs_read_data(struct zs_chanstate *);
157 1.8 chs
158 1.8 chs void zs_write_reg(struct zs_chanstate *, u_char, u_char);
159 1.8 chs void zs_write_csr(struct zs_chanstate *, u_char);
160 1.8 chs void zs_write_data(struct zs_chanstate *, u_char);
161 1.1 briggs
162 1.5 scottr /* XXX - Could define splzs() here instead of in psl.h */
163 1.12 ad #define IPL_ZS IPL_SERIAL
164 1.1 briggs
165 1.1 briggs /* Hook for MD ioctl support */
166 1.10 christos int zsmdioctl(struct zs_chanstate *, u_long, void *);
167 1.5 scottr /* XXX - This is a bit gross... */
168 1.6 atatat #define ZS_MD_IOCTL(cs, cmd, data) zsmdioctl(cs, cmd, data)
169 1.1 briggs
170 1.1 briggs /* Callback for "external" clock sources */
171 1.8 chs void zsmd_setclock (struct zs_chanstate *);
172 1.5 scottr #define ZS_MD_SETCLK(cs) zsmd_setclock(cs)
173 1.1 briggs
174 1.1 briggs
175