z8530var.h revision 1.5 1 1.4 christos /* $NetBSD: z8530var.h,v 1.5 1997/10/20 08:14:04 scottr Exp $ */
2 1.1 briggs
3 1.1 briggs /*
4 1.1 briggs * Copyright (c) 1994 Gordon W. Ross
5 1.1 briggs * Copyright (c) 1992, 1993
6 1.1 briggs * The Regents of the University of California. All rights reserved.
7 1.1 briggs *
8 1.1 briggs * This software was developed by the Computer Systems Engineering group
9 1.1 briggs * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
10 1.1 briggs * contributed to Berkeley.
11 1.1 briggs *
12 1.1 briggs * All advertising materials mentioning features or use of this software
13 1.1 briggs * must display the following acknowledgement:
14 1.1 briggs * This product includes software developed by the University of
15 1.1 briggs * California, Lawrence Berkeley Laboratory.
16 1.1 briggs *
17 1.1 briggs * Redistribution and use in source and binary forms, with or without
18 1.1 briggs * modification, are permitted provided that the following conditions
19 1.1 briggs * are met:
20 1.1 briggs * 1. Redistributions of source code must retain the above copyright
21 1.1 briggs * notice, this list of conditions and the following disclaimer.
22 1.1 briggs * 2. Redistributions in binary form must reproduce the above copyright
23 1.1 briggs * notice, this list of conditions and the following disclaimer in the
24 1.1 briggs * documentation and/or other materials provided with the distribution.
25 1.1 briggs * 3. All advertising materials mentioning features or use of this software
26 1.1 briggs * must display the following acknowledgement:
27 1.1 briggs * This product includes software developed by the University of
28 1.1 briggs * California, Berkeley and its contributors.
29 1.1 briggs * 4. Neither the name of the University nor the names of its contributors
30 1.1 briggs * may be used to endorse or promote products derived from this software
31 1.1 briggs * without specific prior written permission.
32 1.1 briggs *
33 1.1 briggs * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
34 1.1 briggs * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
35 1.1 briggs * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
36 1.1 briggs * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
37 1.1 briggs * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
38 1.1 briggs * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
39 1.1 briggs * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40 1.1 briggs * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
41 1.1 briggs * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
42 1.1 briggs * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43 1.1 briggs * SUCH DAMAGE.
44 1.1 briggs *
45 1.1 briggs * @(#)zsvar.h 8.1 (Berkeley) 6/11/93
46 1.1 briggs */
47 1.1 briggs
48 1.5 scottr #include <dev/ic/z8530sc.h>
49 1.5 scottr
50 1.5 scottr /*
51 1.5 scottr * Clock source info structure, added here so xzs_chanstate works
52 1.5 scottr */
53 1.5 scottr struct zsclksrc {
54 1.5 scottr long clk; /* clock rate, in MHz, present on signal line */
55 1.5 scottr int flags; /* Specifies how this source can be used
56 1.5 scottr (RTxC divided, RTxC BRG, PCLK BRG, TRxC divided)
57 1.5 scottr and also if the source is "external" and if it
58 1.5 scottr is changeable (by an ioctl ex.). The
59 1.5 scottr source usage flags are used by the tty
60 1.5 scottr child. The other bits tell zsloadchannelregs
61 1.5 scottr if it should call an md signal source
62 1.5 scottr changing routine. ZSC_VARIABLE says if
63 1.5 scottr an ioctl should be able to cahnge the
64 1.5 scottr clock rate.*/
65 1.5 scottr };
66 1.5 scottr #define ZSC_PCLK 0x01
67 1.5 scottr #define ZSC_RTXBRG 0x02
68 1.5 scottr #define ZSC_RTXDIV 0x04
69 1.5 scottr #define ZSC_TRXDIV 0x08
70 1.5 scottr #define ZSC_VARIABLE 0x40
71 1.5 scottr #define ZSC_EXTERN 0x80
72 1.5 scottr
73 1.5 scottr #define ZSC_BRG 0x03
74 1.5 scottr #define ZSC_DIV 0x0c
75 1.5 scottr
76 1.5 scottr
77 1.5 scottr /*
78 1.5 scottr * These are the machine-dependent (extended) variants of
79 1.5 scottr * struct zs_chanstate and struct zsc_softc
80 1.5 scottr */
81 1.5 scottr struct xzs_chanstate {
82 1.5 scottr /* machine-independent part (First!)*/
83 1.5 scottr struct zs_chanstate xzs_cs;
84 1.5 scottr /* machine-dependent extensions */
85 1.5 scottr int cs_hwflags;
86 1.5 scottr int cs_chip; /* type of chip */
87 1.5 scottr /* Clock source info... */
88 1.5 scottr int cs_clock_count; /* how many signal sources available */
89 1.5 scottr struct zsclksrc cs_clocks[4]; /* info on available signal sources */
90 1.5 scottr long cs_cclk_flag; /* flag for current clock source */
91 1.5 scottr long cs_pclk_flag; /* flag for pending clock source */
92 1.5 scottr int cs_csource; /* current source # */
93 1.5 scottr int cs_psource; /* pending source # */
94 1.5 scottr };
95 1.5 scottr
96 1.5 scottr struct zsc_softc {
97 1.5 scottr struct device zsc_dev; /* required first: base device */
98 1.5 scottr struct zs_chanstate *zsc_cs[2]; /* channel A and B soft state */
99 1.5 scottr /* Machine-dependent part follows... */
100 1.5 scottr struct xzs_chanstate xzsc_xcs_store[2];
101 1.5 scottr };
102 1.1 briggs
103 1.1 briggs /*
104 1.1 briggs * Functions to read and write individual registers in a channel.
105 1.1 briggs * The ZS chip requires a 1.6 uSec. recovery time between accesses,
106 1.1 briggs * and the Sun3 hardware does NOT take care of this for you.
107 1.1 briggs * MacII hardware DOES dake care of the delay for us. :-)
108 1.5 scottr * XXX - Then these should be inline functions! -gwr
109 1.5 scottr * Some clock-chirped macs loose serial ports. It could be that the
110 1.5 scottr * hardware delay is tied to the CPU speed, and that the minimum delay
111 1.5 scottr * no longer's respected. For them, ZS_DELAY might help.
112 1.5 scottr * XXX - no one seems to want to try and check this -wrs
113 1.1 briggs */
114 1.1 briggs
115 1.1 briggs u_char zs_read_reg __P((struct zs_chanstate *cs, u_char reg));
116 1.1 briggs u_char zs_read_csr __P((struct zs_chanstate *cs));
117 1.1 briggs u_char zs_read_data __P((struct zs_chanstate *cs));
118 1.1 briggs
119 1.1 briggs void zs_write_reg __P((struct zs_chanstate *cs, u_char reg, u_char val));
120 1.1 briggs void zs_write_csr __P((struct zs_chanstate *cs, u_char val));
121 1.1 briggs void zs_write_data __P((struct zs_chanstate *cs, u_char val));
122 1.1 briggs
123 1.5 scottr /* XXX - Could define splzs() here instead of in psl.h */
124 1.1 briggs
125 1.1 briggs /* Hook for MD ioctl support */
126 1.5 scottr int zsmdioctl __P((struct zs_chanstate *cs, u_long cmd, caddr_t data));
127 1.5 scottr /* XXX - This is a bit gross... */
128 1.5 scottr #define ZS_MD_IOCTL zsmdioctl(cs, cmd, data)
129 1.1 briggs
130 1.1 briggs /* Callback for "external" clock sources */
131 1.1 briggs void zsmd_setclock __P((struct zs_chanstate *cs));
132 1.5 scottr #define ZS_MD_SETCLK(cs) zsmd_setclock(cs)
133 1.1 briggs
134 1.1 briggs
135