grf_nubus.c revision 1.52
1 /* $NetBSD: grf_nubus.c,v 1.52 1998/09/20 19:17:38 scottr Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Allen Briggs. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Allen Briggs. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 /* 32 * Device-specific routines for handling Nubus-based video cards. 33 */ 34 35 #include "opt_grf.h" 36 37 #include <sys/param.h> 38 39 #include <sys/device.h> 40 #include <sys/ioctl.h> 41 #include <sys/file.h> 42 #include <sys/malloc.h> 43 #include <sys/mman.h> 44 #include <sys/proc.h> 45 #include <sys/systm.h> 46 47 #include <machine/bus.h> 48 #include <machine/cpu.h> 49 #include <machine/grfioctl.h> 50 #include <machine/viareg.h> 51 52 #include <mac68k/nubus/nubus.h> 53 #include <mac68k/dev/grfvar.h> 54 55 static void load_image_data __P((caddr_t data, struct image_data *image)); 56 57 static void grfmv_intr_generic_write1 __P((void *vsc)); 58 static void grfmv_intr_generic_write4 __P((void *vsc)); 59 static void grfmv_intr_generic_or4 __P((void *vsc)); 60 61 static void grfmv_intr_cb264 __P((void *vsc)); 62 static void grfmv_intr_cb364 __P((void *vsc)); 63 static void grfmv_intr_cmax __P((void *vsc)); 64 static void grfmv_intr_cti __P((void *vsc)); 65 static void grfmv_intr_radius __P((void *vsc)); 66 static void grfmv_intr_radius24 __P((void *vsc)); 67 static void grfmv_intr_supermacgfx __P((void *vsc)); 68 static void grfmv_intr_lapis __P((void *vsc)); 69 static void grfmv_intr_formac __P((void *vsc)); 70 static void grfmv_intr_vimage __P((void *vsc)); 71 static void grfmv_intr_gvimage __P((void *vsc)); 72 73 static int grfmv_mode __P((struct grf_softc *gp, int cmd, void *arg)); 74 static int grfmv_match __P((struct device *, struct cfdata *, void *)); 75 static void grfmv_attach __P((struct device *, struct device *, void *)); 76 77 struct cfattach macvid_ca = { 78 sizeof(struct grfbus_softc), grfmv_match, grfmv_attach 79 }; 80 81 static void 82 load_image_data(data, image) 83 caddr_t data; 84 struct image_data *image; 85 { 86 bcopy(data , &image->size, 4); 87 bcopy(data + 4, &image->offset, 4); 88 bcopy(data + 8, &image->rowbytes, 2); 89 bcopy(data + 10, &image->top, 2); 90 bcopy(data + 12, &image->left, 2); 91 bcopy(data + 14, &image->bottom, 2); 92 bcopy(data + 16, &image->right, 2); 93 bcopy(data + 18, &image->version, 2); 94 bcopy(data + 20, &image->packType, 2); 95 bcopy(data + 22, &image->packSize, 4); 96 bcopy(data + 26, &image->hRes, 4); 97 bcopy(data + 30, &image->vRes, 4); 98 bcopy(data + 34, &image->pixelType, 2); 99 bcopy(data + 36, &image->pixelSize, 2); 100 bcopy(data + 38, &image->cmpCount, 2); 101 bcopy(data + 40, &image->cmpSize, 2); 102 bcopy(data + 42, &image->planeBytes, 4); 103 } 104 105 106 static int 107 grfmv_match(parent, cf, aux) 108 struct device *parent; 109 struct cfdata *cf; 110 void *aux; 111 { 112 struct nubus_attach_args *na = (struct nubus_attach_args *)aux; 113 114 if (na->category != NUBUS_CATEGORY_DISPLAY) 115 return 0; 116 117 if (na->type != NUBUS_TYPE_VIDEO) 118 return 0; 119 120 if (na->drsw != NUBUS_DRSW_APPLE) 121 return 0; 122 123 /* 124 * If we've gotten this far, then we're dealing with a real-live 125 * Apple QuickDraw-compatible display card resource. Now, how to 126 * determine that this is an active resource??? Dunno. But we'll 127 * proceed like it is. 128 */ 129 130 return 1; 131 } 132 133 static void 134 grfmv_attach(parent, self, aux) 135 struct device *parent, *self; 136 void *aux; 137 { 138 struct grfbus_softc *sc = (struct grfbus_softc *)self; 139 struct nubus_attach_args *na = (struct nubus_attach_args *)aux; 140 struct image_data image_store, image; 141 struct grfmode *gm; 142 char cardname[CARD_NAME_LEN]; 143 nubus_dirent dirent; 144 nubus_dir dir, mode_dir; 145 int mode; 146 147 bcopy(na->fmt, &sc->sc_slot, sizeof(nubus_slot)); 148 149 sc->sc_tag = na->na_tag; 150 sc->card_id = na->drhw; 151 sc->sc_basepa = (bus_addr_t)NUBUS_SLOT2PA(na->slot); 152 sc->sc_fbofs = 0; 153 154 if (bus_space_map(sc->sc_tag, sc->sc_basepa, NBMEMSIZE, 155 0, &sc->sc_handle)) { 156 printf(": grfmv_attach: failed to map slot %d\n", na->slot); 157 return; 158 } 159 160 nubus_get_main_dir(&sc->sc_slot, &dir); 161 162 if (nubus_find_rsrc(sc->sc_tag, sc->sc_handle, 163 &sc->sc_slot, &dir, na->rsrcid, &dirent) <= 0) { 164 bad: 165 bus_space_unmap(sc->sc_tag, sc->sc_handle, NBMEMSIZE); 166 return; 167 } 168 169 nubus_get_dir_from_rsrc(&sc->sc_slot, &dirent, &sc->board_dir); 170 171 if (nubus_find_rsrc(sc->sc_tag, sc->sc_handle, 172 &sc->sc_slot, &sc->board_dir, NUBUS_RSRC_TYPE, &dirent) <= 0) 173 if ((na->rsrcid != 128) || 174 (nubus_find_rsrc(sc->sc_tag, sc->sc_handle, 175 &sc->sc_slot, &dir, 129, &dirent) <= 0)) 176 goto bad; 177 178 mode = NUBUS_RSRC_FIRSTMODE; 179 if (nubus_find_rsrc(sc->sc_tag, sc->sc_handle, 180 &sc->sc_slot, &sc->board_dir, mode, &dirent) <= 0) { 181 printf(": probe failed to get board rsrc.\n"); 182 goto bad; 183 } 184 185 nubus_get_dir_from_rsrc(&sc->sc_slot, &dirent, &mode_dir); 186 187 if (nubus_find_rsrc(sc->sc_tag, sc->sc_handle, 188 &sc->sc_slot, &mode_dir, VID_PARAMS, &dirent) <= 0) { 189 printf(": probe failed to get mode dir.\n"); 190 goto bad; 191 } 192 193 if (nubus_get_ind_data(sc->sc_tag, sc->sc_handle, &sc->sc_slot, 194 &dirent, (caddr_t)&image_store, sizeof(struct image_data)) <= 0) { 195 printf(": probe failed to get indirect mode data.\n"); 196 goto bad; 197 } 198 199 /* Need to load display info (and driver?), etc... (?) */ 200 201 load_image_data((caddr_t)&image_store, &image); 202 203 gm = &sc->curr_mode; 204 gm->mode_id = mode; 205 gm->ptype = image.pixelType; 206 gm->psize = image.pixelSize; 207 gm->width = image.right - image.left; 208 gm->height = image.bottom - image.top; 209 gm->rowbytes = image.rowbytes; 210 gm->hres = image.hRes; 211 gm->vres = image.vRes; 212 gm->fbsize = gm->height * gm->rowbytes; 213 gm->fbbase = (caddr_t)sc->sc_handle; /* XXX evil hack */ 214 gm->fboff = image.offset; 215 216 strncpy(cardname, nubus_get_card_name(sc->sc_tag, sc->sc_handle, 217 &sc->sc_slot), CARD_NAME_LEN); 218 cardname[CARD_NAME_LEN-1] = '\0'; 219 printf(": %s\n", cardname); 220 221 if (sc->card_id == NUBUS_DRHW_TFB) { 222 /* 223 * This is the Toby card, but apparently some manufacturers 224 * (like Cornerstone) didn't bother to get/use their own 225 * value here, even though the cards are different, so we 226 * so we try to differentiate here. 227 */ 228 if (strncmp(cardname, "Samsung 768", 11) == 0) 229 sc->card_id = NUBUS_DRHW_SAM768; 230 else if (strncmp(cardname, "Toby frame", 10) != 0) 231 printf("%s: This display card pretends to be a TFB!\n", 232 sc->sc_dev.dv_xname); 233 } 234 235 switch (sc->card_id) { 236 case NUBUS_DRHW_TFB: 237 case NUBUS_DRHW_M2HRVC: 238 case NUBUS_DRHW_PVC: 239 sc->cli_offset = 0xa0000; 240 sc->cli_value = 0; 241 add_nubus_intr(na->slot, grfmv_intr_generic_write1, sc); 242 break; 243 case NUBUS_DRHW_WVC: 244 sc->cli_offset = 0xa00000; 245 sc->cli_value = 0; 246 add_nubus_intr(na->slot, grfmv_intr_generic_write1, sc); 247 break; 248 case NUBUS_DRHW_COLORMAX: 249 add_nubus_intr(na->slot, grfmv_intr_cmax, sc); 250 break; 251 case NUBUS_DRHW_SE30: 252 /* Do nothing--SE/30 interrupts are disabled */ 253 break; 254 case NUBUS_DRHW_MDC: 255 sc->cli_offset = 0x200148; 256 sc->cli_value = 1; 257 add_nubus_intr(na->slot, grfmv_intr_generic_write4, sc); 258 259 /* Enable interrupts; to disable, write 0x7 to this location */ 260 bus_space_write_4(sc->sc_tag, sc->sc_handle, 0x20013C, 5); 261 break; 262 case NUBUS_DRHW_CB264: 263 add_nubus_intr(na->slot, grfmv_intr_cb264, sc); 264 break; 265 case NUBUS_DRHW_CB364: 266 add_nubus_intr(na->slot, grfmv_intr_cb364, sc); 267 break; 268 case NUBUS_DRHW_RPC8: 269 sc->cli_offset = 0xfdff8f; 270 sc->cli_value = 0xff; 271 add_nubus_intr(na->slot, grfmv_intr_generic_write1, sc); 272 break; 273 case NUBUS_DRHW_RPC8XJ: 274 sc->cli_value = 0x66; 275 add_nubus_intr(na->slot, grfmv_intr_radius, sc); 276 break; 277 case NUBUS_DRHW_RPC24X: 278 sc->cli_value = 0x64; 279 add_nubus_intr(na->slot, grfmv_intr_radius, sc); 280 break; 281 case NUBUS_DRHW_RPC24XP: 282 add_nubus_intr(na->slot, grfmv_intr_radius24, sc); 283 break; 284 case NUBUS_DRHW_FIILX: 285 case NUBUS_DRHW_FIISXDSP: 286 case NUBUS_DRHW_FUTURASX: 287 sc->cli_offset = 0xf05000; 288 sc->cli_value = 0x80; 289 add_nubus_intr(na->slot, grfmv_intr_generic_write1, sc); 290 break; 291 case NUBUS_DRHW_SAM768: 292 add_nubus_intr(na->slot, grfmv_intr_cti, sc); 293 break; 294 case NUBUS_DRHW_SUPRGFX: 295 add_nubus_intr(na->slot, grfmv_intr_supermacgfx, sc); 296 break; 297 case NUBUS_DRHW_SPECTRM8: 298 sc->cli_offset = 0x0de178; 299 sc->cli_value = 0x80; 300 add_nubus_intr(na->slot, grfmv_intr_generic_or4, sc); 301 break; 302 case NUBUS_DRHW_LAPIS: 303 add_nubus_intr(na->slot, grfmv_intr_lapis, sc); 304 break; 305 case NUBUS_DRHW_FORMAC: 306 add_nubus_intr(na->slot, grfmv_intr_formac, sc); 307 break; 308 case NUBUS_DRHW_ROPS24LXI: 309 sc->cli_offset = 0xfb0010; 310 sc->cli_value = 0x00; 311 add_nubus_intr(na->slot, grfmv_intr_generic_write4, sc); 312 break; 313 case NUBUS_DRHW_VIMAGE: 314 add_nubus_intr(na->slot, grfmv_intr_vimage, sc); 315 break; 316 case NUBUS_DRHW_GVIMAGE: 317 add_nubus_intr(na->slot, grfmv_intr_gvimage, sc); 318 break; 319 case NUBUS_DRHW_MC2124NB: 320 sc->cli_offset = 0xfd1000; 321 sc->cli_value = 0x00; 322 add_nubus_intr(na->slot, grfmv_intr_generic_write4, sc); 323 break; 324 case NUBUS_DRHW_MICRON: 325 /* What do we know about this one? */ 326 default: 327 printf("%s: Unknown video card ID 0x%x --", 328 sc->sc_dev.dv_xname, sc->card_id); 329 printf(" Not installing interrupt routine.\n"); 330 break; 331 } 332 333 /* Perform common video attachment. */ 334 grf_establish(sc, &sc->sc_slot, grfmv_mode); 335 } 336 337 static int 338 grfmv_mode(gp, cmd, arg) 339 struct grf_softc *gp; 340 int cmd; 341 void *arg; 342 { 343 switch (cmd) { 344 case GM_GRFON: 345 case GM_GRFOFF: 346 return 0; 347 case GM_CURRMODE: 348 break; 349 case GM_NEWMODE: 350 break; 351 case GM_LISTMODES: 352 break; 353 } 354 return EINVAL; 355 } 356 357 /* Interrupt handlers... */ 358 /* 359 * Generic routine to clear interrupts for cards where it simply takes 360 * a MOV.B to clear the interrupt. The offset and value of this byte 361 * varies between cards. 362 */ 363 /*ARGSUSED*/ 364 static void 365 grfmv_intr_generic_write1(vsc) 366 void *vsc; 367 { 368 struct grfbus_softc *sc = (struct grfbus_softc *)vsc; 369 370 bus_space_write_1(sc->sc_tag, sc->sc_handle, 371 sc->cli_offset, (u_int8_t)sc->cli_value); 372 } 373 374 /* 375 * Generic routine to clear interrupts for cards where it simply takes 376 * a MOV.L to clear the interrupt. The offset and value of this byte 377 * varies between cards. 378 */ 379 /*ARGSUSED*/ 380 static void 381 grfmv_intr_generic_write4(vsc) 382 void *vsc; 383 { 384 struct grfbus_softc *sc = (struct grfbus_softc *)vsc; 385 386 bus_space_write_4(sc->sc_tag, sc->sc_handle, 387 sc->cli_offset, sc->cli_value); 388 } 389 390 /* 391 * Generic routine to clear interrupts for cards where it simply takes 392 * an OR.L to clear the interrupt. The offset and value of this byte 393 * varies between cards. 394 */ 395 /*ARGSUSED*/ 396 static void 397 grfmv_intr_generic_or4(vsc) 398 void *vsc; 399 { 400 struct grfbus_softc *sc = (struct grfbus_softc *)vsc; 401 unsigned long scratch; 402 403 scratch = bus_space_read_4(sc->sc_tag, sc->sc_handle, sc->cli_offset); 404 scratch |= 0x80; 405 bus_space_write_4(sc->sc_tag, sc->sc_handle, sc->cli_offset, scratch); 406 } 407 408 /* 409 * Routine to clear interrupts for the Radius PrecisionColor 8xj card. 410 */ 411 /*ARGSUSED*/ 412 static void 413 grfmv_intr_radius(vsc) 414 void *vsc; 415 { 416 struct grfbus_softc *sc = (struct grfbus_softc *)vsc; 417 u_int8_t c; 418 419 c = sc->cli_value; 420 421 c |= 0x80; 422 bus_space_write_1(sc->sc_tag, sc->sc_handle, 0xd00403, c); 423 c &= 0x7f; 424 bus_space_write_1(sc->sc_tag, sc->sc_handle, 0xd00403, c); 425 } 426 427 /* 428 * Routine to clear interrupts for the Radius PrecisionColor 24Xp card. 429 * Is this what the 8xj routine is doing, too? 430 */ 431 /*ARGSUSED*/ 432 static void 433 grfmv_intr_radius24(vsc) 434 void *vsc; 435 { 436 struct grfbus_softc *sc = (struct grfbus_softc *)vsc; 437 u_int8_t c; 438 439 c = 0x80 | bus_space_read_1(sc->sc_tag, sc->sc_handle, 0xfffd8); 440 bus_space_write_1(sc->sc_tag, sc->sc_handle, 0xd00403, c); 441 c &= 0x7f; 442 bus_space_write_1(sc->sc_tag, sc->sc_handle, 0xd00403, c); 443 } 444 445 /* 446 * Routine to clear interrupts on Samsung 768x1006 video controller. 447 * This controller was manufactured by Cornerstone Technology, Inc., 448 * now known as Cornerstone Imaging. 449 * 450 * To clear this interrupt, we apparently have to set, then clear, 451 * bit 2 at byte offset 0x80000 from the card's base. 452 * Information for this provided by Brad Salai <bsalai (at) servtech.com> 453 */ 454 /*ARGSUSED*/ 455 static void 456 grfmv_intr_cti(vsc) 457 void *vsc; 458 { 459 struct grfbus_softc *sc = (struct grfbus_softc *)vsc; 460 u_int8_t c; 461 462 c = bus_space_read_1(sc->sc_tag, sc->sc_handle, 0x80000); 463 c |= 0x02; 464 bus_space_write_1(sc->sc_tag, sc->sc_handle, 0x80000, c); 465 c &= 0xfd; 466 bus_space_write_1(sc->sc_tag, sc->sc_handle, 0x80000, c); 467 } 468 469 /*ARGSUSED*/ 470 static void 471 grfmv_intr_cb264(vsc) 472 void *vsc; 473 { 474 struct grfbus_softc *sc; 475 volatile char *slotbase; 476 477 sc = (struct grfbus_softc *)vsc; 478 slotbase = (volatile char *)sc->sc_handle; /* XXX evil hack */ 479 asm volatile(" movl %0,a0 480 movl a0@(0xff6028),d0 481 andl #0x2,d0 482 beq _mv_intr0 483 movql #0x3,d0 484 _mv_intr0: 485 movl a0@(0xff600c),d1 486 andl #0x3,d1 487 cmpl d1,d0 488 beq _mv_intr_fin 489 movl d0,a0@(0xff600c) 490 nop 491 tstb d0 492 beq _mv_intr1 493 movl #0x0002,a0@(0xff6040) 494 movl #0x0102,a0@(0xff6044) 495 movl #0x0105,a0@(0xff6048) 496 movl #0x000e,a0@(0xff604c) 497 movl #0x001c,a0@(0xff6050) 498 movl #0x00bc,a0@(0xff6054) 499 movl #0x00c3,a0@(0xff6058) 500 movl #0x0061,a0@(0xff605c) 501 movl #0x0012,a0@(0xff6060) 502 bra _mv_intr_fin 503 _mv_intr1: 504 movl #0x0002,a0@(0xff6040) 505 movl #0x0209,a0@(0xff6044) 506 movl #0x020c,a0@(0xff6048) 507 movl #0x000f,a0@(0xff604c) 508 movl #0x0027,a0@(0xff6050) 509 movl #0x00c7,a0@(0xff6054) 510 movl #0x00d7,a0@(0xff6058) 511 movl #0x006b,a0@(0xff605c) 512 movl #0x0029,a0@(0xff6060) 513 _mv_intr_fin: 514 movl #0x1,a0@(0xff6014)" 515 : : "g" (slotbase) : "a0","d0","d1"); 516 } 517 518 /* 519 * Support for the Colorboard 364 might be more complex than it needs to 520 * be. If we can find more information about this card, this might be 521 * significantly simplified. Contributions welcome... :-) 522 */ 523 /*ARGSUSED*/ 524 static void 525 grfmv_intr_cb364(vsc) 526 void *vsc; 527 { 528 struct grfbus_softc *sc; 529 volatile char *slotbase; 530 531 sc = (struct grfbus_softc *)vsc; 532 slotbase = (volatile char *)sc->sc_handle; /* XXX evil hack */ 533 asm volatile(" movl %0,a0 534 movl a0@(0xfe6028),d0 535 andl #0x2,d0 536 beq _cb364_intr4 537 movql #0x3,d0 538 movl a0@(0xfe6018),d1 539 movl #0x3,a0@(0xfe6018) 540 movw a0@(0xfe7010),d2 541 movl d1,a0@(0xfe6018) 542 movl a0@(0xfe6020),d1 543 btst #0x06,d2 544 beq _cb364_intr0 545 btst #0x00,d1 546 beq _cb364_intr5 547 bsr _cb364_intr1 548 bra _cb364_intr_out 549 _cb364_intr0: 550 btst #0x00,d1 551 bne _cb364_intr5 552 bsr _cb364_intr1 553 bra _cb364_intr_out 554 _cb364_intr1: 555 movl d0,a0@(0xfe600c) 556 nop 557 tstb d0 558 beq _cb364_intr3 559 movl #0x0002,a0@(0xfe6040) 560 movl #0x0105,a0@(0xfe6048) 561 movl #0x000e,a0@(0xfe604c) 562 movl #0x00c3,a0@(0xfe6058) 563 movl #0x0061,a0@(0xfe605c) 564 btst #0x06,d2 565 beq _cb364_intr2 566 movl #0x001c,a0@(0xfe6050) 567 movl #0x00bc,a0@(0xfe6054) 568 movl #0x0012,a0@(0xfe6060) 569 movl #0x000e,a0@(0xfe6044) 570 movl #0x00c3,a0@(0xfe6064) 571 movl #0x0061,a0@(0xfe6020) 572 rts 573 _cb364_intr2: 574 movl #0x0016,a0@(0xfe6050) 575 movl #0x00b6,a0@(0xfe6054) 576 movl #0x0011,a0@(0xfe6060) 577 movl #0x0101,a0@(0xfe6044) 578 movl #0x00bf,a0@(0xfe6064) 579 movl #0x0001,a0@(0xfe6020) 580 rts 581 _cb364_intr3: 582 movl #0x0002,a0@(0xfe6040) 583 movl #0x0209,a0@(0xfe6044) 584 movl #0x020c,a0@(0xfe6048) 585 movl #0x000f,a0@(0xfe604c) 586 movl #0x0027,a0@(0xfe6050) 587 movl #0x00c7,a0@(0xfe6054) 588 movl #0x00d7,a0@(0xfe6058) 589 movl #0x006b,a0@(0xfe605c) 590 movl #0x0029,a0@(0xfe6060) 591 oril #0x0040,a0@(0xfe6064) 592 movl #0x0000,a0@(0xfe6020) 593 rts 594 _cb364_intr4: 595 movq #0x00,d0 596 _cb364_intr5: 597 movl a0@(0xfe600c),d1 598 andl #0x3,d1 599 cmpl d1,d0 600 beq _cb364_intr_out 601 bsr _cb364_intr1 602 _cb364_intr_out: 603 movl #0x1,a0@(0xfe6014) 604 _cb364_intr_quit: 605 " : : "g" (slotbase) : "a0","d0","d1","d2"); 606 } 607 608 /* 609 * Interrupt clearing routine for SuperMac GFX card. 610 */ 611 /*ARGSUSED*/ 612 static void 613 grfmv_intr_supermacgfx(vsc) 614 void *vsc; 615 { 616 struct grfbus_softc *sc = (struct grfbus_softc *)vsc; 617 u_int8_t dummy; 618 619 dummy = bus_space_read_1(sc->sc_tag, sc->sc_handle, 0xE70D3); 620 } 621 622 /* 623 * Routine to clear interrupts for the Sigma Designs ColorMax card. 624 */ 625 /*ARGSUSED*/ 626 static void 627 grfmv_intr_cmax(vsc) 628 void *vsc; 629 { 630 struct grfbus_softc *sc = (struct grfbus_softc *)vsc; 631 u_int32_t dummy; 632 633 dummy = bus_space_read_4(sc->sc_tag, sc->sc_handle, 0xf501c); 634 dummy = bus_space_read_4(sc->sc_tag, sc->sc_handle, 0xf5018); 635 } 636 637 /* 638 * Routine to clear interrupts for the Lapis ProColorServer 8 PDS card 639 * (for the SE/30). 640 */ 641 /*ARGSUSED*/ 642 static void 643 grfmv_intr_lapis(vsc) 644 void *vsc; 645 { 646 struct grfbus_softc *sc = (struct grfbus_softc *)vsc; 647 648 bus_space_write_1(sc->sc_tag, sc->sc_handle, 0xff7000, 0x08); 649 bus_space_write_1(sc->sc_tag, sc->sc_handle, 0xff7000, 0x0C); 650 } 651 652 /* 653 * Routine to clear interrupts for the Formac Color Card II 654 */ 655 /*ARGSUSED*/ 656 static void 657 grfmv_intr_formac(vsc) 658 void *vsc; 659 { 660 struct grfbus_softc *sc = (struct grfbus_softc *)vsc; 661 u_int8_t dummy; 662 663 dummy = bus_space_read_1(sc->sc_tag, sc->sc_handle, 0xde80db); 664 dummy = bus_space_read_1(sc->sc_tag, sc->sc_handle, 0xde80d3); 665 } 666 667 /* 668 * Routine to clear interrupts for the Vimage by Interware Co., Ltd. 669 */ 670 /*ARGSUSED*/ 671 static void 672 grfmv_intr_vimage(vsc) 673 void *vsc; 674 { 675 struct grfbus_softc *sc = (struct grfbus_softc *)vsc; 676 677 bus_space_write_1(sc->sc_tag, sc->sc_handle, 0x800000, 0x67); 678 bus_space_write_1(sc->sc_tag, sc->sc_handle, 0x800000, 0xE7); 679 } 680 681 /* 682 * Routine to clear interrupts for the Grand Vimage by Interware Co., Ltd. 683 */ 684 /*ARGSUSED*/ 685 static void 686 grfmv_intr_gvimage(vsc) 687 void *vsc; 688 { 689 struct grfbus_softc *sc = (struct grfbus_softc *)vsc; 690 u_int8_t dummy; 691 692 dummy = bus_space_read_1(sc->sc_tag, sc->sc_handle, 0xf00000); 693 } 694
Indexes created Tue Sep 30 20:09:53 GMT 2025