esp.c revision 1.10
1 /* $NetBSD: esp.c,v 1.10 1997/03/05 15:19:18 briggs Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Jason R. Thorpe. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed for the NetBSD Project 18 * by Jason R. Thorpe. 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Copyright (c) 1994 Peter Galbavy 36 * Copyright (c) 1995 Paul Kranenburg 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by Peter Galbavy 50 * 4. The name of the author may not be used to endorse or promote products 51 * derived from this software without specific prior written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 54 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 55 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 56 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 57 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 58 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 59 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 61 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 62 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 63 * POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 /* 67 * Based on aic6360 by Jarle Greipsland 68 * 69 * Acknowledgements: Many of the algorithms used in this driver are 70 * inspired by the work of Julian Elischer (julian (at) tfs.com) and 71 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million! 72 */ 73 74 /* 75 * Initial m68k mac support from Allen Briggs <briggs (at) macbsd.com> 76 * (basically consisting of the match, a bit of the attach, and the 77 * "DMA" glue functions). 78 */ 79 80 #include <sys/types.h> 81 #include <sys/param.h> 82 #include <sys/systm.h> 83 #include <sys/kernel.h> 84 #include <sys/errno.h> 85 #include <sys/ioctl.h> 86 #include <sys/device.h> 87 #include <sys/buf.h> 88 #include <sys/proc.h> 89 #include <sys/user.h> 90 #include <sys/queue.h> 91 92 #include <scsi/scsi_all.h> 93 #include <scsi/scsiconf.h> 94 #include <scsi/scsi_message.h> 95 96 #include <machine/cpu.h> 97 #include <machine/param.h> 98 99 #include <dev/ic/ncr53c9xreg.h> 100 #include <dev/ic/ncr53c9xvar.h> 101 102 #include <machine/viareg.h> 103 104 #include <mac68k/dev/espvar.h> 105 106 void espattach __P((struct device *, struct device *, void *)); 107 int espmatch __P((struct device *, struct cfdata *, void *)); 108 109 /* Linkup to the rest of the kernel */ 110 struct cfattach esp_ca = { 111 sizeof(struct esp_softc), espmatch, espattach 112 }; 113 114 struct cfdriver esp_cd = { 115 NULL, "esp", DV_DULL 116 }; 117 118 struct scsi_adapter esp_switch = { 119 ncr53c9x_scsi_cmd, 120 minphys, /* no max at this level; handled by DMA code */ 121 NULL, 122 NULL, 123 }; 124 125 struct scsi_device esp_dev = { 126 NULL, /* Use default error handler */ 127 NULL, /* have a queue, served by this */ 128 NULL, /* have no async handler */ 129 NULL, /* Use default 'done' routine */ 130 }; 131 132 /* 133 * Functions and the switch for the MI code. 134 */ 135 u_char esp_read_reg __P((struct ncr53c9x_softc *, int)); 136 void esp_write_reg __P((struct ncr53c9x_softc *, int, u_char)); 137 int esp_dma_isintr __P((struct ncr53c9x_softc *)); 138 void esp_dma_reset __P((struct ncr53c9x_softc *)); 139 int esp_dma_intr __P((struct ncr53c9x_softc *)); 140 int esp_dma_setup __P((struct ncr53c9x_softc *, caddr_t *, 141 size_t *, int, size_t *)); 142 void esp_dma_go __P((struct ncr53c9x_softc *)); 143 void esp_dma_stop __P((struct ncr53c9x_softc *)); 144 int esp_dma_isactive __P((struct ncr53c9x_softc *)); 145 146 struct ncr53c9x_glue esp_glue = { 147 esp_read_reg, 148 esp_write_reg, 149 esp_dma_isintr, 150 esp_dma_reset, 151 esp_dma_intr, 152 esp_dma_setup, 153 esp_dma_go, 154 esp_dma_stop, 155 esp_dma_isactive, 156 NULL, /* gl_clear_latched_intr */ 157 }; 158 159 int 160 espmatch(parent, cf, aux) 161 struct device *parent; 162 struct cfdata *cf; 163 void *aux; 164 { 165 if ((cf->cf_unit == 0) && mac68k_machine.scsi96) 166 return (1); 167 if ((cf->cf_unit == 1) && mac68k_machine.scsi96_2) 168 return (1); 169 return (0); 170 } 171 172 /* 173 * Attach this instance, and then all the sub-devices 174 */ 175 void 176 espattach(parent, self, aux) 177 struct device *parent, *self; 178 void *aux; 179 { 180 extern vm_offset_t SCSIBase; 181 struct esp_softc *esc = (void *)self; 182 struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x; 183 184 /* 185 * Set up the glue for MI code early; we use some of it here. 186 */ 187 sc->sc_glue = &esp_glue; 188 189 /* 190 * Save the regs 191 */ 192 if (sc->sc_dev.dv_unit == 0) { 193 unsigned long reg_offset; 194 195 esc->sc_reg = (volatile u_char *) SCSIBase; 196 via2_register_irq(VIA2_SCSIIRQ, 197 (void (*)(void *))ncr53c9x_intr, esc); 198 esc->irq_mask = V2IF_SCSIIRQ; 199 reg_offset = SCSIBase - IOBase; 200 if (reg_offset == 0x10000) { 201 sc->sc_freq = 16500000; 202 } else { 203 sc->sc_freq = 25000000; 204 } 205 } else { 206 esc->sc_reg = (volatile u_char *) SCSIBase + 0x402; 207 via2_register_irq(VIA2_SCSIDRQ, 208 (void (*)(void *))ncr53c9x_intr, esc); 209 esc->irq_mask = V2IF_SCSIDRQ; /* V2IF_T1? */ 210 sc->sc_freq = 25000000; 211 } 212 213 printf(": address %p", esc->sc_reg); 214 215 sc->sc_id = 7; 216 217 /* gimme Mhz */ 218 sc->sc_freq /= 1000000; 219 220 /* 221 * It is necessary to try to load the 2nd config register here, 222 * to find out what rev the esp chip is, else the esp_reset 223 * will not set up the defaults correctly. 224 */ 225 sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB; 226 sc->sc_cfg2 = NCRCFG2_SCSI2; 227 sc->sc_cfg3 = 0; 228 sc->sc_rev = NCR_VARIANT_NCR53C96; 229 230 /* 231 * This is the value used to start sync negotiations 232 * Note that the NCR register "SYNCTP" is programmed 233 * in "clocks per byte", and has a minimum value of 4. 234 * The SCSI period used in negotiation is one-fourth 235 * of the time (in nanoseconds) needed to transfer one byte. 236 * Since the chip's clock is given in MHz, we have the following 237 * formula: 4 * period = (1000 / freq) * 4 238 */ 239 sc->sc_minsync = 1000 / sc->sc_freq; 240 241 sc->sc_minsync = 0; /* No synchronous xfers w/o DMA */ 242 /* Really no limit, but since we want to fit into the TCR... */ 243 sc->sc_maxxfer = 64 * 1024; 244 245 /* 246 * Now try to attach all the sub-devices 247 */ 248 ncr53c9x_attach(sc, &esp_switch, &esp_dev); 249 250 /* 251 * Configure interrupts. 252 */ 253 via2_reg(vPCR) = 0x22; 254 via2_reg(vIFR) = esc->irq_mask; 255 via2_reg(vIER) = 0x80 | esc->irq_mask; 256 } 257 258 /* 259 * Glue functions. 260 */ 261 262 u_char 263 esp_read_reg(sc, reg) 264 struct ncr53c9x_softc *sc; 265 int reg; 266 { 267 struct esp_softc *esc = (struct esp_softc *)sc; 268 269 return esc->sc_reg[reg * 16]; 270 } 271 272 void 273 esp_write_reg(sc, reg, val) 274 struct ncr53c9x_softc *sc; 275 int reg; 276 u_char val; 277 { 278 struct esp_softc *esc = (struct esp_softc *)sc; 279 u_char v = val; 280 281 if (reg == NCR_CMD && v == (NCRCMD_TRANS|NCRCMD_DMA)) { 282 v = NCRCMD_TRANS; 283 } 284 esc->sc_reg[reg * 16] = v; 285 } 286 287 int 288 esp_dma_isintr(sc) 289 struct ncr53c9x_softc *sc; 290 { 291 struct esp_softc *esc = (struct esp_softc *)sc; 292 293 return esc->sc_reg[NCR_STAT * 16] & 0x80; 294 } 295 296 void 297 esp_dma_reset(sc) 298 struct ncr53c9x_softc *sc; 299 { 300 struct esp_softc *esc = (struct esp_softc *)sc; 301 302 esc->sc_active = 0; 303 esc->sc_tc = 0; 304 } 305 306 int 307 esp_dma_intr(sc) 308 struct ncr53c9x_softc *sc; 309 { 310 register struct esp_softc *esc = (struct esp_softc *)sc; 311 register u_char *p; 312 volatile u_char *cmdreg, *intrreg, *statreg, *fiforeg; 313 register u_int espphase, espstat, espintr; 314 register int cnt; 315 316 if (esc->sc_active == 0) { 317 printf("dma_intr--inactive DMA\n"); 318 return -1; 319 } 320 321 if ((sc->sc_espintr & NCRINTR_BS) == 0) { 322 esc->sc_active = 0; 323 return 0; 324 } 325 326 cnt = *esc->sc_pdmalen; 327 if (*esc->sc_pdmalen == 0) { 328 printf("data interrupt, but no count left."); 329 } 330 331 p = *esc->sc_dmaaddr; 332 espphase = sc->sc_phase; 333 espstat = (u_int) sc->sc_espstat; 334 espintr = (u_int) sc->sc_espintr; 335 cmdreg = esc->sc_reg + NCR_CMD * 16; 336 fiforeg = esc->sc_reg + NCR_FIFO * 16; 337 statreg = esc->sc_reg + NCR_STAT * 16; 338 intrreg = esc->sc_reg + NCR_INTR * 16; 339 do { 340 if (esc->sc_datain) { 341 *p++ = *fiforeg; 342 cnt--; 343 if (espphase == DATA_IN_PHASE) { 344 *cmdreg = NCRCMD_TRANS; 345 } else { 346 esc->sc_active = 0; 347 } 348 } else { 349 if ( (espphase == DATA_OUT_PHASE) 350 || (espphase == MESSAGE_OUT_PHASE)) { 351 *fiforeg = *p++; 352 cnt--; 353 *cmdreg = NCRCMD_TRANS; 354 } else { 355 esc->sc_active = 0; 356 } 357 } 358 359 if (esc->sc_active) { 360 while (!(*statreg & 0x80)); 361 espstat = *statreg; 362 espintr = *intrreg; 363 espphase = (espintr & NCRINTR_DIS) 364 ? /* Disconnected */ BUSFREE_PHASE 365 : espstat & PHASE_MASK; 366 } 367 } while (esc->sc_active && (espintr & NCRINTR_BS)); 368 sc->sc_phase = espphase; 369 sc->sc_espstat = (u_char) espstat; 370 sc->sc_espintr = (u_char) espintr; 371 *esc->sc_dmaaddr = p; 372 *esc->sc_pdmalen = cnt; 373 374 if (*esc->sc_pdmalen == 0) { 375 esc->sc_tc = NCRSTAT_TC; 376 } 377 sc->sc_espstat |= esc->sc_tc; 378 return 0; 379 } 380 381 int 382 esp_dma_setup(sc, addr, len, datain, dmasize) 383 struct ncr53c9x_softc *sc; 384 caddr_t *addr; 385 size_t *len; 386 int datain; 387 size_t *dmasize; 388 { 389 struct esp_softc *esc = (struct esp_softc *)sc; 390 391 esc->sc_dmaaddr = addr; 392 esc->sc_pdmalen = len; 393 esc->sc_datain = datain; 394 esc->sc_dmasize = *dmasize; 395 esc->sc_tc = 0; 396 397 return 0; 398 } 399 400 void 401 esp_dma_go(sc) 402 struct ncr53c9x_softc *sc; 403 { 404 struct esp_softc *esc = (struct esp_softc *)sc; 405 406 if (esc->sc_datain == 0) { 407 esc->sc_reg[NCR_FIFO * 16] = **esc->sc_dmaaddr; 408 (*esc->sc_pdmalen)--; 409 (*esc->sc_dmaaddr)++; 410 } 411 esc->sc_active = 1; 412 } 413 414 void 415 esp_dma_stop(sc) 416 struct ncr53c9x_softc *sc; 417 { 418 } 419 420 int 421 esp_dma_isactive(sc) 422 struct ncr53c9x_softc *sc; 423 { 424 struct esp_softc *esc = (struct esp_softc *)sc; 425 426 return esc->sc_active; 427 } 428
Indexes created Wed Oct 22 06:10:02 GMT 2025