esp.c revision 1.11
1 /* $NetBSD: esp.c,v 1.11 1997/08/27 11:23:48 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Jason R. Thorpe. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed for the NetBSD Project 18 * by Jason R. Thorpe. 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Copyright (c) 1994 Peter Galbavy 36 * Copyright (c) 1995 Paul Kranenburg 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by Peter Galbavy 50 * 4. The name of the author may not be used to endorse or promote products 51 * derived from this software without specific prior written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 54 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 55 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 56 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 57 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 58 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 59 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 61 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 62 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 63 * POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 /* 67 * Based on aic6360 by Jarle Greipsland 68 * 69 * Acknowledgements: Many of the algorithms used in this driver are 70 * inspired by the work of Julian Elischer (julian (at) tfs.com) and 71 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million! 72 */ 73 74 /* 75 * Initial m68k mac support from Allen Briggs <briggs (at) macbsd.com> 76 * (basically consisting of the match, a bit of the attach, and the 77 * "DMA" glue functions). 78 */ 79 80 #include <sys/types.h> 81 #include <sys/param.h> 82 #include <sys/systm.h> 83 #include <sys/kernel.h> 84 #include <sys/errno.h> 85 #include <sys/ioctl.h> 86 #include <sys/device.h> 87 #include <sys/buf.h> 88 #include <sys/proc.h> 89 #include <sys/user.h> 90 #include <sys/queue.h> 91 92 #include <dev/scsipi/scsi_all.h> 93 #include <dev/scsipi/scsipi_all.h> 94 #include <dev/scsipi/scsiconf.h> 95 #include <dev/scsipi/scsi_message.h> 96 97 #include <machine/cpu.h> 98 #include <machine/param.h> 99 100 #include <dev/ic/ncr53c9xreg.h> 101 #include <dev/ic/ncr53c9xvar.h> 102 103 #include <machine/viareg.h> 104 105 #include <mac68k/dev/espvar.h> 106 107 void espattach __P((struct device *, struct device *, void *)); 108 int espmatch __P((struct device *, struct cfdata *, void *)); 109 110 /* Linkup to the rest of the kernel */ 111 struct cfattach esp_ca = { 112 sizeof(struct esp_softc), espmatch, espattach 113 }; 114 115 struct cfdriver esp_cd = { 116 NULL, "esp", DV_DULL 117 }; 118 119 struct scsipi_adapter esp_switch = { 120 ncr53c9x_scsi_cmd, 121 minphys, /* no max at this level; handled by DMA code */ 122 NULL, 123 NULL, 124 }; 125 126 struct scsipi_device esp_dev = { 127 NULL, /* Use default error handler */ 128 NULL, /* have a queue, served by this */ 129 NULL, /* have no async handler */ 130 NULL, /* Use default 'done' routine */ 131 }; 132 133 /* 134 * Functions and the switch for the MI code. 135 */ 136 u_char esp_read_reg __P((struct ncr53c9x_softc *, int)); 137 void esp_write_reg __P((struct ncr53c9x_softc *, int, u_char)); 138 int esp_dma_isintr __P((struct ncr53c9x_softc *)); 139 void esp_dma_reset __P((struct ncr53c9x_softc *)); 140 int esp_dma_intr __P((struct ncr53c9x_softc *)); 141 int esp_dma_setup __P((struct ncr53c9x_softc *, caddr_t *, 142 size_t *, int, size_t *)); 143 void esp_dma_go __P((struct ncr53c9x_softc *)); 144 void esp_dma_stop __P((struct ncr53c9x_softc *)); 145 int esp_dma_isactive __P((struct ncr53c9x_softc *)); 146 147 struct ncr53c9x_glue esp_glue = { 148 esp_read_reg, 149 esp_write_reg, 150 esp_dma_isintr, 151 esp_dma_reset, 152 esp_dma_intr, 153 esp_dma_setup, 154 esp_dma_go, 155 esp_dma_stop, 156 esp_dma_isactive, 157 NULL, /* gl_clear_latched_intr */ 158 }; 159 160 int 161 espmatch(parent, cf, aux) 162 struct device *parent; 163 struct cfdata *cf; 164 void *aux; 165 { 166 if ((cf->cf_unit == 0) && mac68k_machine.scsi96) 167 return (1); 168 if ((cf->cf_unit == 1) && mac68k_machine.scsi96_2) 169 return (1); 170 return (0); 171 } 172 173 /* 174 * Attach this instance, and then all the sub-devices 175 */ 176 void 177 espattach(parent, self, aux) 178 struct device *parent, *self; 179 void *aux; 180 { 181 extern vm_offset_t SCSIBase; 182 struct esp_softc *esc = (void *)self; 183 struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x; 184 185 /* 186 * Set up the glue for MI code early; we use some of it here. 187 */ 188 sc->sc_glue = &esp_glue; 189 190 /* 191 * Save the regs 192 */ 193 if (sc->sc_dev.dv_unit == 0) { 194 unsigned long reg_offset; 195 196 esc->sc_reg = (volatile u_char *) SCSIBase; 197 via2_register_irq(VIA2_SCSIIRQ, 198 (void (*)(void *))ncr53c9x_intr, esc); 199 esc->irq_mask = V2IF_SCSIIRQ; 200 reg_offset = SCSIBase - IOBase; 201 if (reg_offset == 0x10000) { 202 sc->sc_freq = 16500000; 203 } else { 204 sc->sc_freq = 25000000; 205 } 206 } else { 207 esc->sc_reg = (volatile u_char *) SCSIBase + 0x402; 208 via2_register_irq(VIA2_SCSIDRQ, 209 (void (*)(void *))ncr53c9x_intr, esc); 210 esc->irq_mask = V2IF_SCSIDRQ; /* V2IF_T1? */ 211 sc->sc_freq = 25000000; 212 } 213 214 printf(": address %p", esc->sc_reg); 215 216 sc->sc_id = 7; 217 218 /* gimme Mhz */ 219 sc->sc_freq /= 1000000; 220 221 /* 222 * It is necessary to try to load the 2nd config register here, 223 * to find out what rev the esp chip is, else the esp_reset 224 * will not set up the defaults correctly. 225 */ 226 sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB; 227 sc->sc_cfg2 = NCRCFG2_SCSI2; 228 sc->sc_cfg3 = 0; 229 sc->sc_rev = NCR_VARIANT_NCR53C96; 230 231 /* 232 * This is the value used to start sync negotiations 233 * Note that the NCR register "SYNCTP" is programmed 234 * in "clocks per byte", and has a minimum value of 4. 235 * The SCSI period used in negotiation is one-fourth 236 * of the time (in nanoseconds) needed to transfer one byte. 237 * Since the chip's clock is given in MHz, we have the following 238 * formula: 4 * period = (1000 / freq) * 4 239 */ 240 sc->sc_minsync = 1000 / sc->sc_freq; 241 242 sc->sc_minsync = 0; /* No synchronous xfers w/o DMA */ 243 /* Really no limit, but since we want to fit into the TCR... */ 244 sc->sc_maxxfer = 64 * 1024; 245 246 /* 247 * Now try to attach all the sub-devices 248 */ 249 ncr53c9x_attach(sc, &esp_switch, &esp_dev); 250 251 /* 252 * Configure interrupts. 253 */ 254 via2_reg(vPCR) = 0x22; 255 via2_reg(vIFR) = esc->irq_mask; 256 via2_reg(vIER) = 0x80 | esc->irq_mask; 257 } 258 259 /* 260 * Glue functions. 261 */ 262 263 u_char 264 esp_read_reg(sc, reg) 265 struct ncr53c9x_softc *sc; 266 int reg; 267 { 268 struct esp_softc *esc = (struct esp_softc *)sc; 269 270 return esc->sc_reg[reg * 16]; 271 } 272 273 void 274 esp_write_reg(sc, reg, val) 275 struct ncr53c9x_softc *sc; 276 int reg; 277 u_char val; 278 { 279 struct esp_softc *esc = (struct esp_softc *)sc; 280 u_char v = val; 281 282 if (reg == NCR_CMD && v == (NCRCMD_TRANS|NCRCMD_DMA)) { 283 v = NCRCMD_TRANS; 284 } 285 esc->sc_reg[reg * 16] = v; 286 } 287 288 int 289 esp_dma_isintr(sc) 290 struct ncr53c9x_softc *sc; 291 { 292 struct esp_softc *esc = (struct esp_softc *)sc; 293 294 return esc->sc_reg[NCR_STAT * 16] & 0x80; 295 } 296 297 void 298 esp_dma_reset(sc) 299 struct ncr53c9x_softc *sc; 300 { 301 struct esp_softc *esc = (struct esp_softc *)sc; 302 303 esc->sc_active = 0; 304 esc->sc_tc = 0; 305 } 306 307 int 308 esp_dma_intr(sc) 309 struct ncr53c9x_softc *sc; 310 { 311 register struct esp_softc *esc = (struct esp_softc *)sc; 312 register u_char *p; 313 volatile u_char *cmdreg, *intrreg, *statreg, *fiforeg; 314 register u_int espphase, espstat, espintr; 315 register int cnt; 316 317 if (esc->sc_active == 0) { 318 printf("dma_intr--inactive DMA\n"); 319 return -1; 320 } 321 322 if ((sc->sc_espintr & NCRINTR_BS) == 0) { 323 esc->sc_active = 0; 324 return 0; 325 } 326 327 cnt = *esc->sc_pdmalen; 328 if (*esc->sc_pdmalen == 0) { 329 printf("data interrupt, but no count left."); 330 } 331 332 p = *esc->sc_dmaaddr; 333 espphase = sc->sc_phase; 334 espstat = (u_int) sc->sc_espstat; 335 espintr = (u_int) sc->sc_espintr; 336 cmdreg = esc->sc_reg + NCR_CMD * 16; 337 fiforeg = esc->sc_reg + NCR_FIFO * 16; 338 statreg = esc->sc_reg + NCR_STAT * 16; 339 intrreg = esc->sc_reg + NCR_INTR * 16; 340 do { 341 if (esc->sc_datain) { 342 *p++ = *fiforeg; 343 cnt--; 344 if (espphase == DATA_IN_PHASE) { 345 *cmdreg = NCRCMD_TRANS; 346 } else { 347 esc->sc_active = 0; 348 } 349 } else { 350 if ( (espphase == DATA_OUT_PHASE) 351 || (espphase == MESSAGE_OUT_PHASE)) { 352 *fiforeg = *p++; 353 cnt--; 354 *cmdreg = NCRCMD_TRANS; 355 } else { 356 esc->sc_active = 0; 357 } 358 } 359 360 if (esc->sc_active) { 361 while (!(*statreg & 0x80)); 362 espstat = *statreg; 363 espintr = *intrreg; 364 espphase = (espintr & NCRINTR_DIS) 365 ? /* Disconnected */ BUSFREE_PHASE 366 : espstat & PHASE_MASK; 367 } 368 } while (esc->sc_active && (espintr & NCRINTR_BS)); 369 sc->sc_phase = espphase; 370 sc->sc_espstat = (u_char) espstat; 371 sc->sc_espintr = (u_char) espintr; 372 *esc->sc_dmaaddr = p; 373 *esc->sc_pdmalen = cnt; 374 375 if (*esc->sc_pdmalen == 0) { 376 esc->sc_tc = NCRSTAT_TC; 377 } 378 sc->sc_espstat |= esc->sc_tc; 379 return 0; 380 } 381 382 int 383 esp_dma_setup(sc, addr, len, datain, dmasize) 384 struct ncr53c9x_softc *sc; 385 caddr_t *addr; 386 size_t *len; 387 int datain; 388 size_t *dmasize; 389 { 390 struct esp_softc *esc = (struct esp_softc *)sc; 391 392 esc->sc_dmaaddr = addr; 393 esc->sc_pdmalen = len; 394 esc->sc_datain = datain; 395 esc->sc_dmasize = *dmasize; 396 esc->sc_tc = 0; 397 398 return 0; 399 } 400 401 void 402 esp_dma_go(sc) 403 struct ncr53c9x_softc *sc; 404 { 405 struct esp_softc *esc = (struct esp_softc *)sc; 406 407 if (esc->sc_datain == 0) { 408 esc->sc_reg[NCR_FIFO * 16] = **esc->sc_dmaaddr; 409 (*esc->sc_pdmalen)--; 410 (*esc->sc_dmaaddr)++; 411 } 412 esc->sc_active = 1; 413 } 414 415 void 416 esp_dma_stop(sc) 417 struct ncr53c9x_softc *sc; 418 { 419 } 420 421 int 422 esp_dma_isactive(sc) 423 struct ncr53c9x_softc *sc; 424 { 425 struct esp_softc *esc = (struct esp_softc *)sc; 426 427 return esc->sc_active; 428 } 429
Indexes created Sun Sep 28 12:09:53 GMT 2025