wdc_obio.c revision 1.1 1 /* $NetBSD: wdc_obio.c,v 1.1 2002/04/27 19:29:09 shiba Exp $ */
2
3 /*
4 * Copyright (c) 2002 Takeshi Shibagaki All rights reserved.
5 *
6 * mac68k OBIO-IDE attachment created by Takeshi Shibagaki
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Charles M. Hannum.
19 * 4. The name of the author may not be used to endorse or promote products
20 * derived from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #include <sys/types.h>
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/device.h>
38 #include <sys/malloc.h>
39 #include <sys/kernel.h>
40 #include <sys/callout.h>
41
42 #include <machine/bus.h>
43 #include <machine/intr.h>
44 #include <machine/cpu.h>
45 #include <machine/viareg.h>
46
47 #include <mac68k/obio/obiovar.h>
48
49 #include <dev/ata/atavar.h>
50 #include <dev/ic/wdcvar.h>
51
52 #define WDC_OBIO_REG_NPORTS (8<<3)
53 #define WDC_OBIO_AUXREG_OFFSET 0x38
54 #define WDC_OBIO_AUXREG_NPORTS 1
55 #define WDC_OBIO_ISR_OFFSET 0x101
56 #define WDC_OBIO_ISR_NPORTS 1
57
58 static u_long IDEBase = 0x50f1a000;
59
60 /*
61 * XXX This code currently doesn't even try to allow 32-bit data port use.
62 */
63
64 struct wdc_obio_softc {
65 struct wdc_softc sc_wdcdev;
66 struct channel_softc *wdc_chanptr;
67 struct channel_softc wdc_channel;
68 void *sc_ih;
69 };
70
71 int wdc_obio_match __P((struct device *, struct cfdata *, void *));
72 void wdc_obio_attach __P((struct device *, struct device *, void *));
73 void wdc_obio_intr __P((void *));
74 void mac68k_bsh_wdc_set_stride __P((bus_space_tag_t t,
75 bus_space_handle_t *h, int stride));
76 u_int16_t mac68k_bsr2_wdc_gen __P((bus_space_tag_t t,
77 bus_space_handle_t *bsh, bus_size_t offset));
78
79 struct cfattach wdc_obio_ca = {
80 sizeof(struct wdc_obio_softc), wdc_obio_match, wdc_obio_attach
81 };
82
83 int
84 wdc_obio_match(parent, match, aux)
85 struct device *parent;
86 struct cfdata *match;
87 void *aux;
88 {
89 struct obio_attach_args *oa = (struct obio_attach_args *) aux;
90 struct channel_softc ch;
91 static int wdc_matched = 0;
92 int result = 0;
93
94 memset(&ch, 0, sizeof(ch));
95
96 switch (current_mac_model->machineid) {
97 case MACH_MACPB150:
98 case MACH_MACPB190:
99 case MACH_MACPB190CS:
100 case MACH_MACP580:
101 case MACH_MACQ630:
102 ch.cmd_iot = ch.ctl_iot = oa->oa_tag;
103
104 if (bus_space_map(ch.cmd_iot, IDEBase, WDC_OBIO_REG_NPORTS,
105 0, &ch.cmd_ioh))
106 return 0;
107
108 mac68k_bsh_wdc_set_stride(ch.cmd_iot, &ch.cmd_ioh, 4);
109
110 if (bus_space_subregion(ch.cmd_iot, ch.cmd_ioh,
111 WDC_OBIO_AUXREG_OFFSET,
112 WDC_OBIO_AUXREG_NPORTS, &ch.ctl_ioh))
113 return 0;
114
115 result = wdcprobe(&ch);
116
117 bus_space_unmap(ch.cmd_iot, ch.cmd_ioh, WDC_OBIO_REG_NPORTS);
118
119 if (result)
120 wdc_matched = 1;
121 return (result);
122 }
123 return 0;
124 }
125
126 static bus_space_tag_t wdc_obio_isr_tag;
127 static bus_space_handle_t wdc_obio_isr_hdl;
128 static struct channel_softc *ch_sc = NULL;
129
130 void
131 wdc_obio_intr(arg)
132 void *arg;
133 {
134 unsigned char status;
135
136 status = bus_space_read_1(wdc_obio_isr_tag,
137 wdc_obio_isr_hdl, 0);
138 if (status & 0x20) {
139 wdcintr(ch_sc);
140 bus_space_write_1(wdc_obio_isr_tag,
141 wdc_obio_isr_hdl, 0, status&~0x20);
142 }
143 }
144
145 void
146 wdc_obio_attach(parent, self, aux)
147 struct device *parent;
148 struct device *self;
149 void *aux;
150 {
151 struct wdc_obio_softc *sc = (void *)self;
152 struct obio_attach_args *oa = aux;
153 struct channel_softc *chp = &sc->wdc_channel;
154
155 oa->oa_addr = IDEBase;
156 sc->wdc_channel.cmd_iot = sc->wdc_channel.ctl_iot = oa->oa_tag;
157
158 if (bus_space_map(sc->wdc_channel.cmd_iot, oa->oa_addr,
159 WDC_OBIO_REG_NPORTS, 0, &sc->wdc_channel.cmd_ioh)) {
160 printf("%s: couldn't map registers\n",
161 sc->sc_wdcdev.sc_dev.dv_xname);
162 return;
163 }
164
165 mac68k_bsh_wdc_set_stride(sc->wdc_channel.cmd_iot,
166 &sc->wdc_channel.cmd_ioh, 4);
167
168 if (bus_space_subregion(sc->wdc_channel.cmd_iot,
169 sc->wdc_channel.cmd_ioh, WDC_OBIO_AUXREG_OFFSET,
170 WDC_OBIO_AUXREG_NPORTS,
171 &sc->wdc_channel.ctl_ioh))
172 return;
173
174 wdc_obio_isr_tag = oa->oa_tag;
175
176 if (bus_space_map(wdc_obio_isr_tag,
177 oa->oa_addr+WDC_OBIO_ISR_OFFSET,
178 WDC_OBIO_ISR_NPORTS, 0, &wdc_obio_isr_hdl)) {
179 printf("%s: couldn't map intr status register\n",
180 sc->sc_wdcdev.sc_dev.dv_xname);
181 return;
182 }
183
184 switch (current_mac_model->machineid) {
185 case MACH_MACP580:
186 case MACH_MACQ630:
187 /*
188 * Quadra/Performa IDE generates pseudo Nubus intr at slot F
189 */
190 printf(" (Quadra/Performa series IDE interface)");
191
192 add_nubus_intr(0xf, (void (*)(void*))wdc_obio_intr, (void *)sc);
193
194 break;
195 case MACH_MACPB150:
196 case MACH_MACPB190:
197 case MACH_MACPB190CS:
198 /*
199 * PowerBook IDE generates pseudo NuBus intr at slot C
200 */
201 printf(" (PowerBook series IDE interface)");
202
203 add_nubus_intr(0xc, (void (*)(void*))wdc_obio_intr, (void *)sc);
204
205 break;
206 }
207
208 ch_sc = chp;
209 if (sc->sc_wdcdev.sc_dev.dv_cfdata->cf_flags & WDC_CAPABILITY_NOIRQ)
210 sc->sc_wdcdev.cap |= WDC_CAPABILITY_NOIRQ;
211 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16;
212 sc->sc_wdcdev.PIO_cap = 0;
213 sc->wdc_chanptr = chp;
214 sc->sc_wdcdev.channels = &sc->wdc_chanptr;
215 sc->sc_wdcdev.nchannels = 1;
216 chp->channel = 0;
217 chp->wdc = &sc->sc_wdcdev;
218 chp->ch_queue = malloc(sizeof(struct channel_queue), M_DEVBUF, M_NOWAIT);
219
220 if (chp->ch_queue == NULL) {
221 printf("%s: can't allocate memory for command queue",
222 sc->sc_wdcdev.sc_dev.dv_xname);
223 return;
224 }
225
226 printf("\n");
227
228 wdcattach(chp);
229 }
230
231 u_int16_t
232 mac68k_bsr2_wdc_gen(bus_space_tag_t t, bus_space_handle_t *bsh, bus_size_t offset)
233 {
234 return (*(volatile u_int16_t *) (bsh->base + offset * bsh->stride));
235 }
236
237 void
238 mac68k_bsh_wdc_set_stride(bus_space_tag_t t, bus_space_handle_t *h, int stride)
239 {
240 h->stride = stride;
241 h->bsr1 = mac68k_bsr1_gen;
242 h->bsr2 = mac68k_bsr2_wdc_gen;
243 h->bsr4 = mac68k_bsr4_gen;
244 h->bsrs2 = mac68k_bsrs2_gen;
245 h->bsrs4 = mac68k_bsrs4_gen;
246 h->bsrm1 = mac68k_bsrm1_gen;
247 h->bsrm2 = mac68k_bsrm2_swap;
248 h->bsrm4 = mac68k_bsrm4_swap;
249 h->bsrms2 = mac68k_bsrm2;
250 h->bsrms4 = mac68k_bsrm4;
251 h->bsrr1 = mac68k_bsrr1_gen;
252 h->bsrr2 = mac68k_bsrr2_gen;
253 h->bsrr4 = mac68k_bsrr4_gen;
254 h->bsrrs2 = mac68k_bsrrs2_gen;
255 h->bsrrs4 = mac68k_bsrrs4_gen;
256 h->bsw1 = mac68k_bsw1_gen;
257 h->bsw2 = mac68k_bsw2_gen;
258 h->bsw4 = mac68k_bsw4_gen;
259 h->bsws2 = mac68k_bsws2_gen;
260 h->bsws4 = mac68k_bsws4_gen;
261 h->bswm2 = mac68k_bswm2_swap;
262 h->bswm4 = mac68k_bswm4_swap;
263 h->bswms2 = mac68k_bswm2;
264 h->bswms4 = mac68k_bswm4;
265 h->bswr1 = mac68k_bswr1_gen;
266 h->bswr2 = mac68k_bswr2_gen;
267 h->bswr4 = mac68k_bswr4_gen;
268 h->bswrs2 = mac68k_bswrs2_gen;
269 h->bswrs4 = mac68k_bswrs4_gen;
270 h->bssm1 = mac68k_bssm1_gen;
271 h->bssm2 = mac68k_bssm2_gen;
272 h->bssm4 = mac68k_bssm4_gen;
273 h->bssr1 = mac68k_bssr1_gen;
274 h->bssr2 = mac68k_bssr2_gen;
275 h->bssr4 = mac68k_bssr4_gen;
276 }
277