wdc_obio.c revision 1.8 1 /* $NetBSD: wdc_obio.c,v 1.8 2003/12/14 15:31:23 fredb Exp $ */
2
3 /*
4 * Copyright (c) 2002 Takeshi Shibagaki All rights reserved.
5 *
6 * mac68k OBIO-IDE attachment created by Takeshi Shibagaki
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Charles M. Hannum.
19 * 4. The name of the author may not be used to endorse or promote products
20 * derived from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #include <sys/cdefs.h>
35 __KERNEL_RCSID(0, "$NetBSD: wdc_obio.c,v 1.8 2003/12/14 15:31:23 fredb Exp $");
36
37 #include <sys/types.h>
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/device.h>
41 #include <sys/malloc.h>
42 #include <sys/kernel.h>
43 #include <sys/callout.h>
44
45 #include <machine/bus.h>
46 #include <machine/intr.h>
47 #include <machine/cpu.h>
48 #include <machine/viareg.h>
49
50 #include <mac68k/obio/obiovar.h>
51
52 #include <dev/ata/atavar.h>
53 #include <dev/ic/wdcvar.h>
54
55 #define WDC_OBIO_REG_NPORTS 0x40
56 #define WDC_OBIO_AUXREG_OFFSET 0x38
57 #define WDC_OBIO_AUXREG_NPORTS 1
58 #define WDC_OBIO_ISR_OFFSET 0x101
59 #define WDC_OBIO_ISR_NPORTS 1
60
61 static u_long IDEBase = 0x50f1a000;
62
63 /*
64 * XXX This code currently doesn't even try to allow 32-bit data port use.
65 */
66
67 struct wdc_obio_softc {
68 struct wdc_softc sc_wdcdev;
69 struct channel_softc *wdc_chanptr;
70 struct channel_softc wdc_channel;
71 void *sc_ih;
72 };
73
74 int wdc_obio_match (struct device *, struct cfdata *, void *);
75 void wdc_obio_attach (struct device *, struct device *, void *);
76 void wdc_obio_intr (void *);
77
78 CFATTACH_DECL(wdc_obio, sizeof(struct wdc_obio_softc),
79 wdc_obio_match, wdc_obio_attach, NULL, NULL);
80
81 int
82 wdc_obio_match(parent, match, aux)
83 struct device *parent;
84 struct cfdata *match;
85 void *aux;
86 {
87 struct obio_attach_args *oa = (struct obio_attach_args *) aux;
88 struct channel_softc ch;
89 static int wdc_matched = 0;
90 int i, result = 0;
91
92 memset(&ch, 0, sizeof(ch));
93
94 switch (current_mac_model->machineid) {
95 case MACH_MACPB150:
96 case MACH_MACPB190:
97 case MACH_MACPB190CS:
98 case MACH_MACP580:
99 case MACH_MACQ630:
100 ch.cmd_iot = ch.ctl_iot = oa->oa_tag;
101
102 if (bus_space_map(ch.cmd_iot, IDEBase, WDC_OBIO_REG_NPORTS,
103 0, &ch.cmd_baseioh))
104 return 0;
105
106 mac68k_bus_space_handle_swapped(ch.cmd_iot, &ch.cmd_baseioh);
107
108 for (i = 0; i < WDC_NREG; i++) {
109 if (bus_space_subregion(ch.cmd_iot, ch.cmd_baseioh,
110 4 * i, 4, &ch.cmd_iohs[i]) != 0) {
111 return 0;
112 }
113 }
114
115
116 if (bus_space_subregion(ch.cmd_iot, ch.cmd_baseioh,
117 WDC_OBIO_AUXREG_OFFSET,
118 WDC_OBIO_AUXREG_NPORTS, &ch.ctl_ioh))
119 return 0;
120
121 result = wdcprobe(&ch);
122
123 bus_space_unmap(ch.cmd_iot, ch.cmd_baseioh, WDC_OBIO_REG_NPORTS);
124
125 if (result)
126 wdc_matched = 1;
127 return (result);
128 }
129 return 0;
130 }
131
132 static bus_space_tag_t wdc_obio_isr_tag;
133 static bus_space_handle_t wdc_obio_isr_hdl;
134 static struct channel_softc *ch_sc = NULL;
135
136 void
137 wdc_obio_intr(arg)
138 void *arg;
139 {
140 unsigned char status;
141
142 status = bus_space_read_1(wdc_obio_isr_tag,
143 wdc_obio_isr_hdl, 0);
144 if (status & 0x20) {
145 wdcintr(ch_sc);
146 bus_space_write_1(wdc_obio_isr_tag,
147 wdc_obio_isr_hdl, 0, status&~0x20);
148 }
149 }
150
151 void
152 wdc_obio_attach(parent, self, aux)
153 struct device *parent;
154 struct device *self;
155 void *aux;
156 {
157 struct wdc_obio_softc *sc = (void *)self;
158 struct obio_attach_args *oa = aux;
159 struct channel_softc *chp = &sc->wdc_channel;
160 int i;
161
162 oa->oa_addr = IDEBase;
163 sc->wdc_channel.cmd_iot = sc->wdc_channel.ctl_iot = oa->oa_tag;
164
165 if (bus_space_map(sc->wdc_channel.cmd_iot, oa->oa_addr,
166 WDC_OBIO_REG_NPORTS, 0, &sc->wdc_channel.cmd_baseioh)) {
167 printf("%s: couldn't map registers\n",
168 sc->sc_wdcdev.sc_dev.dv_xname);
169 return;
170 }
171
172 mac68k_bus_space_handle_swapped(sc->wdc_channel.cmd_iot,
173 &sc->wdc_channel.cmd_baseioh);
174
175 for (i = 0; i < WDC_NREG; i++) {
176 if (bus_space_subregion(sc->wdc_channel.cmd_iot,
177 sc->wdc_channel.cmd_baseioh, 4 * i, 4,
178 &sc->wdc_channel.cmd_iohs[i]) != 0) {
179 printf("%s: unable to subregion control register\n",
180 sc->sc_wdcdev.sc_dev.dv_xname);
181 return;
182 }
183 }
184
185 if (bus_space_subregion(sc->wdc_channel.cmd_iot,
186 sc->wdc_channel.cmd_baseioh,
187 WDC_OBIO_AUXREG_OFFSET, WDC_OBIO_AUXREG_NPORTS,
188 &sc->wdc_channel.ctl_ioh)) {
189 printf("%s: unable to subregion aux register\n",
190 sc->sc_wdcdev.sc_dev.dv_xname);
191 return;
192 }
193
194 wdc_obio_isr_tag = oa->oa_tag;
195
196 if (bus_space_map(wdc_obio_isr_tag,
197 oa->oa_addr+WDC_OBIO_ISR_OFFSET,
198 WDC_OBIO_ISR_NPORTS, 0, &wdc_obio_isr_hdl)) {
199 printf("%s: couldn't map intr status register\n",
200 sc->sc_wdcdev.sc_dev.dv_xname);
201 return;
202 }
203
204 switch (current_mac_model->machineid) {
205 case MACH_MACP580:
206 case MACH_MACQ630:
207 /*
208 * Quadra/Performa IDE generates pseudo Nubus intr at slot F
209 */
210 printf(" (Quadra/Performa series IDE interface)");
211
212 add_nubus_intr(0xf, (void (*)(void*))wdc_obio_intr, (void *)sc);
213
214 break;
215 case MACH_MACPB150:
216 case MACH_MACPB190:
217 case MACH_MACPB190CS:
218 /*
219 * PowerBook IDE generates pseudo NuBus intr at slot C
220 */
221 printf(" (PowerBook series IDE interface)");
222
223 add_nubus_intr(0xc, (void (*)(void*))wdc_obio_intr, (void *)sc);
224
225 break;
226 }
227
228 ch_sc = chp;
229 if (sc->sc_wdcdev.sc_dev.dv_cfdata->cf_flags & WDC_CAPABILITY_NOIRQ)
230 sc->sc_wdcdev.cap |= WDC_CAPABILITY_NOIRQ;
231 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16;
232 sc->sc_wdcdev.PIO_cap = 0;
233 sc->wdc_chanptr = chp;
234 sc->sc_wdcdev.channels = &sc->wdc_chanptr;
235 sc->sc_wdcdev.nchannels = 1;
236 chp->channel = 0;
237 chp->wdc = &sc->sc_wdcdev;
238 chp->ch_queue = malloc(sizeof(struct channel_queue), M_DEVBUF, M_NOWAIT);
239
240 if (chp->ch_queue == NULL) {
241 printf("%s: can't allocate memory for command queue",
242 sc->sc_wdcdev.sc_dev.dv_xname);
243 return;
244 }
245
246 printf("\n");
247
248 wdcattach(chp);
249 }
250