esp.c revision 1.24
1 /* $NetBSD: esp.c,v 1.24 2008/04/13 04:55:52 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace 9 * Simulation Facility, NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1994 Peter Galbavy 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. All advertising materials mentioning features or use of this software 53 * must display the following acknowledgement: 54 * This product includes software developed by Peter Galbavy 55 * 4. The name of the author may not be used to endorse or promote products 56 * derived from this software without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 60 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 61 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 62 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 63 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 64 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 66 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 67 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 68 * POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 /* 72 * Based on aic6360 by Jarle Greipsland 73 * 74 * Acknowledgements: Many of the algorithms used in this driver are 75 * inspired by the work of Julian Elischer (julian (at) tfs.com) and 76 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million! 77 */ 78 79 #include <sys/cdefs.h> 80 __KERNEL_RCSID(0, "$NetBSD: esp.c,v 1.24 2008/04/13 04:55:52 tsutsui Exp $"); 81 82 #include <sys/types.h> 83 #include <sys/param.h> 84 #include <sys/systm.h> 85 #include <sys/kernel.h> 86 #include <sys/errno.h> 87 #include <sys/ioctl.h> 88 #include <sys/device.h> 89 #include <sys/buf.h> 90 #include <sys/proc.h> 91 #include <sys/user.h> 92 #include <sys/queue.h> 93 #include <sys/malloc.h> 94 95 #include <uvm/uvm_extern.h> 96 97 #include <dev/scsipi/scsi_all.h> 98 #include <dev/scsipi/scsipi_all.h> 99 #include <dev/scsipi/scsiconf.h> 100 #include <dev/scsipi/scsi_message.h> 101 102 #include <dev/ofw/openfirm.h> 103 104 #include <machine/cpu.h> 105 #include <machine/autoconf.h> 106 #include <machine/pio.h> 107 108 #include <dev/ic/ncr53c9xreg.h> 109 #include <dev/ic/ncr53c9xvar.h> 110 111 #include <macppc/dev/dbdma.h> 112 #include <macppc/dev/espvar.h> 113 114 int espmatch(device_t, cfdata_t, void *); 115 void espattach(device_t, device_t, void *); 116 117 /* Linkup to the rest of the kernel */ 118 CFATTACH_DECL_NEW(esp, sizeof(struct esp_softc), 119 espmatch, espattach, NULL, NULL); 120 121 /* 122 * Functions and the switch for the MI code. 123 */ 124 uint8_t esp_read_reg(struct ncr53c9x_softc *, int); 125 void esp_write_reg(struct ncr53c9x_softc *, int, uint8_t); 126 int esp_dma_isintr(struct ncr53c9x_softc *); 127 void esp_dma_reset(struct ncr53c9x_softc *); 128 int esp_dma_intr(struct ncr53c9x_softc *); 129 int esp_dma_setup(struct ncr53c9x_softc *, uint8_t **, 130 size_t *, int, size_t *); 131 void esp_dma_go(struct ncr53c9x_softc *); 132 void esp_dma_stop(struct ncr53c9x_softc *); 133 int esp_dma_isactive(struct ncr53c9x_softc *); 134 135 struct ncr53c9x_glue esp_glue = { 136 esp_read_reg, 137 esp_write_reg, 138 esp_dma_isintr, 139 esp_dma_reset, 140 esp_dma_intr, 141 esp_dma_setup, 142 esp_dma_go, 143 esp_dma_stop, 144 esp_dma_isactive, 145 NULL, /* gl_clear_latched_intr */ 146 }; 147 148 static int espdmaintr(struct esp_softc *); 149 static void esp_shutdownhook(void *); 150 151 int 152 espmatch(device_t parent, cfdata_t cf, void *aux) 153 { 154 struct confargs *ca = aux; 155 156 if (strcmp(ca->ca_name, "53c94") != 0) 157 return 0; 158 159 if (ca->ca_nreg != 16) 160 return 0; 161 if (ca->ca_nintr != 8) 162 return 0; 163 164 return 1; 165 } 166 167 /* 168 * Attach this instance, and then all the sub-devices 169 */ 170 void 171 espattach(device_t parent, device_t self, void *aux) 172 { 173 struct esp_softc *esc = device_private(self); 174 struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x; 175 struct confargs *ca = aux; 176 u_int *reg; 177 int sz; 178 179 /* 180 * Set up glue for MI code early; we use some of it here. 181 */ 182 sc->sc_dev = self; 183 sc->sc_glue = &esp_glue; 184 185 esc->sc_node = ca->ca_node; 186 esc->sc_pri = ca->ca_intr[0]; 187 aprint_normal(" irq %d", esc->sc_pri); 188 189 /* 190 * Map my registers in. 191 */ 192 reg = ca->ca_reg; 193 esc->sc_reg = mapiodev(ca->ca_baseaddr + reg[0], reg[1]); 194 esc->sc_dmareg = mapiodev(ca->ca_baseaddr + reg[2], reg[3]); 195 196 /* Allocate 16-byte aligned DMA command space */ 197 esc->sc_dmacmd = dbdma_alloc(sizeof(dbdma_command_t) * 20); 198 199 /* Other settings */ 200 sc->sc_id = 7; 201 sz = OF_getprop(ca->ca_node, "clock-frequency", 202 &sc->sc_freq, sizeof(int)); 203 if (sz != sizeof(int)) 204 sc->sc_freq = 25000000; 205 206 /* gimme MHz */ 207 sc->sc_freq /= 1000000; 208 209 /* esc->sc_dma->sc_esp = esc;*/ 210 211 /* 212 * XXX More of this should be in ncr53c9x_attach(), but 213 * XXX should we really poke around the chip that much in 214 * XXX the MI code? Think about this more... 215 */ 216 217 /* 218 * Set up static configuration info. 219 */ 220 sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB; 221 sc->sc_cfg2 = NCRCFG2_SCSI2; /* | NCRCFG2_FE */ 222 sc->sc_cfg3 = NCRCFG3_CDB; 223 sc->sc_rev = NCR_VARIANT_NCR53C94; 224 225 /* 226 * XXX minsync and maxxfer _should_ be set up in MI code, 227 * XXX but it appears to have some dependency on what sort 228 * XXX of DMA we're hooked up to, etc. 229 */ 230 231 /* 232 * This is the value used to start sync negotiations 233 * Note that the NCR register "SYNCTP" is programmed 234 * in "clocks per byte", and has a minimum value of 4. 235 * The SCSI period used in negotiation is one-fourth 236 * of the time (in nanoseconds) needed to transfer one byte. 237 * Since the chip's clock is given in MHz, we have the following 238 * formula: 4 * period = (1000 / freq) * 4 239 */ 240 sc->sc_minsync = 1000 / sc->sc_freq; 241 242 sc->sc_maxxfer = 64 * 1024; 243 244 /* and the interuppts */ 245 intr_establish(esc->sc_pri, IST_EDGE, IPL_BIO, ncr53c9x_intr, sc); 246 247 /* Reset SCSI bus when halt. */ 248 shutdownhook_establish(esp_shutdownhook, sc); 249 250 /* Do the common parts of attachment. */ 251 sc->sc_adapter.adapt_minphys = minphys; 252 sc->sc_adapter.adapt_request = ncr53c9x_scsipi_request; 253 ncr53c9x_attach(sc); 254 255 /* Turn on target selection using the `DMA' method */ 256 sc->sc_features |= NCR_F_DMASELECT; 257 } 258 259 /* 260 * Glue functions. 261 */ 262 263 uint8_t 264 esp_read_reg(struct ncr53c9x_softc *sc, int reg) 265 { 266 struct esp_softc *esc = (struct esp_softc *)sc; 267 268 return in8(&esc->sc_reg[reg * 16]); 269 /*return (esc->sc_reg[reg * 16]);*/ 270 } 271 272 void 273 esp_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val) 274 { 275 struct esp_softc *esc = (struct esp_softc *)sc; 276 uint8_t v = val; 277 278 out8(&esc->sc_reg[reg * 16], v); 279 /*esc->sc_reg[reg * 16] = v;*/ 280 } 281 282 int 283 esp_dma_isintr(struct ncr53c9x_softc *sc) 284 { 285 286 return esp_read_reg(sc, NCR_STAT) & NCRSTAT_INT; 287 } 288 289 void 290 esp_dma_reset(struct ncr53c9x_softc *sc) 291 { 292 struct esp_softc *esc = (struct esp_softc *)sc; 293 294 dbdma_stop(esc->sc_dmareg); 295 esc->sc_dmaactive = 0; 296 } 297 298 int 299 esp_dma_intr(struct ncr53c9x_softc *sc) 300 { 301 struct esp_softc *esc = (struct esp_softc *)sc; 302 303 return espdmaintr(esc); 304 } 305 306 int 307 esp_dma_setup(struct ncr53c9x_softc *sc, uint8_t **addr, size_t *len, 308 int datain, size_t *dmasize) 309 { 310 struct esp_softc *esc = (struct esp_softc *)sc; 311 dbdma_command_t *cmdp; 312 u_int cmd; 313 u_int va; 314 int count, offset; 315 316 cmdp = esc->sc_dmacmd; 317 cmd = datain ? DBDMA_CMD_IN_MORE : DBDMA_CMD_OUT_MORE; 318 319 count = *dmasize; 320 321 if (count / PAGE_SIZE > 32) 322 panic("%s: transfer size >= 128k", device_xname(sc->sc_dev)); 323 324 esc->sc_dmaaddr = addr; 325 esc->sc_dmalen = len; 326 esc->sc_dmasize = count; 327 328 va = (u_int)*esc->sc_dmaaddr; 329 offset = va & PGOFSET; 330 331 /* if va is not page-aligned, setup the first page */ 332 if (offset != 0) { 333 int rest = PAGE_SIZE - offset; /* the rest of the page */ 334 335 if (count > rest) { /* if continues to next page */ 336 DBDMA_BUILD(cmdp, cmd, 0, rest, kvtop((void *)va), 337 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, 338 DBDMA_BRANCH_NEVER); 339 count -= rest; 340 va += rest; 341 cmdp++; 342 } 343 } 344 345 /* now va is page-aligned */ 346 while (count > PAGE_SIZE) { 347 DBDMA_BUILD(cmdp, cmd, 0, PAGE_SIZE, kvtop((void *)va), 348 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 349 count -= PAGE_SIZE; 350 va += PAGE_SIZE; 351 cmdp++; 352 } 353 354 /* the last page (count <= PAGE_SIZE here) */ 355 cmd = datain ? DBDMA_CMD_IN_LAST : DBDMA_CMD_OUT_LAST; 356 DBDMA_BUILD(cmdp, cmd , 0, count, kvtop((void *)va), 357 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 358 cmdp++; 359 360 DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0, 361 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 362 363 esc->sc_dma_direction = datain ? D_WRITE : 0; 364 365 return 0; 366 } 367 368 void 369 esp_dma_go(struct ncr53c9x_softc *sc) 370 { 371 struct esp_softc *esc = (struct esp_softc *)sc; 372 373 dbdma_start(esc->sc_dmareg, esc->sc_dmacmd); 374 esc->sc_dmaactive = 1; 375 } 376 377 void 378 esp_dma_stop(struct ncr53c9x_softc *sc) 379 { 380 struct esp_softc *esc = (struct esp_softc *)sc; 381 382 dbdma_stop(esc->sc_dmareg); 383 esc->sc_dmaactive = 0; 384 } 385 386 int 387 esp_dma_isactive(struct ncr53c9x_softc *sc) 388 { 389 struct esp_softc *esc = (struct esp_softc *)sc; 390 391 return esc->sc_dmaactive; 392 } 393 394 395 /* 396 * Pseudo (chained) interrupt from the esp driver to kick the 397 * current running DMA transfer. I am replying on espintr() to 398 * pickup and clean errors for now 399 * 400 * return 1 if it was a DMA continue. 401 */ 402 int 403 espdmaintr(struct esp_softc *sc) 404 { 405 struct ncr53c9x_softc *nsc = (struct ncr53c9x_softc *)sc; 406 int trans, resid; 407 u_long csr = sc->sc_dma_direction; 408 409 #if 0 410 if (csr & D_ERR_PEND) { 411 DMACSR(sc) &= ~D_EN_DMA; /* Stop DMA */ 412 DMACSR(sc) |= D_INVALIDATE; 413 printf("%s: error: csr=%s\n", device_xname(nsc->sc_dev), 414 bitmask_snprintf(csr, DMACSRBITS, bits, sizeof(bits))); 415 return -1; 416 } 417 #endif 418 419 /* This is an "assertion" :) */ 420 if (sc->sc_dmaactive == 0) 421 panic("%s: DMA wasn't active", __func__); 422 423 /* dbdma_flush(sc->sc_dmareg); */ 424 425 /* DMA has stopped */ 426 dbdma_stop(sc->sc_dmareg); 427 sc->sc_dmaactive = 0; 428 429 if (sc->sc_dmasize == 0) { 430 /* A "Transfer Pad" operation completed */ 431 NCR_DMA(("dmaintr: discarded %d bytes (tcl=%d, tcm=%d)\n", 432 NCR_READ_REG(nsc, NCR_TCL) | 433 (NCR_READ_REG(nsc, NCR_TCM) << 8), 434 NCR_READ_REG(nsc, NCR_TCL), 435 NCR_READ_REG(nsc, NCR_TCM))); 436 return 0; 437 } 438 439 resid = 0; 440 /* 441 * If a transfer onto the SCSI bus gets interrupted by the device 442 * (e.g. for a SAVEPOINTER message), the data in the FIFO counts 443 * as residual since the ESP counter registers get decremented as 444 * bytes are clocked into the FIFO. 445 */ 446 if (!(csr & D_WRITE) && 447 (resid = (NCR_READ_REG(nsc, NCR_FFLAG) & NCRFIFO_FF)) != 0) { 448 NCR_DMA(("dmaintr: empty esp FIFO of %d ", resid)); 449 } 450 451 if ((nsc->sc_espstat & NCRSTAT_TC) == 0) { 452 /* 453 * `Terminal count' is off, so read the residue 454 * out of the ESP counter registers. 455 */ 456 resid += (NCR_READ_REG(nsc, NCR_TCL) | 457 (NCR_READ_REG(nsc, NCR_TCM) << 8) | 458 ((nsc->sc_cfg2 & NCRCFG2_FE) 459 ? (NCR_READ_REG(nsc, NCR_TCH) << 16) 460 : 0)); 461 462 if (resid == 0 && sc->sc_dmasize == 65536 && 463 (nsc->sc_cfg2 & NCRCFG2_FE) == 0) 464 /* A transfer of 64K is encoded as `TCL=TCM=0' */ 465 resid = 65536; 466 } 467 468 trans = sc->sc_dmasize - resid; 469 if (trans < 0) { /* transferred < 0 ? */ 470 #if 0 471 /* 472 * This situation can happen in perfectly normal operation 473 * if the ESP is reselected while using DMA to select 474 * another target. As such, don't print the warning. 475 */ 476 printf("%s: xfer (%d) > req (%d)\n", 477 device_xname(nsc->sc_dev), trans, sc->sc_dmasize); 478 #endif 479 trans = sc->sc_dmasize; 480 } 481 482 NCR_DMA(("dmaintr: tcl=%d, tcm=%d, tch=%d; trans=%d, resid=%d\n", 483 NCR_READ_REG(nsc, NCR_TCL), 484 NCR_READ_REG(nsc, NCR_TCM), 485 (nsc->sc_cfg2 & NCRCFG2_FE) 486 ? NCR_READ_REG(nsc, NCR_TCH) : 0, 487 trans, resid)); 488 489 #if 0 490 if (csr & D_WRITE) 491 flushcache(*sc->sc_dmaaddr, trans); 492 #endif 493 494 *sc->sc_dmalen -= trans; 495 *sc->sc_dmaaddr += trans; 496 497 #if 0 /* this is not normal operation just yet */ 498 if (*sc->sc_dmalen == 0 || 499 nsc->sc_phase != nsc->sc_prevphase) 500 return 0; 501 502 /* and again */ 503 dma_start(sc, sc->sc_dmaaddr, sc->sc_dmalen, DMACSR(sc) & D_WRITE); 504 return 1; 505 #endif 506 return 0; 507 } 508 509 void 510 esp_shutdownhook(void *arg) 511 { 512 struct ncr53c9x_softc *sc = arg; 513 514 NCRCMD(sc, NCRCMD_RSTSCSI); 515 } 516
Indexes created Thu Oct 02 01:09:59 GMT 2025