esp.c revision 1.27
1 /* $NetBSD: esp.c,v 1.27 2009/09/26 15:46:48 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace 9 * Simulation Facility, NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1994 Peter Galbavy 35 * All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by Peter Galbavy 48 * 4. The name of the author may not be used to endorse or promote products 49 * derived from this software without specific prior written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 52 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 53 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 54 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 55 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 56 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 57 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 58 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 59 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 60 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 61 * POSSIBILITY OF SUCH DAMAGE. 62 */ 63 64 /* 65 * Based on aic6360 by Jarle Greipsland 66 * 67 * Acknowledgements: Many of the algorithms used in this driver are 68 * inspired by the work of Julian Elischer (julian (at) tfs.com) and 69 * Charles Hannum (mycroft (at) duality.gnu.ai.mit.edu). Thanks a million! 70 */ 71 72 #include <sys/cdefs.h> 73 __KERNEL_RCSID(0, "$NetBSD: esp.c,v 1.27 2009/09/26 15:46:48 tsutsui Exp $"); 74 75 #include <sys/types.h> 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/kernel.h> 79 #include <sys/errno.h> 80 #include <sys/ioctl.h> 81 #include <sys/device.h> 82 #include <sys/buf.h> 83 #include <sys/proc.h> 84 #include <sys/user.h> 85 #include <sys/queue.h> 86 #include <sys/malloc.h> 87 88 #include <uvm/uvm_extern.h> 89 90 #include <dev/scsipi/scsi_all.h> 91 #include <dev/scsipi/scsipi_all.h> 92 #include <dev/scsipi/scsiconf.h> 93 #include <dev/scsipi/scsi_message.h> 94 95 #include <dev/ofw/openfirm.h> 96 97 #include <machine/cpu.h> 98 #include <machine/autoconf.h> 99 #include <machine/pio.h> 100 101 #include <dev/ic/ncr53c9xreg.h> 102 #include <dev/ic/ncr53c9xvar.h> 103 104 #include <macppc/dev/dbdma.h> 105 #include <macppc/dev/espvar.h> 106 107 int espmatch(device_t, cfdata_t, void *); 108 void espattach(device_t, device_t, void *); 109 110 /* Linkup to the rest of the kernel */ 111 CFATTACH_DECL_NEW(esp, sizeof(struct esp_softc), 112 espmatch, espattach, NULL, NULL); 113 114 /* 115 * Functions and the switch for the MI code. 116 */ 117 uint8_t esp_read_reg(struct ncr53c9x_softc *, int); 118 void esp_write_reg(struct ncr53c9x_softc *, int, uint8_t); 119 int esp_dma_isintr(struct ncr53c9x_softc *); 120 void esp_dma_reset(struct ncr53c9x_softc *); 121 int esp_dma_intr(struct ncr53c9x_softc *); 122 int esp_dma_setup(struct ncr53c9x_softc *, uint8_t **, 123 size_t *, int, size_t *); 124 void esp_dma_go(struct ncr53c9x_softc *); 125 void esp_dma_stop(struct ncr53c9x_softc *); 126 int esp_dma_isactive(struct ncr53c9x_softc *); 127 128 struct ncr53c9x_glue esp_glue = { 129 esp_read_reg, 130 esp_write_reg, 131 esp_dma_isintr, 132 esp_dma_reset, 133 esp_dma_intr, 134 esp_dma_setup, 135 esp_dma_go, 136 esp_dma_stop, 137 esp_dma_isactive, 138 NULL, /* gl_clear_latched_intr */ 139 }; 140 141 static int espdmaintr(struct esp_softc *); 142 static bool esp_shutdown(device_t, int); 143 144 int 145 espmatch(device_t parent, cfdata_t cf, void *aux) 146 { 147 struct confargs *ca = aux; 148 149 if (strcmp(ca->ca_name, "53c94") != 0) 150 return 0; 151 152 if (ca->ca_nreg != 16) 153 return 0; 154 if (ca->ca_nintr != 8) 155 return 0; 156 157 return 1; 158 } 159 160 /* 161 * Attach this instance, and then all the sub-devices 162 */ 163 void 164 espattach(device_t parent, device_t self, void *aux) 165 { 166 struct esp_softc *esc = device_private(self); 167 struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x; 168 struct confargs *ca = aux; 169 u_int *reg; 170 int sz; 171 172 /* 173 * Set up glue for MI code early; we use some of it here. 174 */ 175 sc->sc_dev = self; 176 sc->sc_glue = &esp_glue; 177 178 esc->sc_node = ca->ca_node; 179 esc->sc_pri = ca->ca_intr[0]; 180 aprint_normal(" irq %d", esc->sc_pri); 181 182 /* 183 * Map my registers in. 184 */ 185 reg = ca->ca_reg; 186 esc->sc_reg = mapiodev(ca->ca_baseaddr + reg[0], reg[1]); 187 esc->sc_dmareg = mapiodev(ca->ca_baseaddr + reg[2], reg[3]); 188 189 /* Allocate 16-byte aligned DMA command space */ 190 esc->sc_dmacmd = dbdma_alloc(sizeof(dbdma_command_t) * 20); 191 192 /* Other settings */ 193 sc->sc_id = 7; 194 sz = OF_getprop(ca->ca_node, "clock-frequency", 195 &sc->sc_freq, sizeof(int)); 196 if (sz != sizeof(int)) 197 sc->sc_freq = 25000000; 198 199 /* gimme MHz */ 200 sc->sc_freq /= 1000000; 201 202 /* esc->sc_dma->sc_esp = esc;*/ 203 204 /* 205 * XXX More of this should be in ncr53c9x_attach(), but 206 * XXX should we really poke around the chip that much in 207 * XXX the MI code? Think about this more... 208 */ 209 210 /* 211 * Set up static configuration info. 212 */ 213 sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB; 214 sc->sc_cfg2 = NCRCFG2_SCSI2; /* | NCRCFG2_FE */ 215 sc->sc_cfg3 = NCRCFG3_CDB; 216 sc->sc_rev = NCR_VARIANT_NCR53C94; 217 218 /* 219 * XXX minsync and maxxfer _should_ be set up in MI code, 220 * XXX but it appears to have some dependency on what sort 221 * XXX of DMA we're hooked up to, etc. 222 */ 223 224 /* 225 * This is the value used to start sync negotiations 226 * Note that the NCR register "SYNCTP" is programmed 227 * in "clocks per byte", and has a minimum value of 4. 228 * The SCSI period used in negotiation is one-fourth 229 * of the time (in nanoseconds) needed to transfer one byte. 230 * Since the chip's clock is given in MHz, we have the following 231 * formula: 4 * period = (1000 / freq) * 4 232 */ 233 sc->sc_minsync = 1000 / sc->sc_freq; 234 235 sc->sc_maxxfer = 64 * 1024; 236 237 /* and the interuppts */ 238 intr_establish(esc->sc_pri, IST_EDGE, IPL_BIO, ncr53c9x_intr, sc); 239 240 /* Do the common parts of attachment. */ 241 sc->sc_adapter.adapt_minphys = minphys; 242 sc->sc_adapter.adapt_request = ncr53c9x_scsipi_request; 243 ncr53c9x_attach(sc); 244 245 /* Turn on target selection using the `DMA' method */ 246 sc->sc_features |= NCR_F_DMASELECT; 247 248 /* Reset SCSI bus when halt. */ 249 if (!pmf_device_register1(self, NULL, NULL, esp_shutdown)) 250 aprint_error_dev(self, "couldn't establish power handler\n"); 251 } 252 253 /* 254 * Glue functions. 255 */ 256 257 uint8_t 258 esp_read_reg(struct ncr53c9x_softc *sc, int reg) 259 { 260 struct esp_softc *esc = (struct esp_softc *)sc; 261 262 return in8(&esc->sc_reg[reg * 16]); 263 /*return (esc->sc_reg[reg * 16]);*/ 264 } 265 266 void 267 esp_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val) 268 { 269 struct esp_softc *esc = (struct esp_softc *)sc; 270 uint8_t v = val; 271 272 out8(&esc->sc_reg[reg * 16], v); 273 /*esc->sc_reg[reg * 16] = v;*/ 274 } 275 276 int 277 esp_dma_isintr(struct ncr53c9x_softc *sc) 278 { 279 280 return esp_read_reg(sc, NCR_STAT) & NCRSTAT_INT; 281 } 282 283 void 284 esp_dma_reset(struct ncr53c9x_softc *sc) 285 { 286 struct esp_softc *esc = (struct esp_softc *)sc; 287 288 dbdma_stop(esc->sc_dmareg); 289 esc->sc_dmaactive = 0; 290 } 291 292 int 293 esp_dma_intr(struct ncr53c9x_softc *sc) 294 { 295 struct esp_softc *esc = (struct esp_softc *)sc; 296 297 return espdmaintr(esc); 298 } 299 300 int 301 esp_dma_setup(struct ncr53c9x_softc *sc, uint8_t **addr, size_t *len, 302 int datain, size_t *dmasize) 303 { 304 struct esp_softc *esc = (struct esp_softc *)sc; 305 dbdma_command_t *cmdp; 306 u_int cmd; 307 u_int va; 308 int count, offset; 309 310 cmdp = esc->sc_dmacmd; 311 cmd = datain ? DBDMA_CMD_IN_MORE : DBDMA_CMD_OUT_MORE; 312 313 count = *dmasize; 314 315 if (count / PAGE_SIZE > 32) 316 panic("%s: transfer size >= 128k", device_xname(sc->sc_dev)); 317 318 esc->sc_dmaaddr = addr; 319 esc->sc_dmalen = len; 320 esc->sc_dmasize = count; 321 322 va = (u_int)*esc->sc_dmaaddr; 323 offset = va & PGOFSET; 324 325 /* if va is not page-aligned, setup the first page */ 326 if (offset != 0) { 327 int rest = PAGE_SIZE - offset; /* the rest of the page */ 328 329 if (count > rest) { /* if continues to next page */ 330 DBDMA_BUILD(cmdp, cmd, 0, rest, kvtop((void *)va), 331 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, 332 DBDMA_BRANCH_NEVER); 333 count -= rest; 334 va += rest; 335 cmdp++; 336 } 337 } 338 339 /* now va is page-aligned */ 340 while (count > PAGE_SIZE) { 341 DBDMA_BUILD(cmdp, cmd, 0, PAGE_SIZE, kvtop((void *)va), 342 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 343 count -= PAGE_SIZE; 344 va += PAGE_SIZE; 345 cmdp++; 346 } 347 348 /* the last page (count <= PAGE_SIZE here) */ 349 cmd = datain ? DBDMA_CMD_IN_LAST : DBDMA_CMD_OUT_LAST; 350 DBDMA_BUILD(cmdp, cmd , 0, count, kvtop((void *)va), 351 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 352 cmdp++; 353 354 DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0, 355 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 356 357 esc->sc_dma_direction = datain ? D_WRITE : 0; 358 359 return 0; 360 } 361 362 void 363 esp_dma_go(struct ncr53c9x_softc *sc) 364 { 365 struct esp_softc *esc = (struct esp_softc *)sc; 366 367 dbdma_start(esc->sc_dmareg, esc->sc_dmacmd); 368 esc->sc_dmaactive = 1; 369 } 370 371 void 372 esp_dma_stop(struct ncr53c9x_softc *sc) 373 { 374 struct esp_softc *esc = (struct esp_softc *)sc; 375 376 dbdma_stop(esc->sc_dmareg); 377 esc->sc_dmaactive = 0; 378 } 379 380 int 381 esp_dma_isactive(struct ncr53c9x_softc *sc) 382 { 383 struct esp_softc *esc = (struct esp_softc *)sc; 384 385 return esc->sc_dmaactive; 386 } 387 388 389 /* 390 * Pseudo (chained) interrupt from the esp driver to kick the 391 * current running DMA transfer. I am replying on espintr() to 392 * pickup and clean errors for now 393 * 394 * return 1 if it was a DMA continue. 395 */ 396 int 397 espdmaintr(struct esp_softc *sc) 398 { 399 struct ncr53c9x_softc *nsc = (struct ncr53c9x_softc *)sc; 400 int trans, resid; 401 u_long csr = sc->sc_dma_direction; 402 403 #if 0 404 if (csr & D_ERR_PEND) { 405 DMACSR(sc) &= ~D_EN_DMA; /* Stop DMA */ 406 DMACSR(sc) |= D_INVALIDATE; 407 snprintb(bits, sizeof(bits), DMACSRBITS, csr); 408 printf("%s: error: csr=%s\n", device_xname(nsc->sc_dev), bits); 409 return -1; 410 } 411 #endif 412 413 /* This is an "assertion" :) */ 414 if (sc->sc_dmaactive == 0) 415 panic("%s: DMA wasn't active", __func__); 416 417 /* dbdma_flush(sc->sc_dmareg); */ 418 419 /* DMA has stopped */ 420 dbdma_stop(sc->sc_dmareg); 421 sc->sc_dmaactive = 0; 422 423 if (sc->sc_dmasize == 0) { 424 /* A "Transfer Pad" operation completed */ 425 NCR_DMA(("dmaintr: discarded %d bytes (tcl=%d, tcm=%d)\n", 426 NCR_READ_REG(nsc, NCR_TCL) | 427 (NCR_READ_REG(nsc, NCR_TCM) << 8), 428 NCR_READ_REG(nsc, NCR_TCL), 429 NCR_READ_REG(nsc, NCR_TCM))); 430 return 0; 431 } 432 433 resid = 0; 434 /* 435 * If a transfer onto the SCSI bus gets interrupted by the device 436 * (e.g. for a SAVEPOINTER message), the data in the FIFO counts 437 * as residual since the ESP counter registers get decremented as 438 * bytes are clocked into the FIFO. 439 */ 440 if (!(csr & D_WRITE) && 441 (resid = (NCR_READ_REG(nsc, NCR_FFLAG) & NCRFIFO_FF)) != 0) { 442 NCR_DMA(("dmaintr: empty esp FIFO of %d ", resid)); 443 } 444 445 if ((nsc->sc_espstat & NCRSTAT_TC) == 0) { 446 /* 447 * `Terminal count' is off, so read the residue 448 * out of the ESP counter registers. 449 */ 450 resid += (NCR_READ_REG(nsc, NCR_TCL) | 451 (NCR_READ_REG(nsc, NCR_TCM) << 8) | 452 ((nsc->sc_cfg2 & NCRCFG2_FE) 453 ? (NCR_READ_REG(nsc, NCR_TCH) << 16) 454 : 0)); 455 456 if (resid == 0 && sc->sc_dmasize == 65536 && 457 (nsc->sc_cfg2 & NCRCFG2_FE) == 0) 458 /* A transfer of 64K is encoded as `TCL=TCM=0' */ 459 resid = 65536; 460 } 461 462 trans = sc->sc_dmasize - resid; 463 if (trans < 0) { /* transferred < 0 ? */ 464 #if 0 465 /* 466 * This situation can happen in perfectly normal operation 467 * if the ESP is reselected while using DMA to select 468 * another target. As such, don't print the warning. 469 */ 470 printf("%s: xfer (%d) > req (%d)\n", 471 device_xname(nsc->sc_dev), trans, sc->sc_dmasize); 472 #endif 473 trans = sc->sc_dmasize; 474 } 475 476 NCR_DMA(("dmaintr: tcl=%d, tcm=%d, tch=%d; trans=%d, resid=%d\n", 477 NCR_READ_REG(nsc, NCR_TCL), 478 NCR_READ_REG(nsc, NCR_TCM), 479 (nsc->sc_cfg2 & NCRCFG2_FE) 480 ? NCR_READ_REG(nsc, NCR_TCH) : 0, 481 trans, resid)); 482 483 #if 0 484 if (csr & D_WRITE) 485 flushcache(*sc->sc_dmaaddr, trans); 486 #endif 487 488 *sc->sc_dmalen -= trans; 489 *sc->sc_dmaaddr += trans; 490 491 #if 0 /* this is not normal operation just yet */ 492 if (*sc->sc_dmalen == 0 || 493 nsc->sc_phase != nsc->sc_prevphase) 494 return 0; 495 496 /* and again */ 497 dma_start(sc, sc->sc_dmaaddr, sc->sc_dmalen, DMACSR(sc) & D_WRITE); 498 return 1; 499 #endif 500 return 0; 501 } 502 503 bool 504 esp_shutdown(device_t self, int howto) 505 { 506 struct esp_softc *esc; 507 struct ncr53c9x_softc *sc; 508 509 esc = device_private(self); 510 sc = &esc->sc_ncr53c9x; 511 NCRCMD(sc, NCRCMD_RSTSCSI); 512 513 return true; 514 } 515
Indexes created Thu Oct 02 01:09:59 GMT 2025