if_gm.c revision 1.16 1 1.16 thorpej /* $NetBSD: if_gm.c,v 1.16 2002/01/16 06:08:54 thorpej Exp $ */
2 1.1 tsubai
3 1.1 tsubai /*-
4 1.1 tsubai * Copyright (c) 2000 Tsubai Masanari. All rights reserved.
5 1.1 tsubai *
6 1.1 tsubai * Redistribution and use in source and binary forms, with or without
7 1.1 tsubai * modification, are permitted provided that the following conditions
8 1.1 tsubai * are met:
9 1.1 tsubai * 1. Redistributions of source code must retain the above copyright
10 1.1 tsubai * notice, this list of conditions and the following disclaimer.
11 1.1 tsubai * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 tsubai * notice, this list of conditions and the following disclaimer in the
13 1.1 tsubai * documentation and/or other materials provided with the distribution.
14 1.1 tsubai * 3. The name of the author may not be used to endorse or promote products
15 1.1 tsubai * derived from this software without specific prior written permission.
16 1.1 tsubai *
17 1.1 tsubai * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.1 tsubai * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.1 tsubai * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.1 tsubai * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.1 tsubai * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.1 tsubai * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.1 tsubai * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.1 tsubai * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.1 tsubai * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 1.1 tsubai * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 tsubai */
28 1.1 tsubai
29 1.1 tsubai #include "opt_inet.h"
30 1.1 tsubai #include "opt_ns.h"
31 1.15 mjl #include "rnd.h"
32 1.1 tsubai #include "bpfilter.h"
33 1.1 tsubai
34 1.1 tsubai #include <sys/param.h>
35 1.1 tsubai #include <sys/device.h>
36 1.1 tsubai #include <sys/ioctl.h>
37 1.1 tsubai #include <sys/kernel.h>
38 1.1 tsubai #include <sys/mbuf.h>
39 1.1 tsubai #include <sys/socket.h>
40 1.1 tsubai #include <sys/systm.h>
41 1.3 thorpej #include <sys/callout.h>
42 1.1 tsubai
43 1.15 mjl #if NRND > 0
44 1.15 mjl #include <sys/rnd.h>
45 1.15 mjl #endif
46 1.15 mjl
47 1.8 mrg #include <uvm/uvm_extern.h>
48 1.1 tsubai
49 1.1 tsubai #include <net/if.h>
50 1.1 tsubai #include <net/if_ether.h>
51 1.1 tsubai #include <net/if_media.h>
52 1.1 tsubai
53 1.1 tsubai #if NBPFILTER > 0
54 1.1 tsubai #include <net/bpf.h>
55 1.1 tsubai #endif
56 1.1 tsubai
57 1.1 tsubai #ifdef INET
58 1.1 tsubai #include <netinet/in.h>
59 1.1 tsubai #include <netinet/if_inarp.h>
60 1.1 tsubai #endif
61 1.1 tsubai
62 1.1 tsubai #include <dev/mii/mii.h>
63 1.1 tsubai #include <dev/mii/miivar.h>
64 1.1 tsubai
65 1.1 tsubai #include <dev/pci/pcivar.h>
66 1.1 tsubai #include <dev/pci/pcireg.h>
67 1.1 tsubai #include <dev/pci/pcidevs.h>
68 1.1 tsubai
69 1.1 tsubai #include <dev/ofw/openfirm.h>
70 1.1 tsubai #include <macppc/dev/if_gmreg.h>
71 1.1 tsubai #include <machine/pio.h>
72 1.1 tsubai
73 1.1 tsubai #define NTXBUF 4
74 1.1 tsubai #define NRXBUF 32
75 1.1 tsubai
76 1.1 tsubai struct gmac_softc {
77 1.1 tsubai struct device sc_dev;
78 1.1 tsubai struct ethercom sc_ethercom;
79 1.1 tsubai vaddr_t sc_reg;
80 1.1 tsubai struct gmac_dma *sc_txlist;
81 1.1 tsubai struct gmac_dma *sc_rxlist;
82 1.1 tsubai int sc_txnext;
83 1.1 tsubai int sc_rxlast;
84 1.1 tsubai caddr_t sc_txbuf[NTXBUF];
85 1.1 tsubai caddr_t sc_rxbuf[NRXBUF];
86 1.1 tsubai struct mii_data sc_mii;
87 1.3 thorpej struct callout sc_tick_ch;
88 1.1 tsubai char sc_laddr[6];
89 1.15 mjl
90 1.15 mjl #if NRND > 0
91 1.15 mjl rndsource_element_t sc_rnd_source; /* random source */
92 1.15 mjl #endif
93 1.1 tsubai };
94 1.1 tsubai
95 1.1 tsubai #define sc_if sc_ethercom.ec_if
96 1.1 tsubai
97 1.1 tsubai int gmac_match __P((struct device *, struct cfdata *, void *));
98 1.1 tsubai void gmac_attach __P((struct device *, struct device *, void *));
99 1.1 tsubai
100 1.1 tsubai static __inline u_int gmac_read_reg __P((struct gmac_softc *, int));
101 1.1 tsubai static __inline void gmac_write_reg __P((struct gmac_softc *, int, u_int));
102 1.1 tsubai
103 1.1 tsubai static __inline void gmac_start_txdma __P((struct gmac_softc *));
104 1.1 tsubai static __inline void gmac_start_rxdma __P((struct gmac_softc *));
105 1.1 tsubai static __inline void gmac_stop_txdma __P((struct gmac_softc *));
106 1.1 tsubai static __inline void gmac_stop_rxdma __P((struct gmac_softc *));
107 1.1 tsubai
108 1.1 tsubai int gmac_intr __P((void *));
109 1.1 tsubai void gmac_tint __P((struct gmac_softc *));
110 1.1 tsubai void gmac_rint __P((struct gmac_softc *));
111 1.1 tsubai struct mbuf * gmac_get __P((struct gmac_softc *, caddr_t, int));
112 1.1 tsubai void gmac_start __P((struct ifnet *));
113 1.1 tsubai int gmac_put __P((struct gmac_softc *, caddr_t, struct mbuf *));
114 1.1 tsubai
115 1.1 tsubai void gmac_stop __P((struct gmac_softc *));
116 1.1 tsubai void gmac_reset __P((struct gmac_softc *));
117 1.1 tsubai void gmac_init __P((struct gmac_softc *));
118 1.1 tsubai void gmac_init_mac __P((struct gmac_softc *));
119 1.6 tsubai void gmac_setladrf __P((struct gmac_softc *));
120 1.1 tsubai
121 1.1 tsubai int gmac_ioctl __P((struct ifnet *, u_long, caddr_t));
122 1.1 tsubai void gmac_watchdog __P((struct ifnet *));
123 1.1 tsubai
124 1.1 tsubai int gmac_mediachange __P((struct ifnet *));
125 1.1 tsubai void gmac_mediastatus __P((struct ifnet *, struct ifmediareq *));
126 1.1 tsubai int gmac_mii_readreg __P((struct device *, int, int));
127 1.1 tsubai void gmac_mii_writereg __P((struct device *, int, int, int));
128 1.1 tsubai void gmac_mii_statchg __P((struct device *));
129 1.1 tsubai void gmac_mii_tick __P((void *));
130 1.1 tsubai
131 1.1 tsubai struct cfattach gm_ca = {
132 1.1 tsubai sizeof(struct gmac_softc), gmac_match, gmac_attach
133 1.1 tsubai };
134 1.1 tsubai
135 1.1 tsubai int
136 1.1 tsubai gmac_match(parent, match, aux)
137 1.1 tsubai struct device *parent;
138 1.1 tsubai struct cfdata *match;
139 1.1 tsubai void *aux;
140 1.1 tsubai {
141 1.1 tsubai struct pci_attach_args *pa = aux;
142 1.1 tsubai
143 1.1 tsubai if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE &&
144 1.13 tsubai (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC ||
145 1.13 tsubai PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC2))
146 1.1 tsubai return 1;
147 1.1 tsubai
148 1.1 tsubai return 0;
149 1.1 tsubai }
150 1.1 tsubai
151 1.1 tsubai void
152 1.1 tsubai gmac_attach(parent, self, aux)
153 1.1 tsubai struct device *parent, *self;
154 1.1 tsubai void *aux;
155 1.1 tsubai {
156 1.1 tsubai struct gmac_softc *sc = (void *)self;
157 1.1 tsubai struct pci_attach_args *pa = aux;
158 1.1 tsubai struct ifnet *ifp = &sc->sc_if;
159 1.1 tsubai struct mii_data *mii = &sc->sc_mii;
160 1.1 tsubai pci_intr_handle_t ih;
161 1.1 tsubai const char *intrstr = NULL;
162 1.1 tsubai int node, i;
163 1.1 tsubai char *p;
164 1.1 tsubai struct gmac_dma *dp;
165 1.1 tsubai u_int32_t reg[10];
166 1.1 tsubai u_char laddr[6];
167 1.1 tsubai
168 1.1 tsubai node = pcidev_to_ofdev(pa->pa_pc, pa->pa_tag);
169 1.1 tsubai if (node == 0) {
170 1.1 tsubai printf(": cannot find gmac node\n");
171 1.1 tsubai return;
172 1.1 tsubai }
173 1.1 tsubai
174 1.1 tsubai OF_getprop(node, "local-mac-address", laddr, sizeof laddr);
175 1.1 tsubai OF_getprop(node, "assigned-addresses", reg, sizeof reg);
176 1.1 tsubai
177 1.14 wiz memcpy(sc->sc_laddr, laddr, sizeof laddr);
178 1.1 tsubai sc->sc_reg = reg[2];
179 1.1 tsubai
180 1.10 sommerfe if (pci_intr_map(pa, &ih)) {
181 1.1 tsubai printf(": unable to map interrupt\n");
182 1.1 tsubai return;
183 1.1 tsubai }
184 1.1 tsubai intrstr = pci_intr_string(pa->pa_pc, ih);
185 1.1 tsubai
186 1.1 tsubai if (pci_intr_establish(pa->pa_pc, ih, IPL_NET, gmac_intr, sc) == NULL) {
187 1.1 tsubai printf(": unable to establish interrupt");
188 1.1 tsubai if (intrstr)
189 1.1 tsubai printf(" at %s", intrstr);
190 1.1 tsubai printf("\n");
191 1.1 tsubai return;
192 1.1 tsubai }
193 1.1 tsubai
194 1.1 tsubai /* Setup packet buffers and dma descriptors. */
195 1.1 tsubai p = malloc((NRXBUF + NTXBUF) * 2048 + 3 * 0x800, M_DEVBUF, M_NOWAIT);
196 1.1 tsubai if (p == NULL) {
197 1.1 tsubai printf(": cannot malloc buffers\n");
198 1.1 tsubai return;
199 1.1 tsubai }
200 1.1 tsubai p = (void *)roundup((vaddr_t)p, 0x800);
201 1.14 wiz memset(p, 0, 2048 * (NRXBUF + NTXBUF) + 2 * 0x800);
202 1.2 tsubai
203 1.2 tsubai sc->sc_rxlist = (void *)p;
204 1.2 tsubai p += 0x800;
205 1.2 tsubai sc->sc_txlist = (void *)p;
206 1.2 tsubai p += 0x800;
207 1.1 tsubai
208 1.1 tsubai dp = sc->sc_rxlist;
209 1.1 tsubai for (i = 0; i < NRXBUF; i++) {
210 1.1 tsubai sc->sc_rxbuf[i] = p;
211 1.5 tsubai dp->address = htole32(vtophys((vaddr_t)p));
212 1.1 tsubai dp->cmd = htole32(GMAC_OWN);
213 1.1 tsubai dp++;
214 1.1 tsubai p += 2048;
215 1.1 tsubai }
216 1.1 tsubai
217 1.1 tsubai dp = sc->sc_txlist;
218 1.1 tsubai for (i = 0; i < NTXBUF; i++) {
219 1.1 tsubai sc->sc_txbuf[i] = p;
220 1.5 tsubai dp->address = htole32(vtophys((vaddr_t)p));
221 1.1 tsubai dp++;
222 1.1 tsubai p += 2048;
223 1.1 tsubai }
224 1.1 tsubai
225 1.1 tsubai printf(": Ethernet address %s\n", ether_sprintf(laddr));
226 1.1 tsubai printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
227 1.1 tsubai
228 1.3 thorpej callout_init(&sc->sc_tick_ch);
229 1.3 thorpej
230 1.2 tsubai gmac_reset(sc);
231 1.2 tsubai gmac_init_mac(sc);
232 1.2 tsubai
233 1.14 wiz memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
234 1.1 tsubai ifp->if_softc = sc;
235 1.1 tsubai ifp->if_ioctl = gmac_ioctl;
236 1.1 tsubai ifp->if_start = gmac_start;
237 1.1 tsubai ifp->if_watchdog = gmac_watchdog;
238 1.1 tsubai ifp->if_flags =
239 1.1 tsubai IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
240 1.1 tsubai
241 1.1 tsubai mii->mii_ifp = ifp;
242 1.1 tsubai mii->mii_readreg = gmac_mii_readreg;
243 1.1 tsubai mii->mii_writereg = gmac_mii_writereg;
244 1.1 tsubai mii->mii_statchg = gmac_mii_statchg;
245 1.1 tsubai
246 1.1 tsubai ifmedia_init(&mii->mii_media, 0, gmac_mediachange, gmac_mediastatus);
247 1.1 tsubai mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0);
248 1.1 tsubai
249 1.1 tsubai /* Choose a default media. */
250 1.1 tsubai if (LIST_FIRST(&mii->mii_phys) == NULL) {
251 1.1 tsubai ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
252 1.1 tsubai ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_NONE);
253 1.1 tsubai } else
254 1.1 tsubai ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO);
255 1.1 tsubai
256 1.1 tsubai if_attach(ifp);
257 1.1 tsubai ether_ifattach(ifp, laddr);
258 1.15 mjl #if NRND > 0
259 1.15 mjl rnd_attach_source(&sc->sc_rnd_source, sc->sc_dev.dv_xname,
260 1.15 mjl RND_TYPE_NET, 0);
261 1.15 mjl #endif
262 1.1 tsubai }
263 1.1 tsubai
264 1.1 tsubai u_int
265 1.1 tsubai gmac_read_reg(sc, reg)
266 1.1 tsubai struct gmac_softc *sc;
267 1.1 tsubai int reg;
268 1.1 tsubai {
269 1.1 tsubai return in32rb(sc->sc_reg + reg);
270 1.1 tsubai }
271 1.1 tsubai
272 1.1 tsubai void
273 1.1 tsubai gmac_write_reg(sc, reg, val)
274 1.1 tsubai struct gmac_softc *sc;
275 1.1 tsubai int reg;
276 1.1 tsubai u_int val;
277 1.1 tsubai {
278 1.1 tsubai out32rb(sc->sc_reg + reg, val);
279 1.1 tsubai }
280 1.1 tsubai
281 1.1 tsubai void
282 1.1 tsubai gmac_start_txdma(sc)
283 1.1 tsubai struct gmac_softc *sc;
284 1.1 tsubai {
285 1.1 tsubai u_int x;
286 1.1 tsubai
287 1.1 tsubai x = gmac_read_reg(sc, GMAC_TXDMACONFIG);
288 1.1 tsubai x |= 1;
289 1.1 tsubai gmac_write_reg(sc, GMAC_TXDMACONFIG, x);
290 1.1 tsubai x = gmac_read_reg(sc, GMAC_TXMACCONFIG);
291 1.1 tsubai x |= 1;
292 1.1 tsubai gmac_write_reg(sc, GMAC_TXMACCONFIG, x);
293 1.1 tsubai }
294 1.1 tsubai
295 1.1 tsubai void
296 1.1 tsubai gmac_start_rxdma(sc)
297 1.1 tsubai struct gmac_softc *sc;
298 1.1 tsubai {
299 1.1 tsubai u_int x;
300 1.1 tsubai
301 1.1 tsubai x = gmac_read_reg(sc, GMAC_RXDMACONFIG);
302 1.1 tsubai x |= 1;
303 1.1 tsubai gmac_write_reg(sc, GMAC_RXDMACONFIG, x);
304 1.1 tsubai x = gmac_read_reg(sc, GMAC_RXMACCONFIG);
305 1.1 tsubai x |= 1;
306 1.1 tsubai gmac_write_reg(sc, GMAC_RXMACCONFIG, x);
307 1.1 tsubai }
308 1.1 tsubai
309 1.1 tsubai void
310 1.1 tsubai gmac_stop_txdma(sc)
311 1.1 tsubai struct gmac_softc *sc;
312 1.1 tsubai {
313 1.1 tsubai u_int x;
314 1.1 tsubai
315 1.1 tsubai x = gmac_read_reg(sc, GMAC_TXDMACONFIG);
316 1.1 tsubai x &= ~1;
317 1.1 tsubai gmac_write_reg(sc, GMAC_TXDMACONFIG, x);
318 1.1 tsubai x = gmac_read_reg(sc, GMAC_TXMACCONFIG);
319 1.1 tsubai x &= ~1;
320 1.1 tsubai gmac_write_reg(sc, GMAC_TXMACCONFIG, x);
321 1.1 tsubai }
322 1.1 tsubai
323 1.1 tsubai void
324 1.1 tsubai gmac_stop_rxdma(sc)
325 1.1 tsubai struct gmac_softc *sc;
326 1.1 tsubai {
327 1.1 tsubai u_int x;
328 1.1 tsubai
329 1.1 tsubai x = gmac_read_reg(sc, GMAC_RXDMACONFIG);
330 1.1 tsubai x &= ~1;
331 1.1 tsubai gmac_write_reg(sc, GMAC_RXDMACONFIG, x);
332 1.1 tsubai x = gmac_read_reg(sc, GMAC_RXMACCONFIG);
333 1.1 tsubai x &= ~1;
334 1.1 tsubai gmac_write_reg(sc, GMAC_RXMACCONFIG, x);
335 1.1 tsubai }
336 1.1 tsubai
337 1.1 tsubai int
338 1.1 tsubai gmac_intr(v)
339 1.1 tsubai void *v;
340 1.1 tsubai {
341 1.1 tsubai struct gmac_softc *sc = v;
342 1.1 tsubai u_int status;
343 1.1 tsubai
344 1.1 tsubai status = gmac_read_reg(sc, GMAC_STATUS) & 0xff;
345 1.1 tsubai if (status == 0)
346 1.1 tsubai return 0;
347 1.1 tsubai
348 1.1 tsubai if (status & GMAC_INT_RXDONE)
349 1.1 tsubai gmac_rint(sc);
350 1.1 tsubai
351 1.4 tsubai if (status & GMAC_INT_TXEMPTY)
352 1.1 tsubai gmac_tint(sc);
353 1.1 tsubai
354 1.15 mjl #if NRND > 0
355 1.15 mjl rnd_add_uint32(&sc->sc_rnd_source, status);
356 1.15 mjl #endif
357 1.1 tsubai return 1;
358 1.1 tsubai }
359 1.1 tsubai
360 1.1 tsubai void
361 1.1 tsubai gmac_tint(sc)
362 1.1 tsubai struct gmac_softc *sc;
363 1.1 tsubai {
364 1.1 tsubai struct ifnet *ifp = &sc->sc_if;
365 1.1 tsubai
366 1.1 tsubai ifp->if_flags &= ~IFF_OACTIVE;
367 1.1 tsubai ifp->if_timer = 0;
368 1.1 tsubai gmac_start(ifp);
369 1.1 tsubai }
370 1.1 tsubai
371 1.1 tsubai void
372 1.1 tsubai gmac_rint(sc)
373 1.1 tsubai struct gmac_softc *sc;
374 1.1 tsubai {
375 1.1 tsubai struct ifnet *ifp = &sc->sc_if;
376 1.1 tsubai volatile struct gmac_dma *dp;
377 1.1 tsubai struct mbuf *m;
378 1.12 tsubai int i, j, len;
379 1.1 tsubai u_int cmd;
380 1.1 tsubai
381 1.1 tsubai for (i = sc->sc_rxlast;; i++) {
382 1.1 tsubai if (i == NRXBUF)
383 1.1 tsubai i = 0;
384 1.1 tsubai
385 1.1 tsubai dp = &sc->sc_rxlist[i];
386 1.1 tsubai cmd = le32toh(dp->cmd);
387 1.1 tsubai if (cmd & GMAC_OWN)
388 1.1 tsubai break;
389 1.1 tsubai len = (cmd >> 16) & GMAC_LEN_MASK;
390 1.1 tsubai len -= 4; /* CRC */
391 1.1 tsubai
392 1.1 tsubai if (le32toh(dp->cmd_hi) & 0x40000000) {
393 1.1 tsubai ifp->if_ierrors++;
394 1.1 tsubai goto next;
395 1.1 tsubai }
396 1.1 tsubai
397 1.1 tsubai m = gmac_get(sc, sc->sc_rxbuf[i], len);
398 1.1 tsubai if (m == NULL) {
399 1.1 tsubai ifp->if_ierrors++;
400 1.1 tsubai goto next;
401 1.1 tsubai }
402 1.1 tsubai
403 1.1 tsubai #if NBPFILTER > 0
404 1.1 tsubai /*
405 1.1 tsubai * Check if there's a BPF listener on this interface.
406 1.1 tsubai * If so, hand off the raw packet to BPF.
407 1.1 tsubai */
408 1.1 tsubai if (ifp->if_bpf)
409 1.16 thorpej bpf_mtap(ifp->if_bpf, m);
410 1.1 tsubai #endif
411 1.1 tsubai (*ifp->if_input)(ifp, m);
412 1.1 tsubai ifp->if_ipackets++;
413 1.1 tsubai
414 1.1 tsubai next:
415 1.1 tsubai dp->cmd_hi = 0;
416 1.1 tsubai __asm __volatile ("sync");
417 1.1 tsubai dp->cmd = htole32(GMAC_OWN);
418 1.1 tsubai }
419 1.1 tsubai sc->sc_rxlast = i;
420 1.12 tsubai
421 1.12 tsubai /* XXX Make sure free buffers have GMAC_OWN. */
422 1.12 tsubai i++;
423 1.12 tsubai for (j = 1; j < NRXBUF; j++) {
424 1.12 tsubai if (i == NRXBUF)
425 1.12 tsubai i = 0;
426 1.12 tsubai dp = &sc->sc_rxlist[i++];
427 1.12 tsubai dp->cmd = htole32(GMAC_OWN);
428 1.12 tsubai }
429 1.1 tsubai }
430 1.1 tsubai
431 1.1 tsubai struct mbuf *
432 1.1 tsubai gmac_get(sc, pkt, totlen)
433 1.1 tsubai struct gmac_softc *sc;
434 1.1 tsubai caddr_t pkt;
435 1.1 tsubai int totlen;
436 1.1 tsubai {
437 1.1 tsubai struct mbuf *m;
438 1.1 tsubai struct mbuf *top, **mp;
439 1.1 tsubai int len;
440 1.1 tsubai
441 1.1 tsubai MGETHDR(m, M_DONTWAIT, MT_DATA);
442 1.1 tsubai if (m == 0)
443 1.1 tsubai return 0;
444 1.1 tsubai m->m_pkthdr.rcvif = &sc->sc_if;
445 1.1 tsubai m->m_pkthdr.len = totlen;
446 1.1 tsubai len = MHLEN;
447 1.1 tsubai top = 0;
448 1.1 tsubai mp = ⊤
449 1.1 tsubai
450 1.1 tsubai while (totlen > 0) {
451 1.1 tsubai if (top) {
452 1.1 tsubai MGET(m, M_DONTWAIT, MT_DATA);
453 1.1 tsubai if (m == 0) {
454 1.1 tsubai m_freem(top);
455 1.1 tsubai return 0;
456 1.1 tsubai }
457 1.1 tsubai len = MLEN;
458 1.1 tsubai }
459 1.1 tsubai if (totlen >= MINCLSIZE) {
460 1.1 tsubai MCLGET(m, M_DONTWAIT);
461 1.1 tsubai if ((m->m_flags & M_EXT) == 0) {
462 1.1 tsubai m_free(m);
463 1.1 tsubai m_freem(top);
464 1.1 tsubai return 0;
465 1.1 tsubai }
466 1.1 tsubai len = MCLBYTES;
467 1.1 tsubai }
468 1.1 tsubai m->m_len = len = min(totlen, len);
469 1.14 wiz memcpy(mtod(m, caddr_t), pkt, len);
470 1.1 tsubai pkt += len;
471 1.1 tsubai totlen -= len;
472 1.1 tsubai *mp = m;
473 1.1 tsubai mp = &m->m_next;
474 1.1 tsubai }
475 1.1 tsubai
476 1.1 tsubai return top;
477 1.1 tsubai }
478 1.1 tsubai
479 1.1 tsubai void
480 1.1 tsubai gmac_start(ifp)
481 1.1 tsubai struct ifnet *ifp;
482 1.1 tsubai {
483 1.1 tsubai struct gmac_softc *sc = ifp->if_softc;
484 1.1 tsubai struct mbuf *m;
485 1.1 tsubai caddr_t buff;
486 1.1 tsubai int i, tlen;
487 1.1 tsubai volatile struct gmac_dma *dp;
488 1.1 tsubai
489 1.1 tsubai if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
490 1.1 tsubai return;
491 1.1 tsubai
492 1.1 tsubai for (;;) {
493 1.1 tsubai if (ifp->if_flags & IFF_OACTIVE)
494 1.1 tsubai break;
495 1.1 tsubai
496 1.1 tsubai IF_DEQUEUE(&ifp->if_snd, m);
497 1.1 tsubai if (m == 0)
498 1.1 tsubai break;
499 1.1 tsubai
500 1.1 tsubai /* 5 seconds to watch for failing to transmit */
501 1.1 tsubai ifp->if_timer = 5;
502 1.1 tsubai ifp->if_opackets++; /* # of pkts */
503 1.1 tsubai
504 1.1 tsubai i = sc->sc_txnext;
505 1.1 tsubai buff = sc->sc_txbuf[i];
506 1.1 tsubai tlen = gmac_put(sc, buff, m);
507 1.1 tsubai
508 1.1 tsubai dp = &sc->sc_txlist[i];
509 1.1 tsubai dp->cmd_hi = 0;
510 1.1 tsubai dp->address_hi = 0;
511 1.1 tsubai dp->cmd = htole32(tlen | GMAC_OWN | GMAC_SOP);
512 1.1 tsubai
513 1.1 tsubai i++;
514 1.1 tsubai if (i == NTXBUF)
515 1.1 tsubai i = 0;
516 1.1 tsubai __asm __volatile ("sync");
517 1.1 tsubai
518 1.1 tsubai gmac_write_reg(sc, GMAC_TXDMAKICK, i);
519 1.1 tsubai sc->sc_txnext = i;
520 1.1 tsubai
521 1.1 tsubai #if NBPFILTER > 0
522 1.1 tsubai /*
523 1.1 tsubai * If BPF is listening on this interface, let it see the
524 1.1 tsubai * packet before we commit it to the wire.
525 1.1 tsubai */
526 1.1 tsubai if (ifp->if_bpf)
527 1.16 thorpej bpf_mtap(ifp->if_bpf, m);
528 1.1 tsubai #endif
529 1.16 thorpej m_freem(m);
530 1.4 tsubai
531 1.4 tsubai i++;
532 1.4 tsubai if (i == NTXBUF)
533 1.4 tsubai i = 0;
534 1.4 tsubai if (i == gmac_read_reg(sc, GMAC_TXDMACOMPLETE)) {
535 1.4 tsubai ifp->if_flags |= IFF_OACTIVE;
536 1.4 tsubai break;
537 1.4 tsubai }
538 1.1 tsubai }
539 1.1 tsubai }
540 1.1 tsubai
541 1.1 tsubai int
542 1.1 tsubai gmac_put(sc, buff, m)
543 1.1 tsubai struct gmac_softc *sc;
544 1.1 tsubai caddr_t buff;
545 1.1 tsubai struct mbuf *m;
546 1.1 tsubai {
547 1.1 tsubai int len, tlen = 0;
548 1.1 tsubai
549 1.16 thorpej for (; m; m = m->m_next) {
550 1.1 tsubai len = m->m_len;
551 1.16 thorpej if (len == 0)
552 1.1 tsubai continue;
553 1.14 wiz memcpy(buff, mtod(m, caddr_t), len);
554 1.1 tsubai buff += len;
555 1.1 tsubai tlen += len;
556 1.1 tsubai }
557 1.1 tsubai if (tlen > 2048)
558 1.1 tsubai panic("%s: gmac_put packet overflow", sc->sc_dev.dv_xname);
559 1.1 tsubai
560 1.1 tsubai return tlen;
561 1.1 tsubai }
562 1.1 tsubai
563 1.1 tsubai void
564 1.1 tsubai gmac_reset(sc)
565 1.1 tsubai struct gmac_softc *sc;
566 1.1 tsubai {
567 1.1 tsubai int i, s;
568 1.1 tsubai
569 1.1 tsubai s = splnet();
570 1.1 tsubai
571 1.1 tsubai gmac_stop_txdma(sc);
572 1.1 tsubai gmac_stop_rxdma(sc);
573 1.1 tsubai
574 1.1 tsubai gmac_write_reg(sc, GMAC_SOFTWARERESET, 3);
575 1.1 tsubai for (i = 10; i > 0; i--) {
576 1.1 tsubai delay(300000); /* XXX long delay */
577 1.2 tsubai if ((gmac_read_reg(sc, GMAC_SOFTWARERESET) & 3) == 0)
578 1.1 tsubai break;
579 1.1 tsubai }
580 1.1 tsubai if (i == 0)
581 1.1 tsubai printf("%s: reset timeout\n", sc->sc_dev.dv_xname);
582 1.2 tsubai
583 1.2 tsubai sc->sc_txnext = 0;
584 1.2 tsubai sc->sc_rxlast = 0;
585 1.2 tsubai for (i = 0; i < NRXBUF; i++)
586 1.2 tsubai sc->sc_rxlist[i].cmd = htole32(GMAC_OWN);
587 1.2 tsubai __asm __volatile ("sync");
588 1.2 tsubai
589 1.2 tsubai gmac_write_reg(sc, GMAC_TXDMADESCBASEHI, 0);
590 1.5 tsubai gmac_write_reg(sc, GMAC_TXDMADESCBASELO,
591 1.5 tsubai vtophys((vaddr_t)sc->sc_txlist));
592 1.2 tsubai gmac_write_reg(sc, GMAC_RXDMADESCBASEHI, 0);
593 1.5 tsubai gmac_write_reg(sc, GMAC_RXDMADESCBASELO,
594 1.5 tsubai vtophys((vaddr_t)sc->sc_rxlist));
595 1.2 tsubai gmac_write_reg(sc, GMAC_RXDMAKICK, NRXBUF);
596 1.2 tsubai
597 1.2 tsubai splx(s);
598 1.1 tsubai }
599 1.1 tsubai
600 1.1 tsubai void
601 1.1 tsubai gmac_stop(sc)
602 1.1 tsubai struct gmac_softc *sc;
603 1.1 tsubai {
604 1.1 tsubai struct ifnet *ifp = &sc->sc_if;
605 1.1 tsubai int s;
606 1.1 tsubai
607 1.1 tsubai s = splnet();
608 1.1 tsubai
609 1.3 thorpej callout_stop(&sc->sc_tick_ch);
610 1.1 tsubai mii_down(&sc->sc_mii);
611 1.1 tsubai
612 1.1 tsubai gmac_stop_txdma(sc);
613 1.1 tsubai gmac_stop_rxdma(sc);
614 1.1 tsubai
615 1.1 tsubai gmac_write_reg(sc, GMAC_INTMASK, 0xffffffff);
616 1.1 tsubai
617 1.1 tsubai ifp->if_flags &= ~(IFF_UP | IFF_RUNNING);
618 1.1 tsubai ifp->if_timer = 0;
619 1.1 tsubai
620 1.1 tsubai splx(s);
621 1.1 tsubai }
622 1.1 tsubai
623 1.1 tsubai void
624 1.1 tsubai gmac_init_mac(sc)
625 1.1 tsubai struct gmac_softc *sc;
626 1.1 tsubai {
627 1.1 tsubai int i, tb;
628 1.1 tsubai char *laddr = sc->sc_laddr;
629 1.1 tsubai
630 1.1 tsubai __asm ("mftb %0" : "=r"(tb));
631 1.1 tsubai gmac_write_reg(sc, GMAC_RANDOMSEED, tb);
632 1.1 tsubai
633 1.1 tsubai /* init-mii */
634 1.1 tsubai gmac_write_reg(sc, GMAC_DATAPATHMODE, 4);
635 1.1 tsubai gmac_mii_writereg(&sc->sc_dev, 0, 0, 0x1000);
636 1.1 tsubai
637 1.1 tsubai gmac_write_reg(sc, GMAC_TXDMACONFIG, 0xffc00);
638 1.1 tsubai gmac_write_reg(sc, GMAC_RXDMACONFIG, 0);
639 1.1 tsubai gmac_write_reg(sc, GMAC_MACPAUSE, 0x1bf0);
640 1.1 tsubai gmac_write_reg(sc, GMAC_INTERPACKETGAP0, 0);
641 1.1 tsubai gmac_write_reg(sc, GMAC_INTERPACKETGAP1, 8);
642 1.1 tsubai gmac_write_reg(sc, GMAC_INTERPACKETGAP2, 4);
643 1.1 tsubai gmac_write_reg(sc, GMAC_MINFRAMESIZE, ETHER_MIN_LEN);
644 1.1 tsubai gmac_write_reg(sc, GMAC_MAXFRAMESIZE, ETHER_MAX_LEN);
645 1.1 tsubai gmac_write_reg(sc, GMAC_PASIZE, 7);
646 1.1 tsubai gmac_write_reg(sc, GMAC_JAMSIZE, 4);
647 1.1 tsubai gmac_write_reg(sc, GMAC_ATTEMPTLIMIT,0x10);
648 1.1 tsubai gmac_write_reg(sc, GMAC_MACCNTLTYPE, 0x8808);
649 1.1 tsubai
650 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS0, (laddr[4] << 8) | laddr[5]);
651 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS1, (laddr[2] << 8) | laddr[3]);
652 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS2, (laddr[0] << 8) | laddr[1]);
653 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS3, 0);
654 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS4, 0);
655 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS5, 0);
656 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS6, 1);
657 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS7, 0xc200);
658 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS8, 0x0180);
659 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRFILT0, 0);
660 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRFILT1, 0);
661 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRFILT2, 0);
662 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRFILT2_1MASK, 0);
663 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRFILT0MASK, 0);
664 1.1 tsubai
665 1.6 tsubai for (i = 0; i < 0x6c; i += 4)
666 1.1 tsubai gmac_write_reg(sc, GMAC_HASHTABLE0 + i, 0);
667 1.1 tsubai
668 1.1 tsubai gmac_write_reg(sc, GMAC_SLOTTIME, 0x40);
669 1.1 tsubai
670 1.4 tsubai if (IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) {
671 1.4 tsubai gmac_write_reg(sc, GMAC_TXMACCONFIG, 6);
672 1.4 tsubai gmac_write_reg(sc, GMAC_XIFCONFIG, 1);
673 1.4 tsubai } else {
674 1.4 tsubai gmac_write_reg(sc, GMAC_TXMACCONFIG, 0);
675 1.4 tsubai gmac_write_reg(sc, GMAC_XIFCONFIG, 5);
676 1.4 tsubai }
677 1.4 tsubai
678 1.4 tsubai if (0) /* g-bit? */
679 1.4 tsubai gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 3);
680 1.4 tsubai else
681 1.4 tsubai gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 0);
682 1.1 tsubai }
683 1.1 tsubai
684 1.1 tsubai void
685 1.6 tsubai gmac_setladrf(sc)
686 1.6 tsubai struct gmac_softc *sc;
687 1.6 tsubai {
688 1.6 tsubai struct ifnet *ifp = &sc->sc_if;
689 1.6 tsubai struct ether_multi *enm;
690 1.6 tsubai struct ether_multistep step;
691 1.6 tsubai struct ethercom *ec = &sc->sc_ethercom;
692 1.6 tsubai u_int32_t crc;
693 1.6 tsubai u_int32_t hash[16];
694 1.6 tsubai u_int v;
695 1.7 tsubai int i;
696 1.6 tsubai
697 1.6 tsubai /* Clear hash table */
698 1.6 tsubai for (i = 0; i < 16; i++)
699 1.6 tsubai hash[i] = 0;
700 1.6 tsubai
701 1.6 tsubai /* Get current RX configuration */
702 1.6 tsubai v = gmac_read_reg(sc, GMAC_RXMACCONFIG);
703 1.6 tsubai
704 1.6 tsubai if ((ifp->if_flags & IFF_PROMISC) != 0) {
705 1.6 tsubai /* Turn on promiscuous mode; turn off the hash filter */
706 1.6 tsubai v |= GMAC_RXMAC_PR;
707 1.6 tsubai v &= ~GMAC_RXMAC_HEN;
708 1.6 tsubai ifp->if_flags |= IFF_ALLMULTI;
709 1.6 tsubai goto chipit;
710 1.6 tsubai }
711 1.6 tsubai
712 1.6 tsubai /* Turn off promiscuous mode; turn on the hash filter */
713 1.6 tsubai v &= ~GMAC_RXMAC_PR;
714 1.6 tsubai v |= GMAC_RXMAC_HEN;
715 1.6 tsubai
716 1.6 tsubai /*
717 1.6 tsubai * Set up multicast address filter by passing all multicast addresses
718 1.6 tsubai * through a crc generator, and then using the high order 8 bits as an
719 1.6 tsubai * index into the 256 bit logical address filter. The high order bit
720 1.6 tsubai * selects the word, while the rest of the bits select the bit within
721 1.6 tsubai * the word.
722 1.6 tsubai */
723 1.6 tsubai
724 1.6 tsubai ETHER_FIRST_MULTI(step, ec, enm);
725 1.6 tsubai while (enm != NULL) {
726 1.14 wiz if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6)) {
727 1.6 tsubai /*
728 1.6 tsubai * We must listen to a range of multicast addresses.
729 1.6 tsubai * For now, just accept all multicasts, rather than
730 1.6 tsubai * trying to set only those filter bits needed to match
731 1.6 tsubai * the range. (At this time, the only use of address
732 1.6 tsubai * ranges is for IP multicast routing, for which the
733 1.6 tsubai * range is big enough to require all bits set.)
734 1.6 tsubai */
735 1.6 tsubai for (i = 0; i < 16; i++)
736 1.6 tsubai hash[i] = 0xffff;
737 1.6 tsubai ifp->if_flags |= IFF_ALLMULTI;
738 1.6 tsubai goto chipit;
739 1.6 tsubai }
740 1.6 tsubai
741 1.7 tsubai crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN);
742 1.7 tsubai
743 1.6 tsubai /* Just want the 8 most significant bits. */
744 1.6 tsubai crc >>= 24;
745 1.6 tsubai
746 1.6 tsubai /* Set the corresponding bit in the filter. */
747 1.6 tsubai hash[crc >> 4] |= 1 << (crc & 0xf);
748 1.6 tsubai
749 1.6 tsubai ETHER_NEXT_MULTI(step, enm);
750 1.6 tsubai }
751 1.6 tsubai
752 1.6 tsubai ifp->if_flags &= ~IFF_ALLMULTI;
753 1.6 tsubai
754 1.6 tsubai chipit:
755 1.6 tsubai /* Now load the hash table into the chip */
756 1.6 tsubai for (i = 0; i < 16; i++)
757 1.6 tsubai gmac_write_reg(sc, GMAC_HASHTABLE0 + i * 4, hash[i]);
758 1.6 tsubai
759 1.6 tsubai gmac_write_reg(sc, GMAC_RXMACCONFIG, v);
760 1.6 tsubai }
761 1.6 tsubai
762 1.6 tsubai void
763 1.1 tsubai gmac_init(sc)
764 1.1 tsubai struct gmac_softc *sc;
765 1.1 tsubai {
766 1.1 tsubai struct ifnet *ifp = &sc->sc_if;
767 1.1 tsubai
768 1.1 tsubai gmac_stop_txdma(sc);
769 1.1 tsubai gmac_stop_rxdma(sc);
770 1.1 tsubai
771 1.1 tsubai gmac_init_mac(sc);
772 1.6 tsubai gmac_setladrf(sc);
773 1.1 tsubai
774 1.1 tsubai gmac_start_txdma(sc);
775 1.1 tsubai gmac_start_rxdma(sc);
776 1.1 tsubai
777 1.4 tsubai gmac_write_reg(sc, GMAC_INTMASK, ~(GMAC_INT_TXEMPTY | GMAC_INT_RXDONE));
778 1.1 tsubai
779 1.1 tsubai ifp->if_flags |= IFF_RUNNING;
780 1.1 tsubai ifp->if_flags &= ~IFF_OACTIVE;
781 1.1 tsubai ifp->if_timer = 0;
782 1.1 tsubai
783 1.3 thorpej callout_reset(&sc->sc_tick_ch, 1, gmac_mii_tick, sc);
784 1.1 tsubai
785 1.1 tsubai gmac_start(ifp);
786 1.1 tsubai }
787 1.1 tsubai
788 1.1 tsubai int
789 1.1 tsubai gmac_ioctl(ifp, cmd, data)
790 1.1 tsubai struct ifnet *ifp;
791 1.1 tsubai u_long cmd;
792 1.1 tsubai caddr_t data;
793 1.1 tsubai {
794 1.1 tsubai struct gmac_softc *sc = ifp->if_softc;
795 1.1 tsubai struct ifaddr *ifa = (struct ifaddr *)data;
796 1.1 tsubai struct ifreq *ifr = (struct ifreq *)data;
797 1.1 tsubai int s, error = 0;
798 1.1 tsubai
799 1.1 tsubai s = splnet();
800 1.1 tsubai
801 1.1 tsubai switch (cmd) {
802 1.1 tsubai
803 1.1 tsubai case SIOCSIFADDR:
804 1.1 tsubai ifp->if_flags |= IFF_UP;
805 1.1 tsubai
806 1.1 tsubai switch (ifa->ifa_addr->sa_family) {
807 1.1 tsubai #ifdef INET
808 1.1 tsubai case AF_INET:
809 1.1 tsubai gmac_init(sc);
810 1.1 tsubai arp_ifinit(ifp, ifa);
811 1.1 tsubai break;
812 1.1 tsubai #endif
813 1.1 tsubai #ifdef NS
814 1.1 tsubai case AF_NS:
815 1.1 tsubai {
816 1.1 tsubai struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
817 1.1 tsubai
818 1.1 tsubai if (ns_nullhost(*ina))
819 1.1 tsubai ina->x_host =
820 1.1 tsubai *(union ns_host *)LLADDR(ifp->if_sadl);
821 1.1 tsubai else {
822 1.14 wiz memcpy(LLADDR(ifp->if_sadl),
823 1.14 wiz ina->x_host.c_host,
824 1.1 tsubai sizeof(sc->sc_enaddr));
825 1.1 tsubai }
826 1.1 tsubai /* Set new address. */
827 1.1 tsubai gmac_init(sc);
828 1.1 tsubai break;
829 1.1 tsubai }
830 1.1 tsubai #endif
831 1.1 tsubai default:
832 1.1 tsubai gmac_init(sc);
833 1.1 tsubai break;
834 1.1 tsubai }
835 1.1 tsubai break;
836 1.1 tsubai
837 1.1 tsubai case SIOCSIFFLAGS:
838 1.1 tsubai if ((ifp->if_flags & IFF_UP) == 0 &&
839 1.1 tsubai (ifp->if_flags & IFF_RUNNING) != 0) {
840 1.1 tsubai /*
841 1.1 tsubai * If interface is marked down and it is running, then
842 1.1 tsubai * stop it.
843 1.1 tsubai */
844 1.1 tsubai gmac_stop(sc);
845 1.1 tsubai ifp->if_flags &= ~IFF_RUNNING;
846 1.1 tsubai } else if ((ifp->if_flags & IFF_UP) != 0 &&
847 1.1 tsubai (ifp->if_flags & IFF_RUNNING) == 0) {
848 1.1 tsubai /*
849 1.1 tsubai * If interface is marked up and it is stopped, then
850 1.1 tsubai * start it.
851 1.1 tsubai */
852 1.1 tsubai gmac_init(sc);
853 1.1 tsubai } else {
854 1.1 tsubai /*
855 1.1 tsubai * Reset the interface to pick up changes in any other
856 1.1 tsubai * flags that affect hardware registers.
857 1.1 tsubai */
858 1.2 tsubai gmac_reset(sc);
859 1.1 tsubai gmac_init(sc);
860 1.1 tsubai }
861 1.1 tsubai #ifdef GMAC_DEBUG
862 1.1 tsubai if (ifp->if_flags & IFF_DEBUG)
863 1.1 tsubai sc->sc_flags |= GMAC_DEBUGFLAG;
864 1.1 tsubai #endif
865 1.1 tsubai break;
866 1.1 tsubai
867 1.1 tsubai case SIOCADDMULTI:
868 1.1 tsubai case SIOCDELMULTI:
869 1.1 tsubai error = (cmd == SIOCADDMULTI) ?
870 1.1 tsubai ether_addmulti(ifr, &sc->sc_ethercom) :
871 1.1 tsubai ether_delmulti(ifr, &sc->sc_ethercom);
872 1.1 tsubai
873 1.1 tsubai if (error == ENETRESET) {
874 1.1 tsubai /*
875 1.1 tsubai * Multicast list has changed; set the hardware filter
876 1.1 tsubai * accordingly.
877 1.1 tsubai */
878 1.1 tsubai gmac_init(sc);
879 1.1 tsubai /* gmac_setladrf(sc); */
880 1.1 tsubai error = 0;
881 1.1 tsubai }
882 1.1 tsubai break;
883 1.1 tsubai
884 1.1 tsubai case SIOCGIFMEDIA:
885 1.1 tsubai case SIOCSIFMEDIA:
886 1.1 tsubai error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
887 1.1 tsubai break;
888 1.1 tsubai
889 1.1 tsubai default:
890 1.1 tsubai error = EINVAL;
891 1.1 tsubai }
892 1.1 tsubai
893 1.1 tsubai splx(s);
894 1.1 tsubai return error;
895 1.1 tsubai }
896 1.1 tsubai
897 1.1 tsubai void
898 1.1 tsubai gmac_watchdog(ifp)
899 1.1 tsubai struct ifnet *ifp;
900 1.1 tsubai {
901 1.1 tsubai struct gmac_softc *sc = ifp->if_softc;
902 1.1 tsubai
903 1.1 tsubai printf("%s: device timeout\n", ifp->if_xname);
904 1.1 tsubai ifp->if_oerrors++;
905 1.1 tsubai
906 1.1 tsubai gmac_reset(sc);
907 1.1 tsubai gmac_init(sc);
908 1.1 tsubai }
909 1.1 tsubai
910 1.1 tsubai int
911 1.1 tsubai gmac_mediachange(ifp)
912 1.1 tsubai struct ifnet *ifp;
913 1.1 tsubai {
914 1.1 tsubai struct gmac_softc *sc = ifp->if_softc;
915 1.1 tsubai
916 1.1 tsubai return mii_mediachg(&sc->sc_mii);
917 1.1 tsubai }
918 1.1 tsubai
919 1.1 tsubai void
920 1.1 tsubai gmac_mediastatus(ifp, ifmr)
921 1.1 tsubai struct ifnet *ifp;
922 1.1 tsubai struct ifmediareq *ifmr;
923 1.1 tsubai {
924 1.1 tsubai struct gmac_softc *sc = ifp->if_softc;
925 1.1 tsubai
926 1.1 tsubai mii_pollstat(&sc->sc_mii);
927 1.1 tsubai
928 1.1 tsubai ifmr->ifm_status = sc->sc_mii.mii_media_status;
929 1.1 tsubai ifmr->ifm_active = sc->sc_mii.mii_media_active;
930 1.1 tsubai }
931 1.1 tsubai
932 1.1 tsubai int
933 1.1 tsubai gmac_mii_readreg(dev, phy, reg)
934 1.1 tsubai struct device *dev;
935 1.1 tsubai int phy, reg;
936 1.1 tsubai {
937 1.1 tsubai struct gmac_softc *sc = (void *)dev;
938 1.1 tsubai int i;
939 1.1 tsubai
940 1.1 tsubai gmac_write_reg(sc, GMAC_MIFFRAMEOUTPUT,
941 1.1 tsubai 0x60020000 | (phy << 23) | (reg << 18));
942 1.1 tsubai
943 1.1 tsubai for (i = 1000; i >= 0; i -= 10) {
944 1.1 tsubai if (gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0x10000)
945 1.1 tsubai break;
946 1.1 tsubai delay(10);
947 1.1 tsubai }
948 1.1 tsubai if (i < 0) {
949 1.1 tsubai printf("%s: gmac_mii_readreg: timeout\n", sc->sc_dev.dv_xname);
950 1.1 tsubai return 0;
951 1.1 tsubai }
952 1.1 tsubai
953 1.1 tsubai return gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0xffff;
954 1.1 tsubai }
955 1.1 tsubai
956 1.1 tsubai void
957 1.1 tsubai gmac_mii_writereg(dev, phy, reg, val)
958 1.1 tsubai struct device *dev;
959 1.1 tsubai int phy, reg, val;
960 1.1 tsubai {
961 1.1 tsubai struct gmac_softc *sc = (void *)dev;
962 1.1 tsubai int i;
963 1.1 tsubai
964 1.1 tsubai gmac_write_reg(sc, GMAC_MIFFRAMEOUTPUT,
965 1.1 tsubai 0x50020000 | (phy << 23) | (reg << 18) | (val & 0xffff));
966 1.1 tsubai
967 1.1 tsubai for (i = 1000; i >= 0; i -= 10) {
968 1.1 tsubai if (gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0x10000)
969 1.1 tsubai break;
970 1.1 tsubai delay(10);
971 1.1 tsubai }
972 1.1 tsubai if (i < 0)
973 1.1 tsubai printf("%s: gmac_mii_writereg: timeout\n", sc->sc_dev.dv_xname);
974 1.1 tsubai }
975 1.1 tsubai
976 1.1 tsubai void
977 1.1 tsubai gmac_mii_statchg(dev)
978 1.1 tsubai struct device *dev;
979 1.1 tsubai {
980 1.1 tsubai struct gmac_softc *sc = (void *)dev;
981 1.1 tsubai
982 1.1 tsubai gmac_stop_txdma(sc);
983 1.1 tsubai gmac_stop_rxdma(sc);
984 1.1 tsubai
985 1.1 tsubai if (IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) {
986 1.1 tsubai gmac_write_reg(sc, GMAC_TXMACCONFIG, 6);
987 1.1 tsubai gmac_write_reg(sc, GMAC_XIFCONFIG, 1);
988 1.1 tsubai } else {
989 1.1 tsubai gmac_write_reg(sc, GMAC_TXMACCONFIG, 0);
990 1.1 tsubai gmac_write_reg(sc, GMAC_XIFCONFIG, 5);
991 1.1 tsubai }
992 1.1 tsubai
993 1.1 tsubai if (0) /* g-bit? */
994 1.1 tsubai gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 3);
995 1.1 tsubai else
996 1.1 tsubai gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 0);
997 1.1 tsubai
998 1.1 tsubai gmac_start_txdma(sc);
999 1.1 tsubai gmac_start_rxdma(sc);
1000 1.1 tsubai }
1001 1.1 tsubai
1002 1.1 tsubai void
1003 1.1 tsubai gmac_mii_tick(v)
1004 1.1 tsubai void *v;
1005 1.1 tsubai {
1006 1.1 tsubai struct gmac_softc *sc = v;
1007 1.1 tsubai int s;
1008 1.1 tsubai
1009 1.1 tsubai s = splnet();
1010 1.1 tsubai mii_tick(&sc->sc_mii);
1011 1.1 tsubai splx(s);
1012 1.1 tsubai
1013 1.3 thorpej callout_reset(&sc->sc_tick_ch, hz, gmac_mii_tick, sc);
1014 1.1 tsubai }
1015