if_gm.c revision 1.17 1 1.17 itojun /* $NetBSD: if_gm.c,v 1.17 2002/03/05 04:12:57 itojun Exp $ */
2 1.1 tsubai
3 1.1 tsubai /*-
4 1.1 tsubai * Copyright (c) 2000 Tsubai Masanari. All rights reserved.
5 1.1 tsubai *
6 1.1 tsubai * Redistribution and use in source and binary forms, with or without
7 1.1 tsubai * modification, are permitted provided that the following conditions
8 1.1 tsubai * are met:
9 1.1 tsubai * 1. Redistributions of source code must retain the above copyright
10 1.1 tsubai * notice, this list of conditions and the following disclaimer.
11 1.1 tsubai * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 tsubai * notice, this list of conditions and the following disclaimer in the
13 1.1 tsubai * documentation and/or other materials provided with the distribution.
14 1.1 tsubai * 3. The name of the author may not be used to endorse or promote products
15 1.1 tsubai * derived from this software without specific prior written permission.
16 1.1 tsubai *
17 1.1 tsubai * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.1 tsubai * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.1 tsubai * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.1 tsubai * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.1 tsubai * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.1 tsubai * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.1 tsubai * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.1 tsubai * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.1 tsubai * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 1.1 tsubai * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 tsubai */
28 1.1 tsubai
29 1.1 tsubai #include "opt_inet.h"
30 1.1 tsubai #include "opt_ns.h"
31 1.15 mjl #include "rnd.h"
32 1.1 tsubai #include "bpfilter.h"
33 1.1 tsubai
34 1.1 tsubai #include <sys/param.h>
35 1.1 tsubai #include <sys/device.h>
36 1.1 tsubai #include <sys/ioctl.h>
37 1.1 tsubai #include <sys/kernel.h>
38 1.1 tsubai #include <sys/mbuf.h>
39 1.1 tsubai #include <sys/socket.h>
40 1.1 tsubai #include <sys/systm.h>
41 1.3 thorpej #include <sys/callout.h>
42 1.1 tsubai
43 1.15 mjl #if NRND > 0
44 1.15 mjl #include <sys/rnd.h>
45 1.15 mjl #endif
46 1.15 mjl
47 1.8 mrg #include <uvm/uvm_extern.h>
48 1.1 tsubai
49 1.1 tsubai #include <net/if.h>
50 1.1 tsubai #include <net/if_ether.h>
51 1.1 tsubai #include <net/if_media.h>
52 1.1 tsubai
53 1.1 tsubai #if NBPFILTER > 0
54 1.1 tsubai #include <net/bpf.h>
55 1.1 tsubai #endif
56 1.1 tsubai
57 1.1 tsubai #ifdef INET
58 1.1 tsubai #include <netinet/in.h>
59 1.1 tsubai #include <netinet/if_inarp.h>
60 1.1 tsubai #endif
61 1.1 tsubai
62 1.1 tsubai #include <dev/mii/mii.h>
63 1.1 tsubai #include <dev/mii/miivar.h>
64 1.1 tsubai
65 1.1 tsubai #include <dev/pci/pcivar.h>
66 1.1 tsubai #include <dev/pci/pcireg.h>
67 1.1 tsubai #include <dev/pci/pcidevs.h>
68 1.1 tsubai
69 1.1 tsubai #include <dev/ofw/openfirm.h>
70 1.1 tsubai #include <macppc/dev/if_gmreg.h>
71 1.1 tsubai #include <machine/pio.h>
72 1.1 tsubai
73 1.1 tsubai #define NTXBUF 4
74 1.1 tsubai #define NRXBUF 32
75 1.1 tsubai
76 1.1 tsubai struct gmac_softc {
77 1.1 tsubai struct device sc_dev;
78 1.1 tsubai struct ethercom sc_ethercom;
79 1.1 tsubai vaddr_t sc_reg;
80 1.1 tsubai struct gmac_dma *sc_txlist;
81 1.1 tsubai struct gmac_dma *sc_rxlist;
82 1.1 tsubai int sc_txnext;
83 1.1 tsubai int sc_rxlast;
84 1.1 tsubai caddr_t sc_txbuf[NTXBUF];
85 1.1 tsubai caddr_t sc_rxbuf[NRXBUF];
86 1.1 tsubai struct mii_data sc_mii;
87 1.3 thorpej struct callout sc_tick_ch;
88 1.1 tsubai char sc_laddr[6];
89 1.15 mjl
90 1.15 mjl #if NRND > 0
91 1.15 mjl rndsource_element_t sc_rnd_source; /* random source */
92 1.15 mjl #endif
93 1.1 tsubai };
94 1.1 tsubai
95 1.1 tsubai #define sc_if sc_ethercom.ec_if
96 1.1 tsubai
97 1.1 tsubai int gmac_match __P((struct device *, struct cfdata *, void *));
98 1.1 tsubai void gmac_attach __P((struct device *, struct device *, void *));
99 1.1 tsubai
100 1.1 tsubai static __inline u_int gmac_read_reg __P((struct gmac_softc *, int));
101 1.1 tsubai static __inline void gmac_write_reg __P((struct gmac_softc *, int, u_int));
102 1.1 tsubai
103 1.1 tsubai static __inline void gmac_start_txdma __P((struct gmac_softc *));
104 1.1 tsubai static __inline void gmac_start_rxdma __P((struct gmac_softc *));
105 1.1 tsubai static __inline void gmac_stop_txdma __P((struct gmac_softc *));
106 1.1 tsubai static __inline void gmac_stop_rxdma __P((struct gmac_softc *));
107 1.1 tsubai
108 1.1 tsubai int gmac_intr __P((void *));
109 1.1 tsubai void gmac_tint __P((struct gmac_softc *));
110 1.1 tsubai void gmac_rint __P((struct gmac_softc *));
111 1.1 tsubai struct mbuf * gmac_get __P((struct gmac_softc *, caddr_t, int));
112 1.1 tsubai void gmac_start __P((struct ifnet *));
113 1.1 tsubai int gmac_put __P((struct gmac_softc *, caddr_t, struct mbuf *));
114 1.1 tsubai
115 1.1 tsubai void gmac_stop __P((struct gmac_softc *));
116 1.1 tsubai void gmac_reset __P((struct gmac_softc *));
117 1.1 tsubai void gmac_init __P((struct gmac_softc *));
118 1.1 tsubai void gmac_init_mac __P((struct gmac_softc *));
119 1.6 tsubai void gmac_setladrf __P((struct gmac_softc *));
120 1.1 tsubai
121 1.1 tsubai int gmac_ioctl __P((struct ifnet *, u_long, caddr_t));
122 1.1 tsubai void gmac_watchdog __P((struct ifnet *));
123 1.1 tsubai
124 1.1 tsubai int gmac_mediachange __P((struct ifnet *));
125 1.1 tsubai void gmac_mediastatus __P((struct ifnet *, struct ifmediareq *));
126 1.1 tsubai int gmac_mii_readreg __P((struct device *, int, int));
127 1.1 tsubai void gmac_mii_writereg __P((struct device *, int, int, int));
128 1.1 tsubai void gmac_mii_statchg __P((struct device *));
129 1.1 tsubai void gmac_mii_tick __P((void *));
130 1.1 tsubai
131 1.1 tsubai struct cfattach gm_ca = {
132 1.1 tsubai sizeof(struct gmac_softc), gmac_match, gmac_attach
133 1.1 tsubai };
134 1.1 tsubai
135 1.1 tsubai int
136 1.1 tsubai gmac_match(parent, match, aux)
137 1.1 tsubai struct device *parent;
138 1.1 tsubai struct cfdata *match;
139 1.1 tsubai void *aux;
140 1.1 tsubai {
141 1.1 tsubai struct pci_attach_args *pa = aux;
142 1.1 tsubai
143 1.1 tsubai if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE &&
144 1.13 tsubai (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC ||
145 1.13 tsubai PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC2))
146 1.1 tsubai return 1;
147 1.1 tsubai
148 1.1 tsubai return 0;
149 1.1 tsubai }
150 1.1 tsubai
151 1.1 tsubai void
152 1.1 tsubai gmac_attach(parent, self, aux)
153 1.1 tsubai struct device *parent, *self;
154 1.1 tsubai void *aux;
155 1.1 tsubai {
156 1.1 tsubai struct gmac_softc *sc = (void *)self;
157 1.1 tsubai struct pci_attach_args *pa = aux;
158 1.1 tsubai struct ifnet *ifp = &sc->sc_if;
159 1.1 tsubai struct mii_data *mii = &sc->sc_mii;
160 1.1 tsubai pci_intr_handle_t ih;
161 1.1 tsubai const char *intrstr = NULL;
162 1.1 tsubai int node, i;
163 1.1 tsubai char *p;
164 1.1 tsubai struct gmac_dma *dp;
165 1.1 tsubai u_int32_t reg[10];
166 1.1 tsubai u_char laddr[6];
167 1.1 tsubai
168 1.1 tsubai node = pcidev_to_ofdev(pa->pa_pc, pa->pa_tag);
169 1.1 tsubai if (node == 0) {
170 1.1 tsubai printf(": cannot find gmac node\n");
171 1.1 tsubai return;
172 1.1 tsubai }
173 1.1 tsubai
174 1.1 tsubai OF_getprop(node, "local-mac-address", laddr, sizeof laddr);
175 1.1 tsubai OF_getprop(node, "assigned-addresses", reg, sizeof reg);
176 1.1 tsubai
177 1.14 wiz memcpy(sc->sc_laddr, laddr, sizeof laddr);
178 1.1 tsubai sc->sc_reg = reg[2];
179 1.1 tsubai
180 1.10 sommerfe if (pci_intr_map(pa, &ih)) {
181 1.1 tsubai printf(": unable to map interrupt\n");
182 1.1 tsubai return;
183 1.1 tsubai }
184 1.1 tsubai intrstr = pci_intr_string(pa->pa_pc, ih);
185 1.1 tsubai
186 1.1 tsubai if (pci_intr_establish(pa->pa_pc, ih, IPL_NET, gmac_intr, sc) == NULL) {
187 1.1 tsubai printf(": unable to establish interrupt");
188 1.1 tsubai if (intrstr)
189 1.1 tsubai printf(" at %s", intrstr);
190 1.1 tsubai printf("\n");
191 1.1 tsubai return;
192 1.1 tsubai }
193 1.1 tsubai
194 1.1 tsubai /* Setup packet buffers and dma descriptors. */
195 1.1 tsubai p = malloc((NRXBUF + NTXBUF) * 2048 + 3 * 0x800, M_DEVBUF, M_NOWAIT);
196 1.1 tsubai if (p == NULL) {
197 1.1 tsubai printf(": cannot malloc buffers\n");
198 1.1 tsubai return;
199 1.1 tsubai }
200 1.1 tsubai p = (void *)roundup((vaddr_t)p, 0x800);
201 1.14 wiz memset(p, 0, 2048 * (NRXBUF + NTXBUF) + 2 * 0x800);
202 1.2 tsubai
203 1.2 tsubai sc->sc_rxlist = (void *)p;
204 1.2 tsubai p += 0x800;
205 1.2 tsubai sc->sc_txlist = (void *)p;
206 1.2 tsubai p += 0x800;
207 1.1 tsubai
208 1.1 tsubai dp = sc->sc_rxlist;
209 1.1 tsubai for (i = 0; i < NRXBUF; i++) {
210 1.1 tsubai sc->sc_rxbuf[i] = p;
211 1.5 tsubai dp->address = htole32(vtophys((vaddr_t)p));
212 1.1 tsubai dp->cmd = htole32(GMAC_OWN);
213 1.1 tsubai dp++;
214 1.1 tsubai p += 2048;
215 1.1 tsubai }
216 1.1 tsubai
217 1.1 tsubai dp = sc->sc_txlist;
218 1.1 tsubai for (i = 0; i < NTXBUF; i++) {
219 1.1 tsubai sc->sc_txbuf[i] = p;
220 1.5 tsubai dp->address = htole32(vtophys((vaddr_t)p));
221 1.1 tsubai dp++;
222 1.1 tsubai p += 2048;
223 1.1 tsubai }
224 1.1 tsubai
225 1.1 tsubai printf(": Ethernet address %s\n", ether_sprintf(laddr));
226 1.1 tsubai printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
227 1.1 tsubai
228 1.3 thorpej callout_init(&sc->sc_tick_ch);
229 1.3 thorpej
230 1.2 tsubai gmac_reset(sc);
231 1.2 tsubai gmac_init_mac(sc);
232 1.2 tsubai
233 1.14 wiz memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
234 1.1 tsubai ifp->if_softc = sc;
235 1.1 tsubai ifp->if_ioctl = gmac_ioctl;
236 1.1 tsubai ifp->if_start = gmac_start;
237 1.1 tsubai ifp->if_watchdog = gmac_watchdog;
238 1.1 tsubai ifp->if_flags =
239 1.1 tsubai IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
240 1.17 itojun IFQ_SET_READY(&ifp->if_snd);
241 1.1 tsubai
242 1.1 tsubai mii->mii_ifp = ifp;
243 1.1 tsubai mii->mii_readreg = gmac_mii_readreg;
244 1.1 tsubai mii->mii_writereg = gmac_mii_writereg;
245 1.1 tsubai mii->mii_statchg = gmac_mii_statchg;
246 1.1 tsubai
247 1.1 tsubai ifmedia_init(&mii->mii_media, 0, gmac_mediachange, gmac_mediastatus);
248 1.1 tsubai mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0);
249 1.1 tsubai
250 1.1 tsubai /* Choose a default media. */
251 1.1 tsubai if (LIST_FIRST(&mii->mii_phys) == NULL) {
252 1.1 tsubai ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
253 1.1 tsubai ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_NONE);
254 1.1 tsubai } else
255 1.1 tsubai ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO);
256 1.1 tsubai
257 1.1 tsubai if_attach(ifp);
258 1.1 tsubai ether_ifattach(ifp, laddr);
259 1.15 mjl #if NRND > 0
260 1.15 mjl rnd_attach_source(&sc->sc_rnd_source, sc->sc_dev.dv_xname,
261 1.15 mjl RND_TYPE_NET, 0);
262 1.15 mjl #endif
263 1.1 tsubai }
264 1.1 tsubai
265 1.1 tsubai u_int
266 1.1 tsubai gmac_read_reg(sc, reg)
267 1.1 tsubai struct gmac_softc *sc;
268 1.1 tsubai int reg;
269 1.1 tsubai {
270 1.1 tsubai return in32rb(sc->sc_reg + reg);
271 1.1 tsubai }
272 1.1 tsubai
273 1.1 tsubai void
274 1.1 tsubai gmac_write_reg(sc, reg, val)
275 1.1 tsubai struct gmac_softc *sc;
276 1.1 tsubai int reg;
277 1.1 tsubai u_int val;
278 1.1 tsubai {
279 1.1 tsubai out32rb(sc->sc_reg + reg, val);
280 1.1 tsubai }
281 1.1 tsubai
282 1.1 tsubai void
283 1.1 tsubai gmac_start_txdma(sc)
284 1.1 tsubai struct gmac_softc *sc;
285 1.1 tsubai {
286 1.1 tsubai u_int x;
287 1.1 tsubai
288 1.1 tsubai x = gmac_read_reg(sc, GMAC_TXDMACONFIG);
289 1.1 tsubai x |= 1;
290 1.1 tsubai gmac_write_reg(sc, GMAC_TXDMACONFIG, x);
291 1.1 tsubai x = gmac_read_reg(sc, GMAC_TXMACCONFIG);
292 1.1 tsubai x |= 1;
293 1.1 tsubai gmac_write_reg(sc, GMAC_TXMACCONFIG, x);
294 1.1 tsubai }
295 1.1 tsubai
296 1.1 tsubai void
297 1.1 tsubai gmac_start_rxdma(sc)
298 1.1 tsubai struct gmac_softc *sc;
299 1.1 tsubai {
300 1.1 tsubai u_int x;
301 1.1 tsubai
302 1.1 tsubai x = gmac_read_reg(sc, GMAC_RXDMACONFIG);
303 1.1 tsubai x |= 1;
304 1.1 tsubai gmac_write_reg(sc, GMAC_RXDMACONFIG, x);
305 1.1 tsubai x = gmac_read_reg(sc, GMAC_RXMACCONFIG);
306 1.1 tsubai x |= 1;
307 1.1 tsubai gmac_write_reg(sc, GMAC_RXMACCONFIG, x);
308 1.1 tsubai }
309 1.1 tsubai
310 1.1 tsubai void
311 1.1 tsubai gmac_stop_txdma(sc)
312 1.1 tsubai struct gmac_softc *sc;
313 1.1 tsubai {
314 1.1 tsubai u_int x;
315 1.1 tsubai
316 1.1 tsubai x = gmac_read_reg(sc, GMAC_TXDMACONFIG);
317 1.1 tsubai x &= ~1;
318 1.1 tsubai gmac_write_reg(sc, GMAC_TXDMACONFIG, x);
319 1.1 tsubai x = gmac_read_reg(sc, GMAC_TXMACCONFIG);
320 1.1 tsubai x &= ~1;
321 1.1 tsubai gmac_write_reg(sc, GMAC_TXMACCONFIG, x);
322 1.1 tsubai }
323 1.1 tsubai
324 1.1 tsubai void
325 1.1 tsubai gmac_stop_rxdma(sc)
326 1.1 tsubai struct gmac_softc *sc;
327 1.1 tsubai {
328 1.1 tsubai u_int x;
329 1.1 tsubai
330 1.1 tsubai x = gmac_read_reg(sc, GMAC_RXDMACONFIG);
331 1.1 tsubai x &= ~1;
332 1.1 tsubai gmac_write_reg(sc, GMAC_RXDMACONFIG, x);
333 1.1 tsubai x = gmac_read_reg(sc, GMAC_RXMACCONFIG);
334 1.1 tsubai x &= ~1;
335 1.1 tsubai gmac_write_reg(sc, GMAC_RXMACCONFIG, x);
336 1.1 tsubai }
337 1.1 tsubai
338 1.1 tsubai int
339 1.1 tsubai gmac_intr(v)
340 1.1 tsubai void *v;
341 1.1 tsubai {
342 1.1 tsubai struct gmac_softc *sc = v;
343 1.1 tsubai u_int status;
344 1.1 tsubai
345 1.1 tsubai status = gmac_read_reg(sc, GMAC_STATUS) & 0xff;
346 1.1 tsubai if (status == 0)
347 1.1 tsubai return 0;
348 1.1 tsubai
349 1.1 tsubai if (status & GMAC_INT_RXDONE)
350 1.1 tsubai gmac_rint(sc);
351 1.1 tsubai
352 1.4 tsubai if (status & GMAC_INT_TXEMPTY)
353 1.1 tsubai gmac_tint(sc);
354 1.1 tsubai
355 1.15 mjl #if NRND > 0
356 1.15 mjl rnd_add_uint32(&sc->sc_rnd_source, status);
357 1.15 mjl #endif
358 1.1 tsubai return 1;
359 1.1 tsubai }
360 1.1 tsubai
361 1.1 tsubai void
362 1.1 tsubai gmac_tint(sc)
363 1.1 tsubai struct gmac_softc *sc;
364 1.1 tsubai {
365 1.1 tsubai struct ifnet *ifp = &sc->sc_if;
366 1.1 tsubai
367 1.1 tsubai ifp->if_flags &= ~IFF_OACTIVE;
368 1.1 tsubai ifp->if_timer = 0;
369 1.1 tsubai gmac_start(ifp);
370 1.1 tsubai }
371 1.1 tsubai
372 1.1 tsubai void
373 1.1 tsubai gmac_rint(sc)
374 1.1 tsubai struct gmac_softc *sc;
375 1.1 tsubai {
376 1.1 tsubai struct ifnet *ifp = &sc->sc_if;
377 1.1 tsubai volatile struct gmac_dma *dp;
378 1.1 tsubai struct mbuf *m;
379 1.12 tsubai int i, j, len;
380 1.1 tsubai u_int cmd;
381 1.1 tsubai
382 1.1 tsubai for (i = sc->sc_rxlast;; i++) {
383 1.1 tsubai if (i == NRXBUF)
384 1.1 tsubai i = 0;
385 1.1 tsubai
386 1.1 tsubai dp = &sc->sc_rxlist[i];
387 1.1 tsubai cmd = le32toh(dp->cmd);
388 1.1 tsubai if (cmd & GMAC_OWN)
389 1.1 tsubai break;
390 1.1 tsubai len = (cmd >> 16) & GMAC_LEN_MASK;
391 1.1 tsubai len -= 4; /* CRC */
392 1.1 tsubai
393 1.1 tsubai if (le32toh(dp->cmd_hi) & 0x40000000) {
394 1.1 tsubai ifp->if_ierrors++;
395 1.1 tsubai goto next;
396 1.1 tsubai }
397 1.1 tsubai
398 1.1 tsubai m = gmac_get(sc, sc->sc_rxbuf[i], len);
399 1.1 tsubai if (m == NULL) {
400 1.1 tsubai ifp->if_ierrors++;
401 1.1 tsubai goto next;
402 1.1 tsubai }
403 1.1 tsubai
404 1.1 tsubai #if NBPFILTER > 0
405 1.1 tsubai /*
406 1.1 tsubai * Check if there's a BPF listener on this interface.
407 1.1 tsubai * If so, hand off the raw packet to BPF.
408 1.1 tsubai */
409 1.1 tsubai if (ifp->if_bpf)
410 1.16 thorpej bpf_mtap(ifp->if_bpf, m);
411 1.1 tsubai #endif
412 1.1 tsubai (*ifp->if_input)(ifp, m);
413 1.1 tsubai ifp->if_ipackets++;
414 1.1 tsubai
415 1.1 tsubai next:
416 1.1 tsubai dp->cmd_hi = 0;
417 1.1 tsubai __asm __volatile ("sync");
418 1.1 tsubai dp->cmd = htole32(GMAC_OWN);
419 1.1 tsubai }
420 1.1 tsubai sc->sc_rxlast = i;
421 1.12 tsubai
422 1.12 tsubai /* XXX Make sure free buffers have GMAC_OWN. */
423 1.12 tsubai i++;
424 1.12 tsubai for (j = 1; j < NRXBUF; j++) {
425 1.12 tsubai if (i == NRXBUF)
426 1.12 tsubai i = 0;
427 1.12 tsubai dp = &sc->sc_rxlist[i++];
428 1.12 tsubai dp->cmd = htole32(GMAC_OWN);
429 1.12 tsubai }
430 1.1 tsubai }
431 1.1 tsubai
432 1.1 tsubai struct mbuf *
433 1.1 tsubai gmac_get(sc, pkt, totlen)
434 1.1 tsubai struct gmac_softc *sc;
435 1.1 tsubai caddr_t pkt;
436 1.1 tsubai int totlen;
437 1.1 tsubai {
438 1.1 tsubai struct mbuf *m;
439 1.1 tsubai struct mbuf *top, **mp;
440 1.1 tsubai int len;
441 1.1 tsubai
442 1.1 tsubai MGETHDR(m, M_DONTWAIT, MT_DATA);
443 1.1 tsubai if (m == 0)
444 1.1 tsubai return 0;
445 1.1 tsubai m->m_pkthdr.rcvif = &sc->sc_if;
446 1.1 tsubai m->m_pkthdr.len = totlen;
447 1.1 tsubai len = MHLEN;
448 1.1 tsubai top = 0;
449 1.1 tsubai mp = ⊤
450 1.1 tsubai
451 1.1 tsubai while (totlen > 0) {
452 1.1 tsubai if (top) {
453 1.1 tsubai MGET(m, M_DONTWAIT, MT_DATA);
454 1.1 tsubai if (m == 0) {
455 1.1 tsubai m_freem(top);
456 1.1 tsubai return 0;
457 1.1 tsubai }
458 1.1 tsubai len = MLEN;
459 1.1 tsubai }
460 1.1 tsubai if (totlen >= MINCLSIZE) {
461 1.1 tsubai MCLGET(m, M_DONTWAIT);
462 1.1 tsubai if ((m->m_flags & M_EXT) == 0) {
463 1.1 tsubai m_free(m);
464 1.1 tsubai m_freem(top);
465 1.1 tsubai return 0;
466 1.1 tsubai }
467 1.1 tsubai len = MCLBYTES;
468 1.1 tsubai }
469 1.1 tsubai m->m_len = len = min(totlen, len);
470 1.14 wiz memcpy(mtod(m, caddr_t), pkt, len);
471 1.1 tsubai pkt += len;
472 1.1 tsubai totlen -= len;
473 1.1 tsubai *mp = m;
474 1.1 tsubai mp = &m->m_next;
475 1.1 tsubai }
476 1.1 tsubai
477 1.1 tsubai return top;
478 1.1 tsubai }
479 1.1 tsubai
480 1.1 tsubai void
481 1.1 tsubai gmac_start(ifp)
482 1.1 tsubai struct ifnet *ifp;
483 1.1 tsubai {
484 1.1 tsubai struct gmac_softc *sc = ifp->if_softc;
485 1.1 tsubai struct mbuf *m;
486 1.1 tsubai caddr_t buff;
487 1.1 tsubai int i, tlen;
488 1.1 tsubai volatile struct gmac_dma *dp;
489 1.1 tsubai
490 1.1 tsubai if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
491 1.1 tsubai return;
492 1.1 tsubai
493 1.1 tsubai for (;;) {
494 1.1 tsubai if (ifp->if_flags & IFF_OACTIVE)
495 1.1 tsubai break;
496 1.1 tsubai
497 1.17 itojun IFQ_DEQUEUE(&ifp->if_snd, m);
498 1.1 tsubai if (m == 0)
499 1.1 tsubai break;
500 1.1 tsubai
501 1.1 tsubai /* 5 seconds to watch for failing to transmit */
502 1.1 tsubai ifp->if_timer = 5;
503 1.1 tsubai ifp->if_opackets++; /* # of pkts */
504 1.1 tsubai
505 1.1 tsubai i = sc->sc_txnext;
506 1.1 tsubai buff = sc->sc_txbuf[i];
507 1.1 tsubai tlen = gmac_put(sc, buff, m);
508 1.1 tsubai
509 1.1 tsubai dp = &sc->sc_txlist[i];
510 1.1 tsubai dp->cmd_hi = 0;
511 1.1 tsubai dp->address_hi = 0;
512 1.1 tsubai dp->cmd = htole32(tlen | GMAC_OWN | GMAC_SOP);
513 1.1 tsubai
514 1.1 tsubai i++;
515 1.1 tsubai if (i == NTXBUF)
516 1.1 tsubai i = 0;
517 1.1 tsubai __asm __volatile ("sync");
518 1.1 tsubai
519 1.1 tsubai gmac_write_reg(sc, GMAC_TXDMAKICK, i);
520 1.1 tsubai sc->sc_txnext = i;
521 1.1 tsubai
522 1.1 tsubai #if NBPFILTER > 0
523 1.1 tsubai /*
524 1.1 tsubai * If BPF is listening on this interface, let it see the
525 1.1 tsubai * packet before we commit it to the wire.
526 1.1 tsubai */
527 1.1 tsubai if (ifp->if_bpf)
528 1.16 thorpej bpf_mtap(ifp->if_bpf, m);
529 1.1 tsubai #endif
530 1.16 thorpej m_freem(m);
531 1.4 tsubai
532 1.4 tsubai i++;
533 1.4 tsubai if (i == NTXBUF)
534 1.4 tsubai i = 0;
535 1.4 tsubai if (i == gmac_read_reg(sc, GMAC_TXDMACOMPLETE)) {
536 1.4 tsubai ifp->if_flags |= IFF_OACTIVE;
537 1.4 tsubai break;
538 1.4 tsubai }
539 1.1 tsubai }
540 1.1 tsubai }
541 1.1 tsubai
542 1.1 tsubai int
543 1.1 tsubai gmac_put(sc, buff, m)
544 1.1 tsubai struct gmac_softc *sc;
545 1.1 tsubai caddr_t buff;
546 1.1 tsubai struct mbuf *m;
547 1.1 tsubai {
548 1.1 tsubai int len, tlen = 0;
549 1.1 tsubai
550 1.16 thorpej for (; m; m = m->m_next) {
551 1.1 tsubai len = m->m_len;
552 1.16 thorpej if (len == 0)
553 1.1 tsubai continue;
554 1.14 wiz memcpy(buff, mtod(m, caddr_t), len);
555 1.1 tsubai buff += len;
556 1.1 tsubai tlen += len;
557 1.1 tsubai }
558 1.1 tsubai if (tlen > 2048)
559 1.1 tsubai panic("%s: gmac_put packet overflow", sc->sc_dev.dv_xname);
560 1.1 tsubai
561 1.1 tsubai return tlen;
562 1.1 tsubai }
563 1.1 tsubai
564 1.1 tsubai void
565 1.1 tsubai gmac_reset(sc)
566 1.1 tsubai struct gmac_softc *sc;
567 1.1 tsubai {
568 1.1 tsubai int i, s;
569 1.1 tsubai
570 1.1 tsubai s = splnet();
571 1.1 tsubai
572 1.1 tsubai gmac_stop_txdma(sc);
573 1.1 tsubai gmac_stop_rxdma(sc);
574 1.1 tsubai
575 1.1 tsubai gmac_write_reg(sc, GMAC_SOFTWARERESET, 3);
576 1.1 tsubai for (i = 10; i > 0; i--) {
577 1.1 tsubai delay(300000); /* XXX long delay */
578 1.2 tsubai if ((gmac_read_reg(sc, GMAC_SOFTWARERESET) & 3) == 0)
579 1.1 tsubai break;
580 1.1 tsubai }
581 1.1 tsubai if (i == 0)
582 1.1 tsubai printf("%s: reset timeout\n", sc->sc_dev.dv_xname);
583 1.2 tsubai
584 1.2 tsubai sc->sc_txnext = 0;
585 1.2 tsubai sc->sc_rxlast = 0;
586 1.2 tsubai for (i = 0; i < NRXBUF; i++)
587 1.2 tsubai sc->sc_rxlist[i].cmd = htole32(GMAC_OWN);
588 1.2 tsubai __asm __volatile ("sync");
589 1.2 tsubai
590 1.2 tsubai gmac_write_reg(sc, GMAC_TXDMADESCBASEHI, 0);
591 1.5 tsubai gmac_write_reg(sc, GMAC_TXDMADESCBASELO,
592 1.5 tsubai vtophys((vaddr_t)sc->sc_txlist));
593 1.2 tsubai gmac_write_reg(sc, GMAC_RXDMADESCBASEHI, 0);
594 1.5 tsubai gmac_write_reg(sc, GMAC_RXDMADESCBASELO,
595 1.5 tsubai vtophys((vaddr_t)sc->sc_rxlist));
596 1.2 tsubai gmac_write_reg(sc, GMAC_RXDMAKICK, NRXBUF);
597 1.2 tsubai
598 1.2 tsubai splx(s);
599 1.1 tsubai }
600 1.1 tsubai
601 1.1 tsubai void
602 1.1 tsubai gmac_stop(sc)
603 1.1 tsubai struct gmac_softc *sc;
604 1.1 tsubai {
605 1.1 tsubai struct ifnet *ifp = &sc->sc_if;
606 1.1 tsubai int s;
607 1.1 tsubai
608 1.1 tsubai s = splnet();
609 1.1 tsubai
610 1.3 thorpej callout_stop(&sc->sc_tick_ch);
611 1.1 tsubai mii_down(&sc->sc_mii);
612 1.1 tsubai
613 1.1 tsubai gmac_stop_txdma(sc);
614 1.1 tsubai gmac_stop_rxdma(sc);
615 1.1 tsubai
616 1.1 tsubai gmac_write_reg(sc, GMAC_INTMASK, 0xffffffff);
617 1.1 tsubai
618 1.1 tsubai ifp->if_flags &= ~(IFF_UP | IFF_RUNNING);
619 1.1 tsubai ifp->if_timer = 0;
620 1.1 tsubai
621 1.1 tsubai splx(s);
622 1.1 tsubai }
623 1.1 tsubai
624 1.1 tsubai void
625 1.1 tsubai gmac_init_mac(sc)
626 1.1 tsubai struct gmac_softc *sc;
627 1.1 tsubai {
628 1.1 tsubai int i, tb;
629 1.1 tsubai char *laddr = sc->sc_laddr;
630 1.1 tsubai
631 1.1 tsubai __asm ("mftb %0" : "=r"(tb));
632 1.1 tsubai gmac_write_reg(sc, GMAC_RANDOMSEED, tb);
633 1.1 tsubai
634 1.1 tsubai /* init-mii */
635 1.1 tsubai gmac_write_reg(sc, GMAC_DATAPATHMODE, 4);
636 1.1 tsubai gmac_mii_writereg(&sc->sc_dev, 0, 0, 0x1000);
637 1.1 tsubai
638 1.1 tsubai gmac_write_reg(sc, GMAC_TXDMACONFIG, 0xffc00);
639 1.1 tsubai gmac_write_reg(sc, GMAC_RXDMACONFIG, 0);
640 1.1 tsubai gmac_write_reg(sc, GMAC_MACPAUSE, 0x1bf0);
641 1.1 tsubai gmac_write_reg(sc, GMAC_INTERPACKETGAP0, 0);
642 1.1 tsubai gmac_write_reg(sc, GMAC_INTERPACKETGAP1, 8);
643 1.1 tsubai gmac_write_reg(sc, GMAC_INTERPACKETGAP2, 4);
644 1.1 tsubai gmac_write_reg(sc, GMAC_MINFRAMESIZE, ETHER_MIN_LEN);
645 1.1 tsubai gmac_write_reg(sc, GMAC_MAXFRAMESIZE, ETHER_MAX_LEN);
646 1.1 tsubai gmac_write_reg(sc, GMAC_PASIZE, 7);
647 1.1 tsubai gmac_write_reg(sc, GMAC_JAMSIZE, 4);
648 1.1 tsubai gmac_write_reg(sc, GMAC_ATTEMPTLIMIT,0x10);
649 1.1 tsubai gmac_write_reg(sc, GMAC_MACCNTLTYPE, 0x8808);
650 1.1 tsubai
651 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS0, (laddr[4] << 8) | laddr[5]);
652 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS1, (laddr[2] << 8) | laddr[3]);
653 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS2, (laddr[0] << 8) | laddr[1]);
654 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS3, 0);
655 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS4, 0);
656 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS5, 0);
657 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS6, 1);
658 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS7, 0xc200);
659 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS8, 0x0180);
660 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRFILT0, 0);
661 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRFILT1, 0);
662 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRFILT2, 0);
663 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRFILT2_1MASK, 0);
664 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRFILT0MASK, 0);
665 1.1 tsubai
666 1.6 tsubai for (i = 0; i < 0x6c; i += 4)
667 1.1 tsubai gmac_write_reg(sc, GMAC_HASHTABLE0 + i, 0);
668 1.1 tsubai
669 1.1 tsubai gmac_write_reg(sc, GMAC_SLOTTIME, 0x40);
670 1.1 tsubai
671 1.4 tsubai if (IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) {
672 1.4 tsubai gmac_write_reg(sc, GMAC_TXMACCONFIG, 6);
673 1.4 tsubai gmac_write_reg(sc, GMAC_XIFCONFIG, 1);
674 1.4 tsubai } else {
675 1.4 tsubai gmac_write_reg(sc, GMAC_TXMACCONFIG, 0);
676 1.4 tsubai gmac_write_reg(sc, GMAC_XIFCONFIG, 5);
677 1.4 tsubai }
678 1.4 tsubai
679 1.4 tsubai if (0) /* g-bit? */
680 1.4 tsubai gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 3);
681 1.4 tsubai else
682 1.4 tsubai gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 0);
683 1.1 tsubai }
684 1.1 tsubai
685 1.1 tsubai void
686 1.6 tsubai gmac_setladrf(sc)
687 1.6 tsubai struct gmac_softc *sc;
688 1.6 tsubai {
689 1.6 tsubai struct ifnet *ifp = &sc->sc_if;
690 1.6 tsubai struct ether_multi *enm;
691 1.6 tsubai struct ether_multistep step;
692 1.6 tsubai struct ethercom *ec = &sc->sc_ethercom;
693 1.6 tsubai u_int32_t crc;
694 1.6 tsubai u_int32_t hash[16];
695 1.6 tsubai u_int v;
696 1.7 tsubai int i;
697 1.6 tsubai
698 1.6 tsubai /* Clear hash table */
699 1.6 tsubai for (i = 0; i < 16; i++)
700 1.6 tsubai hash[i] = 0;
701 1.6 tsubai
702 1.6 tsubai /* Get current RX configuration */
703 1.6 tsubai v = gmac_read_reg(sc, GMAC_RXMACCONFIG);
704 1.6 tsubai
705 1.6 tsubai if ((ifp->if_flags & IFF_PROMISC) != 0) {
706 1.6 tsubai /* Turn on promiscuous mode; turn off the hash filter */
707 1.6 tsubai v |= GMAC_RXMAC_PR;
708 1.6 tsubai v &= ~GMAC_RXMAC_HEN;
709 1.6 tsubai ifp->if_flags |= IFF_ALLMULTI;
710 1.6 tsubai goto chipit;
711 1.6 tsubai }
712 1.6 tsubai
713 1.6 tsubai /* Turn off promiscuous mode; turn on the hash filter */
714 1.6 tsubai v &= ~GMAC_RXMAC_PR;
715 1.6 tsubai v |= GMAC_RXMAC_HEN;
716 1.6 tsubai
717 1.6 tsubai /*
718 1.6 tsubai * Set up multicast address filter by passing all multicast addresses
719 1.6 tsubai * through a crc generator, and then using the high order 8 bits as an
720 1.6 tsubai * index into the 256 bit logical address filter. The high order bit
721 1.6 tsubai * selects the word, while the rest of the bits select the bit within
722 1.6 tsubai * the word.
723 1.6 tsubai */
724 1.6 tsubai
725 1.6 tsubai ETHER_FIRST_MULTI(step, ec, enm);
726 1.6 tsubai while (enm != NULL) {
727 1.14 wiz if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6)) {
728 1.6 tsubai /*
729 1.6 tsubai * We must listen to a range of multicast addresses.
730 1.6 tsubai * For now, just accept all multicasts, rather than
731 1.6 tsubai * trying to set only those filter bits needed to match
732 1.6 tsubai * the range. (At this time, the only use of address
733 1.6 tsubai * ranges is for IP multicast routing, for which the
734 1.6 tsubai * range is big enough to require all bits set.)
735 1.6 tsubai */
736 1.6 tsubai for (i = 0; i < 16; i++)
737 1.6 tsubai hash[i] = 0xffff;
738 1.6 tsubai ifp->if_flags |= IFF_ALLMULTI;
739 1.6 tsubai goto chipit;
740 1.6 tsubai }
741 1.6 tsubai
742 1.7 tsubai crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN);
743 1.7 tsubai
744 1.6 tsubai /* Just want the 8 most significant bits. */
745 1.6 tsubai crc >>= 24;
746 1.6 tsubai
747 1.6 tsubai /* Set the corresponding bit in the filter. */
748 1.6 tsubai hash[crc >> 4] |= 1 << (crc & 0xf);
749 1.6 tsubai
750 1.6 tsubai ETHER_NEXT_MULTI(step, enm);
751 1.6 tsubai }
752 1.6 tsubai
753 1.6 tsubai ifp->if_flags &= ~IFF_ALLMULTI;
754 1.6 tsubai
755 1.6 tsubai chipit:
756 1.6 tsubai /* Now load the hash table into the chip */
757 1.6 tsubai for (i = 0; i < 16; i++)
758 1.6 tsubai gmac_write_reg(sc, GMAC_HASHTABLE0 + i * 4, hash[i]);
759 1.6 tsubai
760 1.6 tsubai gmac_write_reg(sc, GMAC_RXMACCONFIG, v);
761 1.6 tsubai }
762 1.6 tsubai
763 1.6 tsubai void
764 1.1 tsubai gmac_init(sc)
765 1.1 tsubai struct gmac_softc *sc;
766 1.1 tsubai {
767 1.1 tsubai struct ifnet *ifp = &sc->sc_if;
768 1.1 tsubai
769 1.1 tsubai gmac_stop_txdma(sc);
770 1.1 tsubai gmac_stop_rxdma(sc);
771 1.1 tsubai
772 1.1 tsubai gmac_init_mac(sc);
773 1.6 tsubai gmac_setladrf(sc);
774 1.1 tsubai
775 1.1 tsubai gmac_start_txdma(sc);
776 1.1 tsubai gmac_start_rxdma(sc);
777 1.1 tsubai
778 1.4 tsubai gmac_write_reg(sc, GMAC_INTMASK, ~(GMAC_INT_TXEMPTY | GMAC_INT_RXDONE));
779 1.1 tsubai
780 1.1 tsubai ifp->if_flags |= IFF_RUNNING;
781 1.1 tsubai ifp->if_flags &= ~IFF_OACTIVE;
782 1.1 tsubai ifp->if_timer = 0;
783 1.1 tsubai
784 1.3 thorpej callout_reset(&sc->sc_tick_ch, 1, gmac_mii_tick, sc);
785 1.1 tsubai
786 1.1 tsubai gmac_start(ifp);
787 1.1 tsubai }
788 1.1 tsubai
789 1.1 tsubai int
790 1.1 tsubai gmac_ioctl(ifp, cmd, data)
791 1.1 tsubai struct ifnet *ifp;
792 1.1 tsubai u_long cmd;
793 1.1 tsubai caddr_t data;
794 1.1 tsubai {
795 1.1 tsubai struct gmac_softc *sc = ifp->if_softc;
796 1.1 tsubai struct ifaddr *ifa = (struct ifaddr *)data;
797 1.1 tsubai struct ifreq *ifr = (struct ifreq *)data;
798 1.1 tsubai int s, error = 0;
799 1.1 tsubai
800 1.1 tsubai s = splnet();
801 1.1 tsubai
802 1.1 tsubai switch (cmd) {
803 1.1 tsubai
804 1.1 tsubai case SIOCSIFADDR:
805 1.1 tsubai ifp->if_flags |= IFF_UP;
806 1.1 tsubai
807 1.1 tsubai switch (ifa->ifa_addr->sa_family) {
808 1.1 tsubai #ifdef INET
809 1.1 tsubai case AF_INET:
810 1.1 tsubai gmac_init(sc);
811 1.1 tsubai arp_ifinit(ifp, ifa);
812 1.1 tsubai break;
813 1.1 tsubai #endif
814 1.1 tsubai #ifdef NS
815 1.1 tsubai case AF_NS:
816 1.1 tsubai {
817 1.1 tsubai struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
818 1.1 tsubai
819 1.1 tsubai if (ns_nullhost(*ina))
820 1.1 tsubai ina->x_host =
821 1.1 tsubai *(union ns_host *)LLADDR(ifp->if_sadl);
822 1.1 tsubai else {
823 1.14 wiz memcpy(LLADDR(ifp->if_sadl),
824 1.14 wiz ina->x_host.c_host,
825 1.1 tsubai sizeof(sc->sc_enaddr));
826 1.1 tsubai }
827 1.1 tsubai /* Set new address. */
828 1.1 tsubai gmac_init(sc);
829 1.1 tsubai break;
830 1.1 tsubai }
831 1.1 tsubai #endif
832 1.1 tsubai default:
833 1.1 tsubai gmac_init(sc);
834 1.1 tsubai break;
835 1.1 tsubai }
836 1.1 tsubai break;
837 1.1 tsubai
838 1.1 tsubai case SIOCSIFFLAGS:
839 1.1 tsubai if ((ifp->if_flags & IFF_UP) == 0 &&
840 1.1 tsubai (ifp->if_flags & IFF_RUNNING) != 0) {
841 1.1 tsubai /*
842 1.1 tsubai * If interface is marked down and it is running, then
843 1.1 tsubai * stop it.
844 1.1 tsubai */
845 1.1 tsubai gmac_stop(sc);
846 1.1 tsubai ifp->if_flags &= ~IFF_RUNNING;
847 1.1 tsubai } else if ((ifp->if_flags & IFF_UP) != 0 &&
848 1.1 tsubai (ifp->if_flags & IFF_RUNNING) == 0) {
849 1.1 tsubai /*
850 1.1 tsubai * If interface is marked up and it is stopped, then
851 1.1 tsubai * start it.
852 1.1 tsubai */
853 1.1 tsubai gmac_init(sc);
854 1.1 tsubai } else {
855 1.1 tsubai /*
856 1.1 tsubai * Reset the interface to pick up changes in any other
857 1.1 tsubai * flags that affect hardware registers.
858 1.1 tsubai */
859 1.2 tsubai gmac_reset(sc);
860 1.1 tsubai gmac_init(sc);
861 1.1 tsubai }
862 1.1 tsubai #ifdef GMAC_DEBUG
863 1.1 tsubai if (ifp->if_flags & IFF_DEBUG)
864 1.1 tsubai sc->sc_flags |= GMAC_DEBUGFLAG;
865 1.1 tsubai #endif
866 1.1 tsubai break;
867 1.1 tsubai
868 1.1 tsubai case SIOCADDMULTI:
869 1.1 tsubai case SIOCDELMULTI:
870 1.1 tsubai error = (cmd == SIOCADDMULTI) ?
871 1.1 tsubai ether_addmulti(ifr, &sc->sc_ethercom) :
872 1.1 tsubai ether_delmulti(ifr, &sc->sc_ethercom);
873 1.1 tsubai
874 1.1 tsubai if (error == ENETRESET) {
875 1.1 tsubai /*
876 1.1 tsubai * Multicast list has changed; set the hardware filter
877 1.1 tsubai * accordingly.
878 1.1 tsubai */
879 1.1 tsubai gmac_init(sc);
880 1.1 tsubai /* gmac_setladrf(sc); */
881 1.1 tsubai error = 0;
882 1.1 tsubai }
883 1.1 tsubai break;
884 1.1 tsubai
885 1.1 tsubai case SIOCGIFMEDIA:
886 1.1 tsubai case SIOCSIFMEDIA:
887 1.1 tsubai error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
888 1.1 tsubai break;
889 1.1 tsubai
890 1.1 tsubai default:
891 1.1 tsubai error = EINVAL;
892 1.1 tsubai }
893 1.1 tsubai
894 1.1 tsubai splx(s);
895 1.1 tsubai return error;
896 1.1 tsubai }
897 1.1 tsubai
898 1.1 tsubai void
899 1.1 tsubai gmac_watchdog(ifp)
900 1.1 tsubai struct ifnet *ifp;
901 1.1 tsubai {
902 1.1 tsubai struct gmac_softc *sc = ifp->if_softc;
903 1.1 tsubai
904 1.1 tsubai printf("%s: device timeout\n", ifp->if_xname);
905 1.1 tsubai ifp->if_oerrors++;
906 1.1 tsubai
907 1.1 tsubai gmac_reset(sc);
908 1.1 tsubai gmac_init(sc);
909 1.1 tsubai }
910 1.1 tsubai
911 1.1 tsubai int
912 1.1 tsubai gmac_mediachange(ifp)
913 1.1 tsubai struct ifnet *ifp;
914 1.1 tsubai {
915 1.1 tsubai struct gmac_softc *sc = ifp->if_softc;
916 1.1 tsubai
917 1.1 tsubai return mii_mediachg(&sc->sc_mii);
918 1.1 tsubai }
919 1.1 tsubai
920 1.1 tsubai void
921 1.1 tsubai gmac_mediastatus(ifp, ifmr)
922 1.1 tsubai struct ifnet *ifp;
923 1.1 tsubai struct ifmediareq *ifmr;
924 1.1 tsubai {
925 1.1 tsubai struct gmac_softc *sc = ifp->if_softc;
926 1.1 tsubai
927 1.1 tsubai mii_pollstat(&sc->sc_mii);
928 1.1 tsubai
929 1.1 tsubai ifmr->ifm_status = sc->sc_mii.mii_media_status;
930 1.1 tsubai ifmr->ifm_active = sc->sc_mii.mii_media_active;
931 1.1 tsubai }
932 1.1 tsubai
933 1.1 tsubai int
934 1.1 tsubai gmac_mii_readreg(dev, phy, reg)
935 1.1 tsubai struct device *dev;
936 1.1 tsubai int phy, reg;
937 1.1 tsubai {
938 1.1 tsubai struct gmac_softc *sc = (void *)dev;
939 1.1 tsubai int i;
940 1.1 tsubai
941 1.1 tsubai gmac_write_reg(sc, GMAC_MIFFRAMEOUTPUT,
942 1.1 tsubai 0x60020000 | (phy << 23) | (reg << 18));
943 1.1 tsubai
944 1.1 tsubai for (i = 1000; i >= 0; i -= 10) {
945 1.1 tsubai if (gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0x10000)
946 1.1 tsubai break;
947 1.1 tsubai delay(10);
948 1.1 tsubai }
949 1.1 tsubai if (i < 0) {
950 1.1 tsubai printf("%s: gmac_mii_readreg: timeout\n", sc->sc_dev.dv_xname);
951 1.1 tsubai return 0;
952 1.1 tsubai }
953 1.1 tsubai
954 1.1 tsubai return gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0xffff;
955 1.1 tsubai }
956 1.1 tsubai
957 1.1 tsubai void
958 1.1 tsubai gmac_mii_writereg(dev, phy, reg, val)
959 1.1 tsubai struct device *dev;
960 1.1 tsubai int phy, reg, val;
961 1.1 tsubai {
962 1.1 tsubai struct gmac_softc *sc = (void *)dev;
963 1.1 tsubai int i;
964 1.1 tsubai
965 1.1 tsubai gmac_write_reg(sc, GMAC_MIFFRAMEOUTPUT,
966 1.1 tsubai 0x50020000 | (phy << 23) | (reg << 18) | (val & 0xffff));
967 1.1 tsubai
968 1.1 tsubai for (i = 1000; i >= 0; i -= 10) {
969 1.1 tsubai if (gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0x10000)
970 1.1 tsubai break;
971 1.1 tsubai delay(10);
972 1.1 tsubai }
973 1.1 tsubai if (i < 0)
974 1.1 tsubai printf("%s: gmac_mii_writereg: timeout\n", sc->sc_dev.dv_xname);
975 1.1 tsubai }
976 1.1 tsubai
977 1.1 tsubai void
978 1.1 tsubai gmac_mii_statchg(dev)
979 1.1 tsubai struct device *dev;
980 1.1 tsubai {
981 1.1 tsubai struct gmac_softc *sc = (void *)dev;
982 1.1 tsubai
983 1.1 tsubai gmac_stop_txdma(sc);
984 1.1 tsubai gmac_stop_rxdma(sc);
985 1.1 tsubai
986 1.1 tsubai if (IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) {
987 1.1 tsubai gmac_write_reg(sc, GMAC_TXMACCONFIG, 6);
988 1.1 tsubai gmac_write_reg(sc, GMAC_XIFCONFIG, 1);
989 1.1 tsubai } else {
990 1.1 tsubai gmac_write_reg(sc, GMAC_TXMACCONFIG, 0);
991 1.1 tsubai gmac_write_reg(sc, GMAC_XIFCONFIG, 5);
992 1.1 tsubai }
993 1.1 tsubai
994 1.1 tsubai if (0) /* g-bit? */
995 1.1 tsubai gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 3);
996 1.1 tsubai else
997 1.1 tsubai gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 0);
998 1.1 tsubai
999 1.1 tsubai gmac_start_txdma(sc);
1000 1.1 tsubai gmac_start_rxdma(sc);
1001 1.1 tsubai }
1002 1.1 tsubai
1003 1.1 tsubai void
1004 1.1 tsubai gmac_mii_tick(v)
1005 1.1 tsubai void *v;
1006 1.1 tsubai {
1007 1.1 tsubai struct gmac_softc *sc = v;
1008 1.1 tsubai int s;
1009 1.1 tsubai
1010 1.1 tsubai s = splnet();
1011 1.1 tsubai mii_tick(&sc->sc_mii);
1012 1.1 tsubai splx(s);
1013 1.1 tsubai
1014 1.3 thorpej callout_reset(&sc->sc_tick_ch, hz, gmac_mii_tick, sc);
1015 1.1 tsubai }
1016