if_gm.c revision 1.22 1 1.22 chs /* $NetBSD: if_gm.c,v 1.22 2003/08/24 18:02:00 chs Exp $ */
2 1.1 tsubai
3 1.1 tsubai /*-
4 1.1 tsubai * Copyright (c) 2000 Tsubai Masanari. All rights reserved.
5 1.1 tsubai *
6 1.1 tsubai * Redistribution and use in source and binary forms, with or without
7 1.1 tsubai * modification, are permitted provided that the following conditions
8 1.1 tsubai * are met:
9 1.1 tsubai * 1. Redistributions of source code must retain the above copyright
10 1.1 tsubai * notice, this list of conditions and the following disclaimer.
11 1.1 tsubai * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 tsubai * notice, this list of conditions and the following disclaimer in the
13 1.1 tsubai * documentation and/or other materials provided with the distribution.
14 1.1 tsubai * 3. The name of the author may not be used to endorse or promote products
15 1.1 tsubai * derived from this software without specific prior written permission.
16 1.1 tsubai *
17 1.1 tsubai * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.1 tsubai * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.1 tsubai * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.1 tsubai * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.1 tsubai * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.1 tsubai * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.1 tsubai * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.1 tsubai * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.1 tsubai * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 1.1 tsubai * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 tsubai */
28 1.21 lukem
29 1.21 lukem #include <sys/cdefs.h>
30 1.22 chs __KERNEL_RCSID(0, "$NetBSD: if_gm.c,v 1.22 2003/08/24 18:02:00 chs Exp $");
31 1.1 tsubai
32 1.1 tsubai #include "opt_inet.h"
33 1.1 tsubai #include "opt_ns.h"
34 1.15 mjl #include "rnd.h"
35 1.1 tsubai #include "bpfilter.h"
36 1.1 tsubai
37 1.1 tsubai #include <sys/param.h>
38 1.1 tsubai #include <sys/device.h>
39 1.1 tsubai #include <sys/ioctl.h>
40 1.1 tsubai #include <sys/kernel.h>
41 1.1 tsubai #include <sys/mbuf.h>
42 1.1 tsubai #include <sys/socket.h>
43 1.1 tsubai #include <sys/systm.h>
44 1.3 thorpej #include <sys/callout.h>
45 1.1 tsubai
46 1.15 mjl #if NRND > 0
47 1.15 mjl #include <sys/rnd.h>
48 1.15 mjl #endif
49 1.15 mjl
50 1.8 mrg #include <uvm/uvm_extern.h>
51 1.1 tsubai
52 1.1 tsubai #include <net/if.h>
53 1.1 tsubai #include <net/if_ether.h>
54 1.1 tsubai #include <net/if_media.h>
55 1.1 tsubai
56 1.1 tsubai #if NBPFILTER > 0
57 1.1 tsubai #include <net/bpf.h>
58 1.1 tsubai #endif
59 1.1 tsubai
60 1.1 tsubai #ifdef INET
61 1.1 tsubai #include <netinet/in.h>
62 1.1 tsubai #include <netinet/if_inarp.h>
63 1.1 tsubai #endif
64 1.1 tsubai
65 1.1 tsubai #include <dev/mii/mii.h>
66 1.1 tsubai #include <dev/mii/miivar.h>
67 1.1 tsubai
68 1.1 tsubai #include <dev/pci/pcivar.h>
69 1.1 tsubai #include <dev/pci/pcireg.h>
70 1.1 tsubai #include <dev/pci/pcidevs.h>
71 1.1 tsubai
72 1.1 tsubai #include <dev/ofw/openfirm.h>
73 1.1 tsubai #include <macppc/dev/if_gmreg.h>
74 1.1 tsubai #include <machine/pio.h>
75 1.1 tsubai
76 1.1 tsubai #define NTXBUF 4
77 1.1 tsubai #define NRXBUF 32
78 1.1 tsubai
79 1.1 tsubai struct gmac_softc {
80 1.1 tsubai struct device sc_dev;
81 1.1 tsubai struct ethercom sc_ethercom;
82 1.1 tsubai vaddr_t sc_reg;
83 1.1 tsubai struct gmac_dma *sc_txlist;
84 1.1 tsubai struct gmac_dma *sc_rxlist;
85 1.1 tsubai int sc_txnext;
86 1.1 tsubai int sc_rxlast;
87 1.1 tsubai caddr_t sc_txbuf[NTXBUF];
88 1.1 tsubai caddr_t sc_rxbuf[NRXBUF];
89 1.1 tsubai struct mii_data sc_mii;
90 1.3 thorpej struct callout sc_tick_ch;
91 1.1 tsubai char sc_laddr[6];
92 1.15 mjl
93 1.15 mjl #if NRND > 0
94 1.15 mjl rndsource_element_t sc_rnd_source; /* random source */
95 1.15 mjl #endif
96 1.1 tsubai };
97 1.1 tsubai
98 1.1 tsubai #define sc_if sc_ethercom.ec_if
99 1.1 tsubai
100 1.1 tsubai int gmac_match __P((struct device *, struct cfdata *, void *));
101 1.1 tsubai void gmac_attach __P((struct device *, struct device *, void *));
102 1.1 tsubai
103 1.1 tsubai static __inline u_int gmac_read_reg __P((struct gmac_softc *, int));
104 1.1 tsubai static __inline void gmac_write_reg __P((struct gmac_softc *, int, u_int));
105 1.1 tsubai
106 1.1 tsubai static __inline void gmac_start_txdma __P((struct gmac_softc *));
107 1.1 tsubai static __inline void gmac_start_rxdma __P((struct gmac_softc *));
108 1.1 tsubai static __inline void gmac_stop_txdma __P((struct gmac_softc *));
109 1.1 tsubai static __inline void gmac_stop_rxdma __P((struct gmac_softc *));
110 1.1 tsubai
111 1.1 tsubai int gmac_intr __P((void *));
112 1.1 tsubai void gmac_tint __P((struct gmac_softc *));
113 1.1 tsubai void gmac_rint __P((struct gmac_softc *));
114 1.1 tsubai struct mbuf * gmac_get __P((struct gmac_softc *, caddr_t, int));
115 1.1 tsubai void gmac_start __P((struct ifnet *));
116 1.1 tsubai int gmac_put __P((struct gmac_softc *, caddr_t, struct mbuf *));
117 1.1 tsubai
118 1.1 tsubai void gmac_stop __P((struct gmac_softc *));
119 1.1 tsubai void gmac_reset __P((struct gmac_softc *));
120 1.1 tsubai void gmac_init __P((struct gmac_softc *));
121 1.1 tsubai void gmac_init_mac __P((struct gmac_softc *));
122 1.6 tsubai void gmac_setladrf __P((struct gmac_softc *));
123 1.1 tsubai
124 1.1 tsubai int gmac_ioctl __P((struct ifnet *, u_long, caddr_t));
125 1.1 tsubai void gmac_watchdog __P((struct ifnet *));
126 1.1 tsubai
127 1.1 tsubai int gmac_mediachange __P((struct ifnet *));
128 1.1 tsubai void gmac_mediastatus __P((struct ifnet *, struct ifmediareq *));
129 1.1 tsubai int gmac_mii_readreg __P((struct device *, int, int));
130 1.1 tsubai void gmac_mii_writereg __P((struct device *, int, int, int));
131 1.1 tsubai void gmac_mii_statchg __P((struct device *));
132 1.1 tsubai void gmac_mii_tick __P((void *));
133 1.1 tsubai
134 1.19 thorpej CFATTACH_DECL(gm, sizeof(struct gmac_softc),
135 1.19 thorpej gmac_match, gmac_attach, NULL, NULL);
136 1.1 tsubai
137 1.1 tsubai int
138 1.1 tsubai gmac_match(parent, match, aux)
139 1.1 tsubai struct device *parent;
140 1.1 tsubai struct cfdata *match;
141 1.1 tsubai void *aux;
142 1.1 tsubai {
143 1.1 tsubai struct pci_attach_args *pa = aux;
144 1.1 tsubai
145 1.1 tsubai if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE &&
146 1.13 tsubai (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC ||
147 1.22 chs PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC2 ||
148 1.22 chs PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC3))
149 1.1 tsubai return 1;
150 1.1 tsubai
151 1.1 tsubai return 0;
152 1.1 tsubai }
153 1.1 tsubai
154 1.1 tsubai void
155 1.1 tsubai gmac_attach(parent, self, aux)
156 1.1 tsubai struct device *parent, *self;
157 1.1 tsubai void *aux;
158 1.1 tsubai {
159 1.1 tsubai struct gmac_softc *sc = (void *)self;
160 1.1 tsubai struct pci_attach_args *pa = aux;
161 1.1 tsubai struct ifnet *ifp = &sc->sc_if;
162 1.1 tsubai struct mii_data *mii = &sc->sc_mii;
163 1.1 tsubai pci_intr_handle_t ih;
164 1.1 tsubai const char *intrstr = NULL;
165 1.1 tsubai int node, i;
166 1.1 tsubai char *p;
167 1.1 tsubai struct gmac_dma *dp;
168 1.1 tsubai u_int32_t reg[10];
169 1.1 tsubai u_char laddr[6];
170 1.1 tsubai
171 1.1 tsubai node = pcidev_to_ofdev(pa->pa_pc, pa->pa_tag);
172 1.1 tsubai if (node == 0) {
173 1.1 tsubai printf(": cannot find gmac node\n");
174 1.1 tsubai return;
175 1.1 tsubai }
176 1.1 tsubai
177 1.1 tsubai OF_getprop(node, "local-mac-address", laddr, sizeof laddr);
178 1.1 tsubai OF_getprop(node, "assigned-addresses", reg, sizeof reg);
179 1.1 tsubai
180 1.14 wiz memcpy(sc->sc_laddr, laddr, sizeof laddr);
181 1.1 tsubai sc->sc_reg = reg[2];
182 1.1 tsubai
183 1.10 sommerfe if (pci_intr_map(pa, &ih)) {
184 1.1 tsubai printf(": unable to map interrupt\n");
185 1.1 tsubai return;
186 1.1 tsubai }
187 1.1 tsubai intrstr = pci_intr_string(pa->pa_pc, ih);
188 1.1 tsubai
189 1.1 tsubai if (pci_intr_establish(pa->pa_pc, ih, IPL_NET, gmac_intr, sc) == NULL) {
190 1.1 tsubai printf(": unable to establish interrupt");
191 1.1 tsubai if (intrstr)
192 1.1 tsubai printf(" at %s", intrstr);
193 1.1 tsubai printf("\n");
194 1.1 tsubai return;
195 1.1 tsubai }
196 1.1 tsubai
197 1.20 wiz /* Setup packet buffers and DMA descriptors. */
198 1.1 tsubai p = malloc((NRXBUF + NTXBUF) * 2048 + 3 * 0x800, M_DEVBUF, M_NOWAIT);
199 1.1 tsubai if (p == NULL) {
200 1.1 tsubai printf(": cannot malloc buffers\n");
201 1.1 tsubai return;
202 1.1 tsubai }
203 1.1 tsubai p = (void *)roundup((vaddr_t)p, 0x800);
204 1.14 wiz memset(p, 0, 2048 * (NRXBUF + NTXBUF) + 2 * 0x800);
205 1.2 tsubai
206 1.2 tsubai sc->sc_rxlist = (void *)p;
207 1.2 tsubai p += 0x800;
208 1.2 tsubai sc->sc_txlist = (void *)p;
209 1.2 tsubai p += 0x800;
210 1.1 tsubai
211 1.1 tsubai dp = sc->sc_rxlist;
212 1.1 tsubai for (i = 0; i < NRXBUF; i++) {
213 1.1 tsubai sc->sc_rxbuf[i] = p;
214 1.5 tsubai dp->address = htole32(vtophys((vaddr_t)p));
215 1.1 tsubai dp->cmd = htole32(GMAC_OWN);
216 1.1 tsubai dp++;
217 1.1 tsubai p += 2048;
218 1.1 tsubai }
219 1.1 tsubai
220 1.1 tsubai dp = sc->sc_txlist;
221 1.1 tsubai for (i = 0; i < NTXBUF; i++) {
222 1.1 tsubai sc->sc_txbuf[i] = p;
223 1.5 tsubai dp->address = htole32(vtophys((vaddr_t)p));
224 1.1 tsubai dp++;
225 1.1 tsubai p += 2048;
226 1.1 tsubai }
227 1.1 tsubai
228 1.1 tsubai printf(": Ethernet address %s\n", ether_sprintf(laddr));
229 1.1 tsubai printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
230 1.1 tsubai
231 1.3 thorpej callout_init(&sc->sc_tick_ch);
232 1.3 thorpej
233 1.2 tsubai gmac_reset(sc);
234 1.2 tsubai gmac_init_mac(sc);
235 1.2 tsubai
236 1.14 wiz memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
237 1.1 tsubai ifp->if_softc = sc;
238 1.1 tsubai ifp->if_ioctl = gmac_ioctl;
239 1.1 tsubai ifp->if_start = gmac_start;
240 1.1 tsubai ifp->if_watchdog = gmac_watchdog;
241 1.1 tsubai ifp->if_flags =
242 1.1 tsubai IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
243 1.17 itojun IFQ_SET_READY(&ifp->if_snd);
244 1.1 tsubai
245 1.1 tsubai mii->mii_ifp = ifp;
246 1.1 tsubai mii->mii_readreg = gmac_mii_readreg;
247 1.1 tsubai mii->mii_writereg = gmac_mii_writereg;
248 1.1 tsubai mii->mii_statchg = gmac_mii_statchg;
249 1.1 tsubai
250 1.1 tsubai ifmedia_init(&mii->mii_media, 0, gmac_mediachange, gmac_mediastatus);
251 1.1 tsubai mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0);
252 1.1 tsubai
253 1.1 tsubai /* Choose a default media. */
254 1.1 tsubai if (LIST_FIRST(&mii->mii_phys) == NULL) {
255 1.1 tsubai ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
256 1.1 tsubai ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_NONE);
257 1.1 tsubai } else
258 1.1 tsubai ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO);
259 1.1 tsubai
260 1.1 tsubai if_attach(ifp);
261 1.1 tsubai ether_ifattach(ifp, laddr);
262 1.15 mjl #if NRND > 0
263 1.15 mjl rnd_attach_source(&sc->sc_rnd_source, sc->sc_dev.dv_xname,
264 1.15 mjl RND_TYPE_NET, 0);
265 1.15 mjl #endif
266 1.1 tsubai }
267 1.1 tsubai
268 1.1 tsubai u_int
269 1.1 tsubai gmac_read_reg(sc, reg)
270 1.1 tsubai struct gmac_softc *sc;
271 1.1 tsubai int reg;
272 1.1 tsubai {
273 1.1 tsubai return in32rb(sc->sc_reg + reg);
274 1.1 tsubai }
275 1.1 tsubai
276 1.1 tsubai void
277 1.1 tsubai gmac_write_reg(sc, reg, val)
278 1.1 tsubai struct gmac_softc *sc;
279 1.1 tsubai int reg;
280 1.1 tsubai u_int val;
281 1.1 tsubai {
282 1.1 tsubai out32rb(sc->sc_reg + reg, val);
283 1.1 tsubai }
284 1.1 tsubai
285 1.1 tsubai void
286 1.1 tsubai gmac_start_txdma(sc)
287 1.1 tsubai struct gmac_softc *sc;
288 1.1 tsubai {
289 1.1 tsubai u_int x;
290 1.1 tsubai
291 1.1 tsubai x = gmac_read_reg(sc, GMAC_TXDMACONFIG);
292 1.1 tsubai x |= 1;
293 1.1 tsubai gmac_write_reg(sc, GMAC_TXDMACONFIG, x);
294 1.1 tsubai x = gmac_read_reg(sc, GMAC_TXMACCONFIG);
295 1.1 tsubai x |= 1;
296 1.1 tsubai gmac_write_reg(sc, GMAC_TXMACCONFIG, x);
297 1.1 tsubai }
298 1.1 tsubai
299 1.1 tsubai void
300 1.1 tsubai gmac_start_rxdma(sc)
301 1.1 tsubai struct gmac_softc *sc;
302 1.1 tsubai {
303 1.1 tsubai u_int x;
304 1.1 tsubai
305 1.1 tsubai x = gmac_read_reg(sc, GMAC_RXDMACONFIG);
306 1.1 tsubai x |= 1;
307 1.1 tsubai gmac_write_reg(sc, GMAC_RXDMACONFIG, x);
308 1.1 tsubai x = gmac_read_reg(sc, GMAC_RXMACCONFIG);
309 1.1 tsubai x |= 1;
310 1.1 tsubai gmac_write_reg(sc, GMAC_RXMACCONFIG, x);
311 1.1 tsubai }
312 1.1 tsubai
313 1.1 tsubai void
314 1.1 tsubai gmac_stop_txdma(sc)
315 1.1 tsubai struct gmac_softc *sc;
316 1.1 tsubai {
317 1.1 tsubai u_int x;
318 1.1 tsubai
319 1.1 tsubai x = gmac_read_reg(sc, GMAC_TXDMACONFIG);
320 1.1 tsubai x &= ~1;
321 1.1 tsubai gmac_write_reg(sc, GMAC_TXDMACONFIG, x);
322 1.1 tsubai x = gmac_read_reg(sc, GMAC_TXMACCONFIG);
323 1.1 tsubai x &= ~1;
324 1.1 tsubai gmac_write_reg(sc, GMAC_TXMACCONFIG, x);
325 1.1 tsubai }
326 1.1 tsubai
327 1.1 tsubai void
328 1.1 tsubai gmac_stop_rxdma(sc)
329 1.1 tsubai struct gmac_softc *sc;
330 1.1 tsubai {
331 1.1 tsubai u_int x;
332 1.1 tsubai
333 1.1 tsubai x = gmac_read_reg(sc, GMAC_RXDMACONFIG);
334 1.1 tsubai x &= ~1;
335 1.1 tsubai gmac_write_reg(sc, GMAC_RXDMACONFIG, x);
336 1.1 tsubai x = gmac_read_reg(sc, GMAC_RXMACCONFIG);
337 1.1 tsubai x &= ~1;
338 1.1 tsubai gmac_write_reg(sc, GMAC_RXMACCONFIG, x);
339 1.1 tsubai }
340 1.1 tsubai
341 1.1 tsubai int
342 1.1 tsubai gmac_intr(v)
343 1.1 tsubai void *v;
344 1.1 tsubai {
345 1.1 tsubai struct gmac_softc *sc = v;
346 1.1 tsubai u_int status;
347 1.1 tsubai
348 1.1 tsubai status = gmac_read_reg(sc, GMAC_STATUS) & 0xff;
349 1.1 tsubai if (status == 0)
350 1.1 tsubai return 0;
351 1.1 tsubai
352 1.1 tsubai if (status & GMAC_INT_RXDONE)
353 1.1 tsubai gmac_rint(sc);
354 1.1 tsubai
355 1.4 tsubai if (status & GMAC_INT_TXEMPTY)
356 1.1 tsubai gmac_tint(sc);
357 1.1 tsubai
358 1.15 mjl #if NRND > 0
359 1.15 mjl rnd_add_uint32(&sc->sc_rnd_source, status);
360 1.15 mjl #endif
361 1.1 tsubai return 1;
362 1.1 tsubai }
363 1.1 tsubai
364 1.1 tsubai void
365 1.1 tsubai gmac_tint(sc)
366 1.1 tsubai struct gmac_softc *sc;
367 1.1 tsubai {
368 1.1 tsubai struct ifnet *ifp = &sc->sc_if;
369 1.1 tsubai
370 1.1 tsubai ifp->if_flags &= ~IFF_OACTIVE;
371 1.1 tsubai ifp->if_timer = 0;
372 1.1 tsubai gmac_start(ifp);
373 1.1 tsubai }
374 1.1 tsubai
375 1.1 tsubai void
376 1.1 tsubai gmac_rint(sc)
377 1.1 tsubai struct gmac_softc *sc;
378 1.1 tsubai {
379 1.1 tsubai struct ifnet *ifp = &sc->sc_if;
380 1.1 tsubai volatile struct gmac_dma *dp;
381 1.1 tsubai struct mbuf *m;
382 1.12 tsubai int i, j, len;
383 1.1 tsubai u_int cmd;
384 1.1 tsubai
385 1.1 tsubai for (i = sc->sc_rxlast;; i++) {
386 1.1 tsubai if (i == NRXBUF)
387 1.1 tsubai i = 0;
388 1.1 tsubai
389 1.1 tsubai dp = &sc->sc_rxlist[i];
390 1.1 tsubai cmd = le32toh(dp->cmd);
391 1.1 tsubai if (cmd & GMAC_OWN)
392 1.1 tsubai break;
393 1.1 tsubai len = (cmd >> 16) & GMAC_LEN_MASK;
394 1.1 tsubai len -= 4; /* CRC */
395 1.1 tsubai
396 1.1 tsubai if (le32toh(dp->cmd_hi) & 0x40000000) {
397 1.1 tsubai ifp->if_ierrors++;
398 1.1 tsubai goto next;
399 1.1 tsubai }
400 1.1 tsubai
401 1.1 tsubai m = gmac_get(sc, sc->sc_rxbuf[i], len);
402 1.1 tsubai if (m == NULL) {
403 1.1 tsubai ifp->if_ierrors++;
404 1.1 tsubai goto next;
405 1.1 tsubai }
406 1.1 tsubai
407 1.1 tsubai #if NBPFILTER > 0
408 1.1 tsubai /*
409 1.1 tsubai * Check if there's a BPF listener on this interface.
410 1.1 tsubai * If so, hand off the raw packet to BPF.
411 1.1 tsubai */
412 1.1 tsubai if (ifp->if_bpf)
413 1.16 thorpej bpf_mtap(ifp->if_bpf, m);
414 1.1 tsubai #endif
415 1.1 tsubai (*ifp->if_input)(ifp, m);
416 1.1 tsubai ifp->if_ipackets++;
417 1.1 tsubai
418 1.1 tsubai next:
419 1.1 tsubai dp->cmd_hi = 0;
420 1.1 tsubai __asm __volatile ("sync");
421 1.1 tsubai dp->cmd = htole32(GMAC_OWN);
422 1.1 tsubai }
423 1.1 tsubai sc->sc_rxlast = i;
424 1.12 tsubai
425 1.12 tsubai /* XXX Make sure free buffers have GMAC_OWN. */
426 1.12 tsubai i++;
427 1.12 tsubai for (j = 1; j < NRXBUF; j++) {
428 1.12 tsubai if (i == NRXBUF)
429 1.12 tsubai i = 0;
430 1.12 tsubai dp = &sc->sc_rxlist[i++];
431 1.12 tsubai dp->cmd = htole32(GMAC_OWN);
432 1.12 tsubai }
433 1.1 tsubai }
434 1.1 tsubai
435 1.1 tsubai struct mbuf *
436 1.1 tsubai gmac_get(sc, pkt, totlen)
437 1.1 tsubai struct gmac_softc *sc;
438 1.1 tsubai caddr_t pkt;
439 1.1 tsubai int totlen;
440 1.1 tsubai {
441 1.1 tsubai struct mbuf *m;
442 1.1 tsubai struct mbuf *top, **mp;
443 1.1 tsubai int len;
444 1.1 tsubai
445 1.1 tsubai MGETHDR(m, M_DONTWAIT, MT_DATA);
446 1.1 tsubai if (m == 0)
447 1.1 tsubai return 0;
448 1.1 tsubai m->m_pkthdr.rcvif = &sc->sc_if;
449 1.1 tsubai m->m_pkthdr.len = totlen;
450 1.1 tsubai len = MHLEN;
451 1.1 tsubai top = 0;
452 1.1 tsubai mp = ⊤
453 1.1 tsubai
454 1.1 tsubai while (totlen > 0) {
455 1.1 tsubai if (top) {
456 1.1 tsubai MGET(m, M_DONTWAIT, MT_DATA);
457 1.1 tsubai if (m == 0) {
458 1.1 tsubai m_freem(top);
459 1.1 tsubai return 0;
460 1.1 tsubai }
461 1.1 tsubai len = MLEN;
462 1.1 tsubai }
463 1.1 tsubai if (totlen >= MINCLSIZE) {
464 1.1 tsubai MCLGET(m, M_DONTWAIT);
465 1.1 tsubai if ((m->m_flags & M_EXT) == 0) {
466 1.1 tsubai m_free(m);
467 1.1 tsubai m_freem(top);
468 1.1 tsubai return 0;
469 1.1 tsubai }
470 1.1 tsubai len = MCLBYTES;
471 1.1 tsubai }
472 1.1 tsubai m->m_len = len = min(totlen, len);
473 1.14 wiz memcpy(mtod(m, caddr_t), pkt, len);
474 1.1 tsubai pkt += len;
475 1.1 tsubai totlen -= len;
476 1.1 tsubai *mp = m;
477 1.1 tsubai mp = &m->m_next;
478 1.1 tsubai }
479 1.1 tsubai
480 1.1 tsubai return top;
481 1.1 tsubai }
482 1.1 tsubai
483 1.1 tsubai void
484 1.1 tsubai gmac_start(ifp)
485 1.1 tsubai struct ifnet *ifp;
486 1.1 tsubai {
487 1.1 tsubai struct gmac_softc *sc = ifp->if_softc;
488 1.1 tsubai struct mbuf *m;
489 1.1 tsubai caddr_t buff;
490 1.1 tsubai int i, tlen;
491 1.1 tsubai volatile struct gmac_dma *dp;
492 1.1 tsubai
493 1.1 tsubai if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
494 1.1 tsubai return;
495 1.1 tsubai
496 1.1 tsubai for (;;) {
497 1.1 tsubai if (ifp->if_flags & IFF_OACTIVE)
498 1.1 tsubai break;
499 1.1 tsubai
500 1.17 itojun IFQ_DEQUEUE(&ifp->if_snd, m);
501 1.1 tsubai if (m == 0)
502 1.1 tsubai break;
503 1.1 tsubai
504 1.1 tsubai /* 5 seconds to watch for failing to transmit */
505 1.1 tsubai ifp->if_timer = 5;
506 1.1 tsubai ifp->if_opackets++; /* # of pkts */
507 1.1 tsubai
508 1.1 tsubai i = sc->sc_txnext;
509 1.1 tsubai buff = sc->sc_txbuf[i];
510 1.1 tsubai tlen = gmac_put(sc, buff, m);
511 1.1 tsubai
512 1.1 tsubai dp = &sc->sc_txlist[i];
513 1.1 tsubai dp->cmd_hi = 0;
514 1.1 tsubai dp->address_hi = 0;
515 1.1 tsubai dp->cmd = htole32(tlen | GMAC_OWN | GMAC_SOP);
516 1.1 tsubai
517 1.1 tsubai i++;
518 1.1 tsubai if (i == NTXBUF)
519 1.1 tsubai i = 0;
520 1.1 tsubai __asm __volatile ("sync");
521 1.1 tsubai
522 1.1 tsubai gmac_write_reg(sc, GMAC_TXDMAKICK, i);
523 1.1 tsubai sc->sc_txnext = i;
524 1.1 tsubai
525 1.1 tsubai #if NBPFILTER > 0
526 1.1 tsubai /*
527 1.1 tsubai * If BPF is listening on this interface, let it see the
528 1.1 tsubai * packet before we commit it to the wire.
529 1.1 tsubai */
530 1.1 tsubai if (ifp->if_bpf)
531 1.16 thorpej bpf_mtap(ifp->if_bpf, m);
532 1.1 tsubai #endif
533 1.16 thorpej m_freem(m);
534 1.4 tsubai
535 1.4 tsubai i++;
536 1.4 tsubai if (i == NTXBUF)
537 1.4 tsubai i = 0;
538 1.4 tsubai if (i == gmac_read_reg(sc, GMAC_TXDMACOMPLETE)) {
539 1.4 tsubai ifp->if_flags |= IFF_OACTIVE;
540 1.4 tsubai break;
541 1.4 tsubai }
542 1.1 tsubai }
543 1.1 tsubai }
544 1.1 tsubai
545 1.1 tsubai int
546 1.1 tsubai gmac_put(sc, buff, m)
547 1.1 tsubai struct gmac_softc *sc;
548 1.1 tsubai caddr_t buff;
549 1.1 tsubai struct mbuf *m;
550 1.1 tsubai {
551 1.1 tsubai int len, tlen = 0;
552 1.1 tsubai
553 1.16 thorpej for (; m; m = m->m_next) {
554 1.1 tsubai len = m->m_len;
555 1.16 thorpej if (len == 0)
556 1.1 tsubai continue;
557 1.14 wiz memcpy(buff, mtod(m, caddr_t), len);
558 1.1 tsubai buff += len;
559 1.1 tsubai tlen += len;
560 1.1 tsubai }
561 1.1 tsubai if (tlen > 2048)
562 1.1 tsubai panic("%s: gmac_put packet overflow", sc->sc_dev.dv_xname);
563 1.1 tsubai
564 1.1 tsubai return tlen;
565 1.1 tsubai }
566 1.1 tsubai
567 1.1 tsubai void
568 1.1 tsubai gmac_reset(sc)
569 1.1 tsubai struct gmac_softc *sc;
570 1.1 tsubai {
571 1.1 tsubai int i, s;
572 1.1 tsubai
573 1.1 tsubai s = splnet();
574 1.1 tsubai
575 1.1 tsubai gmac_stop_txdma(sc);
576 1.1 tsubai gmac_stop_rxdma(sc);
577 1.1 tsubai
578 1.1 tsubai gmac_write_reg(sc, GMAC_SOFTWARERESET, 3);
579 1.1 tsubai for (i = 10; i > 0; i--) {
580 1.1 tsubai delay(300000); /* XXX long delay */
581 1.2 tsubai if ((gmac_read_reg(sc, GMAC_SOFTWARERESET) & 3) == 0)
582 1.1 tsubai break;
583 1.1 tsubai }
584 1.1 tsubai if (i == 0)
585 1.1 tsubai printf("%s: reset timeout\n", sc->sc_dev.dv_xname);
586 1.2 tsubai
587 1.2 tsubai sc->sc_txnext = 0;
588 1.2 tsubai sc->sc_rxlast = 0;
589 1.2 tsubai for (i = 0; i < NRXBUF; i++)
590 1.2 tsubai sc->sc_rxlist[i].cmd = htole32(GMAC_OWN);
591 1.2 tsubai __asm __volatile ("sync");
592 1.2 tsubai
593 1.2 tsubai gmac_write_reg(sc, GMAC_TXDMADESCBASEHI, 0);
594 1.5 tsubai gmac_write_reg(sc, GMAC_TXDMADESCBASELO,
595 1.5 tsubai vtophys((vaddr_t)sc->sc_txlist));
596 1.2 tsubai gmac_write_reg(sc, GMAC_RXDMADESCBASEHI, 0);
597 1.5 tsubai gmac_write_reg(sc, GMAC_RXDMADESCBASELO,
598 1.5 tsubai vtophys((vaddr_t)sc->sc_rxlist));
599 1.2 tsubai gmac_write_reg(sc, GMAC_RXDMAKICK, NRXBUF);
600 1.2 tsubai
601 1.2 tsubai splx(s);
602 1.1 tsubai }
603 1.1 tsubai
604 1.1 tsubai void
605 1.1 tsubai gmac_stop(sc)
606 1.1 tsubai struct gmac_softc *sc;
607 1.1 tsubai {
608 1.1 tsubai struct ifnet *ifp = &sc->sc_if;
609 1.1 tsubai int s;
610 1.1 tsubai
611 1.1 tsubai s = splnet();
612 1.1 tsubai
613 1.3 thorpej callout_stop(&sc->sc_tick_ch);
614 1.1 tsubai mii_down(&sc->sc_mii);
615 1.1 tsubai
616 1.1 tsubai gmac_stop_txdma(sc);
617 1.1 tsubai gmac_stop_rxdma(sc);
618 1.1 tsubai
619 1.1 tsubai gmac_write_reg(sc, GMAC_INTMASK, 0xffffffff);
620 1.1 tsubai
621 1.1 tsubai ifp->if_flags &= ~(IFF_UP | IFF_RUNNING);
622 1.1 tsubai ifp->if_timer = 0;
623 1.1 tsubai
624 1.1 tsubai splx(s);
625 1.1 tsubai }
626 1.1 tsubai
627 1.1 tsubai void
628 1.1 tsubai gmac_init_mac(sc)
629 1.1 tsubai struct gmac_softc *sc;
630 1.1 tsubai {
631 1.1 tsubai int i, tb;
632 1.1 tsubai char *laddr = sc->sc_laddr;
633 1.1 tsubai
634 1.1 tsubai __asm ("mftb %0" : "=r"(tb));
635 1.1 tsubai gmac_write_reg(sc, GMAC_RANDOMSEED, tb);
636 1.1 tsubai
637 1.1 tsubai /* init-mii */
638 1.1 tsubai gmac_write_reg(sc, GMAC_DATAPATHMODE, 4);
639 1.1 tsubai gmac_mii_writereg(&sc->sc_dev, 0, 0, 0x1000);
640 1.1 tsubai
641 1.1 tsubai gmac_write_reg(sc, GMAC_TXDMACONFIG, 0xffc00);
642 1.1 tsubai gmac_write_reg(sc, GMAC_RXDMACONFIG, 0);
643 1.1 tsubai gmac_write_reg(sc, GMAC_MACPAUSE, 0x1bf0);
644 1.1 tsubai gmac_write_reg(sc, GMAC_INTERPACKETGAP0, 0);
645 1.1 tsubai gmac_write_reg(sc, GMAC_INTERPACKETGAP1, 8);
646 1.1 tsubai gmac_write_reg(sc, GMAC_INTERPACKETGAP2, 4);
647 1.1 tsubai gmac_write_reg(sc, GMAC_MINFRAMESIZE, ETHER_MIN_LEN);
648 1.1 tsubai gmac_write_reg(sc, GMAC_MAXFRAMESIZE, ETHER_MAX_LEN);
649 1.1 tsubai gmac_write_reg(sc, GMAC_PASIZE, 7);
650 1.1 tsubai gmac_write_reg(sc, GMAC_JAMSIZE, 4);
651 1.1 tsubai gmac_write_reg(sc, GMAC_ATTEMPTLIMIT,0x10);
652 1.1 tsubai gmac_write_reg(sc, GMAC_MACCNTLTYPE, 0x8808);
653 1.1 tsubai
654 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS0, (laddr[4] << 8) | laddr[5]);
655 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS1, (laddr[2] << 8) | laddr[3]);
656 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS2, (laddr[0] << 8) | laddr[1]);
657 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS3, 0);
658 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS4, 0);
659 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS5, 0);
660 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS6, 1);
661 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS7, 0xc200);
662 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRESS8, 0x0180);
663 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRFILT0, 0);
664 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRFILT1, 0);
665 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRFILT2, 0);
666 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRFILT2_1MASK, 0);
667 1.1 tsubai gmac_write_reg(sc, GMAC_MACADDRFILT0MASK, 0);
668 1.1 tsubai
669 1.6 tsubai for (i = 0; i < 0x6c; i += 4)
670 1.1 tsubai gmac_write_reg(sc, GMAC_HASHTABLE0 + i, 0);
671 1.1 tsubai
672 1.1 tsubai gmac_write_reg(sc, GMAC_SLOTTIME, 0x40);
673 1.1 tsubai
674 1.4 tsubai if (IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) {
675 1.4 tsubai gmac_write_reg(sc, GMAC_TXMACCONFIG, 6);
676 1.4 tsubai gmac_write_reg(sc, GMAC_XIFCONFIG, 1);
677 1.4 tsubai } else {
678 1.4 tsubai gmac_write_reg(sc, GMAC_TXMACCONFIG, 0);
679 1.4 tsubai gmac_write_reg(sc, GMAC_XIFCONFIG, 5);
680 1.4 tsubai }
681 1.4 tsubai
682 1.4 tsubai if (0) /* g-bit? */
683 1.4 tsubai gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 3);
684 1.4 tsubai else
685 1.4 tsubai gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 0);
686 1.1 tsubai }
687 1.1 tsubai
688 1.1 tsubai void
689 1.6 tsubai gmac_setladrf(sc)
690 1.6 tsubai struct gmac_softc *sc;
691 1.6 tsubai {
692 1.6 tsubai struct ifnet *ifp = &sc->sc_if;
693 1.6 tsubai struct ether_multi *enm;
694 1.6 tsubai struct ether_multistep step;
695 1.6 tsubai struct ethercom *ec = &sc->sc_ethercom;
696 1.6 tsubai u_int32_t crc;
697 1.6 tsubai u_int32_t hash[16];
698 1.6 tsubai u_int v;
699 1.7 tsubai int i;
700 1.6 tsubai
701 1.6 tsubai /* Clear hash table */
702 1.6 tsubai for (i = 0; i < 16; i++)
703 1.6 tsubai hash[i] = 0;
704 1.6 tsubai
705 1.6 tsubai /* Get current RX configuration */
706 1.6 tsubai v = gmac_read_reg(sc, GMAC_RXMACCONFIG);
707 1.6 tsubai
708 1.6 tsubai if ((ifp->if_flags & IFF_PROMISC) != 0) {
709 1.6 tsubai /* Turn on promiscuous mode; turn off the hash filter */
710 1.6 tsubai v |= GMAC_RXMAC_PR;
711 1.6 tsubai v &= ~GMAC_RXMAC_HEN;
712 1.6 tsubai ifp->if_flags |= IFF_ALLMULTI;
713 1.6 tsubai goto chipit;
714 1.6 tsubai }
715 1.6 tsubai
716 1.6 tsubai /* Turn off promiscuous mode; turn on the hash filter */
717 1.6 tsubai v &= ~GMAC_RXMAC_PR;
718 1.6 tsubai v |= GMAC_RXMAC_HEN;
719 1.6 tsubai
720 1.6 tsubai /*
721 1.6 tsubai * Set up multicast address filter by passing all multicast addresses
722 1.6 tsubai * through a crc generator, and then using the high order 8 bits as an
723 1.6 tsubai * index into the 256 bit logical address filter. The high order bit
724 1.6 tsubai * selects the word, while the rest of the bits select the bit within
725 1.6 tsubai * the word.
726 1.6 tsubai */
727 1.6 tsubai
728 1.6 tsubai ETHER_FIRST_MULTI(step, ec, enm);
729 1.6 tsubai while (enm != NULL) {
730 1.14 wiz if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6)) {
731 1.6 tsubai /*
732 1.6 tsubai * We must listen to a range of multicast addresses.
733 1.6 tsubai * For now, just accept all multicasts, rather than
734 1.6 tsubai * trying to set only those filter bits needed to match
735 1.6 tsubai * the range. (At this time, the only use of address
736 1.6 tsubai * ranges is for IP multicast routing, for which the
737 1.6 tsubai * range is big enough to require all bits set.)
738 1.6 tsubai */
739 1.6 tsubai for (i = 0; i < 16; i++)
740 1.6 tsubai hash[i] = 0xffff;
741 1.6 tsubai ifp->if_flags |= IFF_ALLMULTI;
742 1.6 tsubai goto chipit;
743 1.6 tsubai }
744 1.6 tsubai
745 1.7 tsubai crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN);
746 1.7 tsubai
747 1.6 tsubai /* Just want the 8 most significant bits. */
748 1.6 tsubai crc >>= 24;
749 1.6 tsubai
750 1.6 tsubai /* Set the corresponding bit in the filter. */
751 1.6 tsubai hash[crc >> 4] |= 1 << (crc & 0xf);
752 1.6 tsubai
753 1.6 tsubai ETHER_NEXT_MULTI(step, enm);
754 1.6 tsubai }
755 1.6 tsubai
756 1.6 tsubai ifp->if_flags &= ~IFF_ALLMULTI;
757 1.6 tsubai
758 1.6 tsubai chipit:
759 1.6 tsubai /* Now load the hash table into the chip */
760 1.6 tsubai for (i = 0; i < 16; i++)
761 1.6 tsubai gmac_write_reg(sc, GMAC_HASHTABLE0 + i * 4, hash[i]);
762 1.6 tsubai
763 1.6 tsubai gmac_write_reg(sc, GMAC_RXMACCONFIG, v);
764 1.6 tsubai }
765 1.6 tsubai
766 1.6 tsubai void
767 1.1 tsubai gmac_init(sc)
768 1.1 tsubai struct gmac_softc *sc;
769 1.1 tsubai {
770 1.1 tsubai struct ifnet *ifp = &sc->sc_if;
771 1.1 tsubai
772 1.1 tsubai gmac_stop_txdma(sc);
773 1.1 tsubai gmac_stop_rxdma(sc);
774 1.1 tsubai
775 1.1 tsubai gmac_init_mac(sc);
776 1.6 tsubai gmac_setladrf(sc);
777 1.1 tsubai
778 1.1 tsubai gmac_start_txdma(sc);
779 1.1 tsubai gmac_start_rxdma(sc);
780 1.1 tsubai
781 1.4 tsubai gmac_write_reg(sc, GMAC_INTMASK, ~(GMAC_INT_TXEMPTY | GMAC_INT_RXDONE));
782 1.1 tsubai
783 1.1 tsubai ifp->if_flags |= IFF_RUNNING;
784 1.1 tsubai ifp->if_flags &= ~IFF_OACTIVE;
785 1.1 tsubai ifp->if_timer = 0;
786 1.1 tsubai
787 1.3 thorpej callout_reset(&sc->sc_tick_ch, 1, gmac_mii_tick, sc);
788 1.1 tsubai
789 1.1 tsubai gmac_start(ifp);
790 1.1 tsubai }
791 1.1 tsubai
792 1.1 tsubai int
793 1.1 tsubai gmac_ioctl(ifp, cmd, data)
794 1.1 tsubai struct ifnet *ifp;
795 1.1 tsubai u_long cmd;
796 1.1 tsubai caddr_t data;
797 1.1 tsubai {
798 1.1 tsubai struct gmac_softc *sc = ifp->if_softc;
799 1.1 tsubai struct ifaddr *ifa = (struct ifaddr *)data;
800 1.1 tsubai struct ifreq *ifr = (struct ifreq *)data;
801 1.1 tsubai int s, error = 0;
802 1.1 tsubai
803 1.1 tsubai s = splnet();
804 1.1 tsubai
805 1.1 tsubai switch (cmd) {
806 1.1 tsubai
807 1.1 tsubai case SIOCSIFADDR:
808 1.1 tsubai ifp->if_flags |= IFF_UP;
809 1.1 tsubai
810 1.1 tsubai switch (ifa->ifa_addr->sa_family) {
811 1.1 tsubai #ifdef INET
812 1.1 tsubai case AF_INET:
813 1.1 tsubai gmac_init(sc);
814 1.1 tsubai arp_ifinit(ifp, ifa);
815 1.1 tsubai break;
816 1.1 tsubai #endif
817 1.1 tsubai #ifdef NS
818 1.1 tsubai case AF_NS:
819 1.1 tsubai {
820 1.1 tsubai struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
821 1.1 tsubai
822 1.1 tsubai if (ns_nullhost(*ina))
823 1.1 tsubai ina->x_host =
824 1.1 tsubai *(union ns_host *)LLADDR(ifp->if_sadl);
825 1.1 tsubai else {
826 1.14 wiz memcpy(LLADDR(ifp->if_sadl),
827 1.14 wiz ina->x_host.c_host,
828 1.1 tsubai sizeof(sc->sc_enaddr));
829 1.1 tsubai }
830 1.1 tsubai /* Set new address. */
831 1.1 tsubai gmac_init(sc);
832 1.1 tsubai break;
833 1.1 tsubai }
834 1.1 tsubai #endif
835 1.1 tsubai default:
836 1.1 tsubai gmac_init(sc);
837 1.1 tsubai break;
838 1.1 tsubai }
839 1.1 tsubai break;
840 1.1 tsubai
841 1.1 tsubai case SIOCSIFFLAGS:
842 1.1 tsubai if ((ifp->if_flags & IFF_UP) == 0 &&
843 1.1 tsubai (ifp->if_flags & IFF_RUNNING) != 0) {
844 1.1 tsubai /*
845 1.1 tsubai * If interface is marked down and it is running, then
846 1.1 tsubai * stop it.
847 1.1 tsubai */
848 1.1 tsubai gmac_stop(sc);
849 1.1 tsubai ifp->if_flags &= ~IFF_RUNNING;
850 1.1 tsubai } else if ((ifp->if_flags & IFF_UP) != 0 &&
851 1.1 tsubai (ifp->if_flags & IFF_RUNNING) == 0) {
852 1.1 tsubai /*
853 1.1 tsubai * If interface is marked up and it is stopped, then
854 1.1 tsubai * start it.
855 1.1 tsubai */
856 1.1 tsubai gmac_init(sc);
857 1.1 tsubai } else {
858 1.1 tsubai /*
859 1.1 tsubai * Reset the interface to pick up changes in any other
860 1.1 tsubai * flags that affect hardware registers.
861 1.1 tsubai */
862 1.2 tsubai gmac_reset(sc);
863 1.1 tsubai gmac_init(sc);
864 1.1 tsubai }
865 1.1 tsubai #ifdef GMAC_DEBUG
866 1.1 tsubai if (ifp->if_flags & IFF_DEBUG)
867 1.1 tsubai sc->sc_flags |= GMAC_DEBUGFLAG;
868 1.1 tsubai #endif
869 1.1 tsubai break;
870 1.1 tsubai
871 1.1 tsubai case SIOCADDMULTI:
872 1.1 tsubai case SIOCDELMULTI:
873 1.1 tsubai error = (cmd == SIOCADDMULTI) ?
874 1.1 tsubai ether_addmulti(ifr, &sc->sc_ethercom) :
875 1.1 tsubai ether_delmulti(ifr, &sc->sc_ethercom);
876 1.1 tsubai
877 1.1 tsubai if (error == ENETRESET) {
878 1.1 tsubai /*
879 1.1 tsubai * Multicast list has changed; set the hardware filter
880 1.1 tsubai * accordingly.
881 1.1 tsubai */
882 1.1 tsubai gmac_init(sc);
883 1.1 tsubai /* gmac_setladrf(sc); */
884 1.1 tsubai error = 0;
885 1.1 tsubai }
886 1.1 tsubai break;
887 1.1 tsubai
888 1.1 tsubai case SIOCGIFMEDIA:
889 1.1 tsubai case SIOCSIFMEDIA:
890 1.1 tsubai error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
891 1.1 tsubai break;
892 1.1 tsubai
893 1.1 tsubai default:
894 1.1 tsubai error = EINVAL;
895 1.1 tsubai }
896 1.1 tsubai
897 1.1 tsubai splx(s);
898 1.1 tsubai return error;
899 1.1 tsubai }
900 1.1 tsubai
901 1.1 tsubai void
902 1.1 tsubai gmac_watchdog(ifp)
903 1.1 tsubai struct ifnet *ifp;
904 1.1 tsubai {
905 1.1 tsubai struct gmac_softc *sc = ifp->if_softc;
906 1.1 tsubai
907 1.1 tsubai printf("%s: device timeout\n", ifp->if_xname);
908 1.1 tsubai ifp->if_oerrors++;
909 1.1 tsubai
910 1.1 tsubai gmac_reset(sc);
911 1.1 tsubai gmac_init(sc);
912 1.1 tsubai }
913 1.1 tsubai
914 1.1 tsubai int
915 1.1 tsubai gmac_mediachange(ifp)
916 1.1 tsubai struct ifnet *ifp;
917 1.1 tsubai {
918 1.1 tsubai struct gmac_softc *sc = ifp->if_softc;
919 1.1 tsubai
920 1.1 tsubai return mii_mediachg(&sc->sc_mii);
921 1.1 tsubai }
922 1.1 tsubai
923 1.1 tsubai void
924 1.1 tsubai gmac_mediastatus(ifp, ifmr)
925 1.1 tsubai struct ifnet *ifp;
926 1.1 tsubai struct ifmediareq *ifmr;
927 1.1 tsubai {
928 1.1 tsubai struct gmac_softc *sc = ifp->if_softc;
929 1.1 tsubai
930 1.1 tsubai mii_pollstat(&sc->sc_mii);
931 1.1 tsubai
932 1.1 tsubai ifmr->ifm_status = sc->sc_mii.mii_media_status;
933 1.1 tsubai ifmr->ifm_active = sc->sc_mii.mii_media_active;
934 1.1 tsubai }
935 1.1 tsubai
936 1.1 tsubai int
937 1.1 tsubai gmac_mii_readreg(dev, phy, reg)
938 1.1 tsubai struct device *dev;
939 1.1 tsubai int phy, reg;
940 1.1 tsubai {
941 1.1 tsubai struct gmac_softc *sc = (void *)dev;
942 1.1 tsubai int i;
943 1.1 tsubai
944 1.1 tsubai gmac_write_reg(sc, GMAC_MIFFRAMEOUTPUT,
945 1.1 tsubai 0x60020000 | (phy << 23) | (reg << 18));
946 1.1 tsubai
947 1.1 tsubai for (i = 1000; i >= 0; i -= 10) {
948 1.1 tsubai if (gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0x10000)
949 1.1 tsubai break;
950 1.1 tsubai delay(10);
951 1.1 tsubai }
952 1.1 tsubai if (i < 0) {
953 1.1 tsubai printf("%s: gmac_mii_readreg: timeout\n", sc->sc_dev.dv_xname);
954 1.1 tsubai return 0;
955 1.1 tsubai }
956 1.1 tsubai
957 1.1 tsubai return gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0xffff;
958 1.1 tsubai }
959 1.1 tsubai
960 1.1 tsubai void
961 1.1 tsubai gmac_mii_writereg(dev, phy, reg, val)
962 1.1 tsubai struct device *dev;
963 1.1 tsubai int phy, reg, val;
964 1.1 tsubai {
965 1.1 tsubai struct gmac_softc *sc = (void *)dev;
966 1.1 tsubai int i;
967 1.1 tsubai
968 1.1 tsubai gmac_write_reg(sc, GMAC_MIFFRAMEOUTPUT,
969 1.1 tsubai 0x50020000 | (phy << 23) | (reg << 18) | (val & 0xffff));
970 1.1 tsubai
971 1.1 tsubai for (i = 1000; i >= 0; i -= 10) {
972 1.1 tsubai if (gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0x10000)
973 1.1 tsubai break;
974 1.1 tsubai delay(10);
975 1.1 tsubai }
976 1.1 tsubai if (i < 0)
977 1.1 tsubai printf("%s: gmac_mii_writereg: timeout\n", sc->sc_dev.dv_xname);
978 1.1 tsubai }
979 1.1 tsubai
980 1.1 tsubai void
981 1.1 tsubai gmac_mii_statchg(dev)
982 1.1 tsubai struct device *dev;
983 1.1 tsubai {
984 1.1 tsubai struct gmac_softc *sc = (void *)dev;
985 1.1 tsubai
986 1.1 tsubai gmac_stop_txdma(sc);
987 1.1 tsubai gmac_stop_rxdma(sc);
988 1.1 tsubai
989 1.1 tsubai if (IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) {
990 1.1 tsubai gmac_write_reg(sc, GMAC_TXMACCONFIG, 6);
991 1.1 tsubai gmac_write_reg(sc, GMAC_XIFCONFIG, 1);
992 1.1 tsubai } else {
993 1.1 tsubai gmac_write_reg(sc, GMAC_TXMACCONFIG, 0);
994 1.1 tsubai gmac_write_reg(sc, GMAC_XIFCONFIG, 5);
995 1.1 tsubai }
996 1.1 tsubai
997 1.1 tsubai if (0) /* g-bit? */
998 1.1 tsubai gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 3);
999 1.1 tsubai else
1000 1.1 tsubai gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 0);
1001 1.1 tsubai
1002 1.1 tsubai gmac_start_txdma(sc);
1003 1.1 tsubai gmac_start_rxdma(sc);
1004 1.1 tsubai }
1005 1.1 tsubai
1006 1.1 tsubai void
1007 1.1 tsubai gmac_mii_tick(v)
1008 1.1 tsubai void *v;
1009 1.1 tsubai {
1010 1.1 tsubai struct gmac_softc *sc = v;
1011 1.1 tsubai int s;
1012 1.1 tsubai
1013 1.1 tsubai s = splnet();
1014 1.1 tsubai mii_tick(&sc->sc_mii);
1015 1.1 tsubai splx(s);
1016 1.1 tsubai
1017 1.3 thorpej callout_reset(&sc->sc_tick_ch, hz, gmac_mii_tick, sc);
1018 1.1 tsubai }
1019