if_gm.c revision 1.1
1 /* $NetBSD: if_gm.c,v 1.1 2000/02/27 18:00:55 tsubai Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Tsubai Masanari. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include "opt_inet.h" 30 #include "opt_ns.h" 31 #include "bpfilter.h" 32 33 #include <sys/param.h> 34 #include <sys/device.h> 35 #include <sys/ioctl.h> 36 #include <sys/kernel.h> 37 #include <sys/mbuf.h> 38 #include <sys/socket.h> 39 #include <sys/systm.h> 40 41 #include <vm/vm.h> 42 43 #include <net/if.h> 44 #include <net/if_ether.h> 45 #include <net/if_media.h> 46 47 #if NBPFILTER > 0 48 #include <net/bpf.h> 49 #endif 50 51 #ifdef INET 52 #include <netinet/in.h> 53 #include <netinet/if_inarp.h> 54 #endif 55 56 #include <dev/mii/mii.h> 57 #include <dev/mii/miivar.h> 58 59 #include <dev/pci/pcivar.h> 60 #include <dev/pci/pcireg.h> 61 #include <dev/pci/pcidevs.h> 62 63 #include <dev/ofw/openfirm.h> 64 #include <macppc/dev/if_gmreg.h> 65 #include <machine/pio.h> 66 67 #define NTXBUF 4 68 #define NRXBUF 32 69 70 struct gmac_softc { 71 struct device sc_dev; 72 struct ethercom sc_ethercom; 73 vaddr_t sc_reg; 74 struct gmac_dma *sc_txlist; 75 struct gmac_dma *sc_rxlist; 76 int sc_txnext; 77 int sc_rxlast; 78 caddr_t sc_txbuf[NTXBUF]; 79 caddr_t sc_rxbuf[NRXBUF]; 80 struct mii_data sc_mii; 81 char sc_laddr[6]; 82 }; 83 84 #define sc_if sc_ethercom.ec_if 85 86 int gmac_match __P((struct device *, struct cfdata *, void *)); 87 void gmac_attach __P((struct device *, struct device *, void *)); 88 89 static __inline u_int gmac_read_reg __P((struct gmac_softc *, int)); 90 static __inline void gmac_write_reg __P((struct gmac_softc *, int, u_int)); 91 92 static __inline void gmac_start_txdma __P((struct gmac_softc *)); 93 static __inline void gmac_start_rxdma __P((struct gmac_softc *)); 94 static __inline void gmac_stop_txdma __P((struct gmac_softc *)); 95 static __inline void gmac_stop_rxdma __P((struct gmac_softc *)); 96 97 int gmac_intr __P((void *)); 98 void gmac_tint __P((struct gmac_softc *)); 99 void gmac_rint __P((struct gmac_softc *)); 100 struct mbuf * gmac_get __P((struct gmac_softc *, caddr_t, int)); 101 void gmac_start __P((struct ifnet *)); 102 int gmac_put __P((struct gmac_softc *, caddr_t, struct mbuf *)); 103 104 void gmac_stop __P((struct gmac_softc *)); 105 void gmac_reset __P((struct gmac_softc *)); 106 void gmac_init __P((struct gmac_softc *)); 107 void gmac_init_mac __P((struct gmac_softc *)); 108 109 int gmac_ioctl __P((struct ifnet *, u_long, caddr_t)); 110 void gmac_watchdog __P((struct ifnet *)); 111 112 int gmac_mediachange __P((struct ifnet *)); 113 void gmac_mediastatus __P((struct ifnet *, struct ifmediareq *)); 114 int gmac_mii_readreg __P((struct device *, int, int)); 115 void gmac_mii_writereg __P((struct device *, int, int, int)); 116 void gmac_mii_statchg __P((struct device *)); 117 void gmac_mii_tick __P((void *)); 118 119 struct cfattach gm_ca = { 120 sizeof(struct gmac_softc), gmac_match, gmac_attach 121 }; 122 123 int 124 gmac_match(parent, match, aux) 125 struct device *parent; 126 struct cfdata *match; 127 void *aux; 128 { 129 struct pci_attach_args *pa = aux; 130 131 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE && 132 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC) 133 return 1; 134 135 return 0; 136 } 137 138 void 139 gmac_attach(parent, self, aux) 140 struct device *parent, *self; 141 void *aux; 142 { 143 struct gmac_softc *sc = (void *)self; 144 struct pci_attach_args *pa = aux; 145 struct ifnet *ifp = &sc->sc_if; 146 struct mii_data *mii = &sc->sc_mii; 147 pci_intr_handle_t ih; 148 const char *intrstr = NULL; 149 int node, i; 150 char *p; 151 struct gmac_dma *dp; 152 u_int32_t reg[10]; 153 u_char laddr[6]; 154 155 node = pcidev_to_ofdev(pa->pa_pc, pa->pa_tag); 156 if (node == 0) { 157 printf(": cannot find gmac node\n"); 158 return; 159 } 160 161 OF_getprop(node, "local-mac-address", laddr, sizeof laddr); 162 OF_getprop(node, "assigned-addresses", reg, sizeof reg); 163 164 bcopy(laddr, sc->sc_laddr, sizeof laddr); 165 sc->sc_reg = reg[2]; 166 167 if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin, 168 pa->pa_intrline, &ih)) { 169 printf(": unable to map interrupt\n"); 170 return; 171 } 172 intrstr = pci_intr_string(pa->pa_pc, ih); 173 174 if (pci_intr_establish(pa->pa_pc, ih, IPL_NET, gmac_intr, sc) == NULL) { 175 printf(": unable to establish interrupt"); 176 if (intrstr) 177 printf(" at %s", intrstr); 178 printf("\n"); 179 return; 180 } 181 182 /* Setup packet buffers and dma descriptors. */ 183 p = malloc((NRXBUF + NTXBUF) * 2048 + 3 * 0x800, M_DEVBUF, M_NOWAIT); 184 if (p == NULL) { 185 printf(": cannot malloc buffers\n"); 186 return; 187 } 188 p = (void *)roundup((vaddr_t)p, 0x800); 189 bzero(p, 2048 * (NRXBUF + NTXBUF) + 2 * 0x800); 190 sc->sc_rxlist = (void *)(p + 2048 * (NRXBUF + NTXBUF)); 191 sc->sc_txlist = (void *)(p + 2048 * (NRXBUF + NTXBUF) + 0x800); 192 193 dp = sc->sc_rxlist; 194 for (i = 0; i < NRXBUF; i++) { 195 sc->sc_rxbuf[i] = p; 196 dp->address = htole32(vtophys(p)); 197 dp->cmd = htole32(GMAC_OWN); 198 dp++; 199 p += 2048; 200 } 201 202 dp = sc->sc_txlist; 203 for (i = 0; i < NTXBUF; i++) { 204 sc->sc_txbuf[i] = p; 205 dp->address = htole32(vtophys(p)); 206 dp++; 207 p += 2048; 208 } 209 210 gmac_reset(sc); 211 212 printf(": Ethernet address %s\n", ether_sprintf(laddr)); 213 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 214 215 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 216 ifp->if_softc = sc; 217 ifp->if_ioctl = gmac_ioctl; 218 ifp->if_start = gmac_start; 219 ifp->if_watchdog = gmac_watchdog; 220 ifp->if_flags = 221 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 222 ifp->if_flags |= IFF_ALLMULTI; 223 224 mii->mii_ifp = ifp; 225 mii->mii_readreg = gmac_mii_readreg; 226 mii->mii_writereg = gmac_mii_writereg; 227 mii->mii_statchg = gmac_mii_statchg; 228 229 ifmedia_init(&mii->mii_media, 0, gmac_mediachange, gmac_mediastatus); 230 mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0); 231 232 /* Choose a default media. */ 233 if (LIST_FIRST(&mii->mii_phys) == NULL) { 234 ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 235 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_NONE); 236 } else 237 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO); 238 239 if_attach(ifp); 240 ether_ifattach(ifp, laddr); 241 242 #if NBPFILTER > 0 243 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 244 #endif 245 } 246 247 u_int 248 gmac_read_reg(sc, reg) 249 struct gmac_softc *sc; 250 int reg; 251 { 252 return in32rb(sc->sc_reg + reg); 253 } 254 255 void 256 gmac_write_reg(sc, reg, val) 257 struct gmac_softc *sc; 258 int reg; 259 u_int val; 260 { 261 out32rb(sc->sc_reg + reg, val); 262 } 263 264 void 265 gmac_start_txdma(sc) 266 struct gmac_softc *sc; 267 { 268 u_int x; 269 270 x = gmac_read_reg(sc, GMAC_TXDMACONFIG); 271 x |= 1; 272 gmac_write_reg(sc, GMAC_TXDMACONFIG, x); 273 x = gmac_read_reg(sc, GMAC_TXMACCONFIG); 274 x |= 1; 275 gmac_write_reg(sc, GMAC_TXMACCONFIG, x); 276 } 277 278 void 279 gmac_start_rxdma(sc) 280 struct gmac_softc *sc; 281 { 282 u_int x; 283 284 x = gmac_read_reg(sc, GMAC_RXDMACONFIG); 285 x |= 1; 286 gmac_write_reg(sc, GMAC_RXDMACONFIG, x); 287 x = gmac_read_reg(sc, GMAC_RXMACCONFIG); 288 x |= 1; 289 gmac_write_reg(sc, GMAC_RXMACCONFIG, x); 290 } 291 292 void 293 gmac_stop_txdma(sc) 294 struct gmac_softc *sc; 295 { 296 u_int x; 297 298 x = gmac_read_reg(sc, GMAC_TXDMACONFIG); 299 x &= ~1; 300 gmac_write_reg(sc, GMAC_TXDMACONFIG, x); 301 x = gmac_read_reg(sc, GMAC_TXMACCONFIG); 302 x &= ~1; 303 gmac_write_reg(sc, GMAC_TXMACCONFIG, x); 304 } 305 306 void 307 gmac_stop_rxdma(sc) 308 struct gmac_softc *sc; 309 { 310 u_int x; 311 312 x = gmac_read_reg(sc, GMAC_RXDMACONFIG); 313 x &= ~1; 314 gmac_write_reg(sc, GMAC_RXDMACONFIG, x); 315 x = gmac_read_reg(sc, GMAC_RXMACCONFIG); 316 x &= ~1; 317 gmac_write_reg(sc, GMAC_RXMACCONFIG, x); 318 } 319 320 int 321 gmac_intr(v) 322 void *v; 323 { 324 struct gmac_softc *sc = v; 325 u_int status; 326 327 status = gmac_read_reg(sc, GMAC_STATUS) & 0xff; 328 if (status == 0) 329 return 0; 330 331 if (status & GMAC_INT_RXDONE) 332 gmac_rint(sc); 333 334 if (status & GMAC_INT_TXDONE) 335 gmac_tint(sc); 336 337 return 1; 338 } 339 340 void 341 gmac_tint(sc) 342 struct gmac_softc *sc; 343 { 344 struct ifnet *ifp = &sc->sc_if; 345 volatile struct gmac_dma *dp; 346 int i; 347 348 i = sc->sc_txlast; 349 dp = &sc->sc_txlist[i]; 350 __asm __volatile ("sync"); 351 352 ifp->if_flags &= ~IFF_OACTIVE; 353 ifp->if_timer = 0; 354 ifp->if_opackets++; 355 gmac_start(ifp); 356 } 357 358 void 359 gmac_rint(sc) 360 struct gmac_softc *sc; 361 { 362 struct ifnet *ifp = &sc->sc_if; 363 volatile struct gmac_dma *dp; 364 struct mbuf *m; 365 int i, len; 366 u_int cmd; 367 368 for (i = sc->sc_rxlast;; i++) { 369 if (i == NRXBUF) 370 i = 0; 371 372 dp = &sc->sc_rxlist[i]; 373 cmd = le32toh(dp->cmd); 374 if (cmd & GMAC_OWN) 375 break; 376 len = (cmd >> 16) & GMAC_LEN_MASK; 377 len -= 4; /* CRC */ 378 379 if (le32toh(dp->cmd_hi) & 0x40000000) { 380 ifp->if_ierrors++; 381 goto next; 382 } 383 384 m = gmac_get(sc, sc->sc_rxbuf[i], len); 385 if (m == NULL) { 386 ifp->if_ierrors++; 387 goto next; 388 } 389 390 #if NBPFILTER > 0 391 /* 392 * Check if there's a BPF listener on this interface. 393 * If so, hand off the raw packet to BPF. 394 */ 395 if (ifp->if_bpf) 396 bpf_tap(ifp->if_bpf, sc->sc_rxbuf[i], len); 397 #endif 398 (*ifp->if_input)(ifp, m); 399 ifp->if_ipackets++; 400 401 next: 402 dp->cmd_hi = 0; 403 __asm __volatile ("sync"); 404 dp->cmd = htole32(GMAC_OWN); 405 } 406 sc->sc_rxlast = i; 407 } 408 409 struct mbuf * 410 gmac_get(sc, pkt, totlen) 411 struct gmac_softc *sc; 412 caddr_t pkt; 413 int totlen; 414 { 415 struct mbuf *m; 416 struct mbuf *top, **mp; 417 int len; 418 419 MGETHDR(m, M_DONTWAIT, MT_DATA); 420 if (m == 0) 421 return 0; 422 m->m_pkthdr.rcvif = &sc->sc_if; 423 m->m_pkthdr.len = totlen; 424 len = MHLEN; 425 top = 0; 426 mp = ⊤ 427 428 while (totlen > 0) { 429 if (top) { 430 MGET(m, M_DONTWAIT, MT_DATA); 431 if (m == 0) { 432 m_freem(top); 433 return 0; 434 } 435 len = MLEN; 436 } 437 if (totlen >= MINCLSIZE) { 438 MCLGET(m, M_DONTWAIT); 439 if ((m->m_flags & M_EXT) == 0) { 440 m_free(m); 441 m_freem(top); 442 return 0; 443 } 444 len = MCLBYTES; 445 } 446 m->m_len = len = min(totlen, len); 447 bcopy(pkt, mtod(m, caddr_t), len); 448 pkt += len; 449 totlen -= len; 450 *mp = m; 451 mp = &m->m_next; 452 } 453 454 return top; 455 } 456 457 void 458 gmac_start(ifp) 459 struct ifnet *ifp; 460 { 461 struct gmac_softc *sc = ifp->if_softc; 462 struct mbuf *m; 463 caddr_t buff; 464 int i, tlen; 465 volatile struct gmac_dma *dp; 466 467 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 468 return; 469 470 for (;;) { 471 if (ifp->if_flags & IFF_OACTIVE) 472 break; 473 474 IF_DEQUEUE(&ifp->if_snd, m); 475 if (m == 0) 476 break; 477 478 ifp->if_flags |= IFF_OACTIVE; 479 480 /* 5 seconds to watch for failing to transmit */ 481 ifp->if_timer = 5; 482 ifp->if_opackets++; /* # of pkts */ 483 484 #if 0 485 i = sc->sc_txnext; 486 #else 487 i = 0; 488 #endif 489 buff = sc->sc_txbuf[i]; 490 tlen = gmac_put(sc, buff, m); 491 492 dp = &sc->sc_txlist[i]; 493 dp->cmd_hi = 0; 494 dp->address_hi = 0; 495 dp->cmd = htole32(tlen | GMAC_OWN | GMAC_SOP); 496 497 i++; 498 if (i == NTXBUF) 499 i = 0; 500 __asm __volatile ("sync"); 501 502 gmac_write_reg(sc, GMAC_TXDMAKICK, i); 503 sc->sc_txnext = i; 504 505 #if NBPFILTER > 0 506 /* 507 * If BPF is listening on this interface, let it see the 508 * packet before we commit it to the wire. 509 */ 510 if (ifp->if_bpf) 511 bpf_tap(ifp->if_bpf, buff, tlen); 512 #endif 513 } 514 } 515 516 int 517 gmac_put(sc, buff, m) 518 struct gmac_softc *sc; 519 caddr_t buff; 520 struct mbuf *m; 521 { 522 struct mbuf *n; 523 int len, tlen = 0; 524 525 for (; m; m = n) { 526 len = m->m_len; 527 if (len == 0) { 528 MFREE(m, n); 529 continue; 530 } 531 bcopy(mtod(m, caddr_t), buff, len); 532 buff += len; 533 tlen += len; 534 MFREE(m, n); 535 } 536 if (tlen > 2048) 537 panic("%s: gmac_put packet overflow", sc->sc_dev.dv_xname); 538 539 return tlen; 540 } 541 542 void 543 gmac_reset(sc) 544 struct gmac_softc *sc; 545 { 546 int i, s; 547 548 s = splnet(); 549 550 gmac_stop_txdma(sc); 551 gmac_stop_rxdma(sc); 552 553 gmac_write_reg(sc, GMAC_SOFTWARERESET, 3); 554 for (i = 10; i > 0; i--) { 555 delay(300000); /* XXX long delay */ 556 if (gmac_read_reg(sc, GMAC_SOFTWARERESET) == 0) 557 break; 558 } 559 splx(s); 560 561 if (i == 0) 562 printf("%s: reset timeout\n", sc->sc_dev.dv_xname); 563 } 564 565 void 566 gmac_stop(sc) 567 struct gmac_softc *sc; 568 { 569 struct ifnet *ifp = &sc->sc_if; 570 int s; 571 572 s = splnet(); 573 574 untimeout(gmac_mii_tick, sc); 575 mii_down(&sc->sc_mii); 576 577 gmac_stop_txdma(sc); 578 gmac_stop_rxdma(sc); 579 580 gmac_write_reg(sc, GMAC_INTMASK, 0xffffffff); 581 582 ifp->if_flags &= ~(IFF_UP | IFF_RUNNING); 583 ifp->if_timer = 0; 584 585 splx(s); 586 } 587 588 void 589 gmac_init_mac(sc) 590 struct gmac_softc *sc; 591 { 592 int i, tb; 593 char *laddr = sc->sc_laddr; 594 595 __asm ("mftb %0" : "=r"(tb)); 596 gmac_write_reg(sc, GMAC_RANDOMSEED, tb); 597 598 /* init-mii */ 599 gmac_write_reg(sc, GMAC_DATAPATHMODE, 4); 600 gmac_mii_writereg(&sc->sc_dev, 0, 0, 0x1000); 601 602 gmac_write_reg(sc, GMAC_TXDMACONFIG, 0xffc00); 603 gmac_write_reg(sc, GMAC_RXDMACONFIG, 0); 604 gmac_write_reg(sc, GMAC_MACPAUSE, 0x1bf0); 605 gmac_write_reg(sc, GMAC_INTERPACKETGAP0, 0); 606 gmac_write_reg(sc, GMAC_INTERPACKETGAP1, 8); 607 gmac_write_reg(sc, GMAC_INTERPACKETGAP2, 4); 608 gmac_write_reg(sc, GMAC_MINFRAMESIZE, ETHER_MIN_LEN); 609 gmac_write_reg(sc, GMAC_MAXFRAMESIZE, ETHER_MAX_LEN); 610 gmac_write_reg(sc, GMAC_PASIZE, 7); 611 gmac_write_reg(sc, GMAC_JAMSIZE, 4); 612 gmac_write_reg(sc, GMAC_ATTEMPTLIMIT,0x10); 613 gmac_write_reg(sc, GMAC_MACCNTLTYPE, 0x8808); 614 615 gmac_write_reg(sc, GMAC_MACADDRESS0, (laddr[4] << 8) | laddr[5]); 616 gmac_write_reg(sc, GMAC_MACADDRESS1, (laddr[2] << 8) | laddr[3]); 617 gmac_write_reg(sc, GMAC_MACADDRESS2, (laddr[0] << 8) | laddr[1]); 618 gmac_write_reg(sc, GMAC_MACADDRESS3, 0); 619 gmac_write_reg(sc, GMAC_MACADDRESS4, 0); 620 gmac_write_reg(sc, GMAC_MACADDRESS5, 0); 621 gmac_write_reg(sc, GMAC_MACADDRESS6, 1); 622 gmac_write_reg(sc, GMAC_MACADDRESS7, 0xc200); 623 gmac_write_reg(sc, GMAC_MACADDRESS8, 0x0180); 624 gmac_write_reg(sc, GMAC_MACADDRFILT0, 0); 625 gmac_write_reg(sc, GMAC_MACADDRFILT1, 0); 626 gmac_write_reg(sc, GMAC_MACADDRFILT2, 0); 627 gmac_write_reg(sc, GMAC_MACADDRFILT2_1MASK, 0); 628 gmac_write_reg(sc, GMAC_MACADDRFILT0MASK, 0); 629 630 for (i = 0; i < 0x6c; i+= 4) 631 gmac_write_reg(sc, GMAC_HASHTABLE0 + i, 0); 632 633 gmac_write_reg(sc, GMAC_SLOTTIME, 0x40); 634 635 /* XXX */ 636 gmac_write_reg(sc, GMAC_TXMACCONFIG, 0); 637 gmac_write_reg(sc, GMAC_XIFCONFIG, 5); 638 gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 0); 639 } 640 641 void 642 gmac_init(sc) 643 struct gmac_softc *sc; 644 { 645 struct ifnet *ifp = &sc->sc_if; 646 u_int x; 647 648 gmac_stop_txdma(sc); 649 gmac_stop_rxdma(sc); 650 651 gmac_init_mac(sc); 652 653 x = gmac_read_reg(sc, GMAC_RXMACCONFIG); 654 if (ifp->if_flags & IFF_PROMISC) 655 x |= GMAC_RXMAC_PR; 656 else 657 x &= ~GMAC_RXMAC_PR; 658 gmac_write_reg(sc, GMAC_RXMACCONFIG, x); 659 660 gmac_write_reg(sc, GMAC_TXDMADESCBASEHI, 0); 661 gmac_write_reg(sc, GMAC_TXDMADESCBASELO, vtophys(sc->sc_txlist)); 662 gmac_write_reg(sc, GMAC_RXDMADESCBASEHI, 0); 663 gmac_write_reg(sc, GMAC_RXDMADESCBASELO, vtophys(sc->sc_rxlist)); 664 665 gmac_start_txdma(sc); 666 gmac_start_rxdma(sc); 667 gmac_write_reg(sc, GMAC_RXDMAKICK, NRXBUF); 668 669 gmac_write_reg(sc, GMAC_INTMASK, ~(GMAC_INT_TXDONE | GMAC_INT_RXDONE)); 670 671 ifp->if_flags |= IFF_RUNNING; 672 ifp->if_flags &= ~IFF_OACTIVE; 673 ifp->if_timer = 0; 674 675 untimeout(gmac_mii_tick, sc); 676 timeout(gmac_mii_tick, sc, 1); 677 678 gmac_start(ifp); 679 } 680 681 int 682 gmac_ioctl(ifp, cmd, data) 683 struct ifnet *ifp; 684 u_long cmd; 685 caddr_t data; 686 { 687 struct gmac_softc *sc = ifp->if_softc; 688 struct ifaddr *ifa = (struct ifaddr *)data; 689 struct ifreq *ifr = (struct ifreq *)data; 690 int s, error = 0; 691 692 s = splnet(); 693 694 switch (cmd) { 695 696 case SIOCSIFADDR: 697 ifp->if_flags |= IFF_UP; 698 699 switch (ifa->ifa_addr->sa_family) { 700 #ifdef INET 701 case AF_INET: 702 gmac_init(sc); 703 arp_ifinit(ifp, ifa); 704 break; 705 #endif 706 #ifdef NS 707 case AF_NS: 708 { 709 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 710 711 if (ns_nullhost(*ina)) 712 ina->x_host = 713 *(union ns_host *)LLADDR(ifp->if_sadl); 714 else { 715 bcopy(ina->x_host.c_host, 716 LLADDR(ifp->if_sadl), 717 sizeof(sc->sc_enaddr)); 718 } 719 /* Set new address. */ 720 gmac_init(sc); 721 break; 722 } 723 #endif 724 default: 725 gmac_init(sc); 726 break; 727 } 728 break; 729 730 case SIOCSIFFLAGS: 731 if ((ifp->if_flags & IFF_UP) == 0 && 732 (ifp->if_flags & IFF_RUNNING) != 0) { 733 /* 734 * If interface is marked down and it is running, then 735 * stop it. 736 */ 737 gmac_stop(sc); 738 ifp->if_flags &= ~IFF_RUNNING; 739 } else if ((ifp->if_flags & IFF_UP) != 0 && 740 (ifp->if_flags & IFF_RUNNING) == 0) { 741 /* 742 * If interface is marked up and it is stopped, then 743 * start it. 744 */ 745 gmac_init(sc); 746 } else { 747 /* 748 * Reset the interface to pick up changes in any other 749 * flags that affect hardware registers. 750 */ 751 /* gmac_reset(sc); */ 752 gmac_init(sc); 753 } 754 #ifdef GMAC_DEBUG 755 if (ifp->if_flags & IFF_DEBUG) 756 sc->sc_flags |= GMAC_DEBUGFLAG; 757 #endif 758 break; 759 760 case SIOCADDMULTI: 761 case SIOCDELMULTI: 762 error = (cmd == SIOCADDMULTI) ? 763 ether_addmulti(ifr, &sc->sc_ethercom) : 764 ether_delmulti(ifr, &sc->sc_ethercom); 765 766 if (error == ENETRESET) { 767 /* 768 * Multicast list has changed; set the hardware filter 769 * accordingly. 770 */ 771 gmac_init(sc); 772 /* gmac_setladrf(sc); */ 773 error = 0; 774 } 775 break; 776 777 case SIOCGIFMEDIA: 778 case SIOCSIFMEDIA: 779 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 780 break; 781 782 default: 783 error = EINVAL; 784 } 785 786 splx(s); 787 return error; 788 } 789 790 void 791 gmac_watchdog(ifp) 792 struct ifnet *ifp; 793 { 794 struct gmac_softc *sc = ifp->if_softc; 795 796 printf("%s: device timeout\n", ifp->if_xname); 797 ifp->if_oerrors++; 798 799 gmac_reset(sc); 800 gmac_init(sc); 801 } 802 803 int 804 gmac_mediachange(ifp) 805 struct ifnet *ifp; 806 { 807 struct gmac_softc *sc = ifp->if_softc; 808 809 return mii_mediachg(&sc->sc_mii); 810 } 811 812 void 813 gmac_mediastatus(ifp, ifmr) 814 struct ifnet *ifp; 815 struct ifmediareq *ifmr; 816 { 817 struct gmac_softc *sc = ifp->if_softc; 818 819 mii_pollstat(&sc->sc_mii); 820 821 ifmr->ifm_status = sc->sc_mii.mii_media_status; 822 ifmr->ifm_active = sc->sc_mii.mii_media_active; 823 } 824 825 int 826 gmac_mii_readreg(dev, phy, reg) 827 struct device *dev; 828 int phy, reg; 829 { 830 struct gmac_softc *sc = (void *)dev; 831 int i; 832 833 gmac_write_reg(sc, GMAC_MIFFRAMEOUTPUT, 834 0x60020000 | (phy << 23) | (reg << 18)); 835 836 for (i = 1000; i >= 0; i -= 10) { 837 if (gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0x10000) 838 break; 839 delay(10); 840 } 841 if (i < 0) { 842 printf("%s: gmac_mii_readreg: timeout\n", sc->sc_dev.dv_xname); 843 return 0; 844 } 845 846 return gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0xffff; 847 } 848 849 void 850 gmac_mii_writereg(dev, phy, reg, val) 851 struct device *dev; 852 int phy, reg, val; 853 { 854 struct gmac_softc *sc = (void *)dev; 855 int i; 856 857 gmac_write_reg(sc, GMAC_MIFFRAMEOUTPUT, 858 0x50020000 | (phy << 23) | (reg << 18) | (val & 0xffff)); 859 860 for (i = 1000; i >= 0; i -= 10) { 861 if (gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0x10000) 862 break; 863 delay(10); 864 } 865 if (i < 0) 866 printf("%s: gmac_mii_writereg: timeout\n", sc->sc_dev.dv_xname); 867 } 868 869 void 870 gmac_mii_statchg(dev) 871 struct device *dev; 872 { 873 struct gmac_softc *sc = (void *)dev; 874 875 gmac_stop_txdma(sc); 876 gmac_stop_rxdma(sc); 877 878 if (IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) { 879 gmac_write_reg(sc, GMAC_TXMACCONFIG, 6); 880 gmac_write_reg(sc, GMAC_XIFCONFIG, 1); 881 } else { 882 gmac_write_reg(sc, GMAC_TXMACCONFIG, 0); 883 gmac_write_reg(sc, GMAC_XIFCONFIG, 5); 884 } 885 886 if (0) /* g-bit? */ 887 gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 3); 888 else 889 gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 0); 890 891 gmac_start_txdma(sc); 892 gmac_start_rxdma(sc); 893 } 894 895 void 896 gmac_mii_tick(v) 897 void *v; 898 { 899 struct gmac_softc *sc = v; 900 int s; 901 902 s = splnet(); 903 mii_tick(&sc->sc_mii); 904 splx(s); 905 906 timeout(gmac_mii_tick, sc, hz); 907 } 908
Indexes created Tue Sep 30 20:09:53 GMT 2025