if_gm.c revision 1.14
1 /* $NetBSD: if_gm.c,v 1.14 2001/07/22 11:29:46 wiz Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Tsubai Masanari. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include "opt_inet.h" 30 #include "opt_ns.h" 31 #include "bpfilter.h" 32 33 #include <sys/param.h> 34 #include <sys/device.h> 35 #include <sys/ioctl.h> 36 #include <sys/kernel.h> 37 #include <sys/mbuf.h> 38 #include <sys/socket.h> 39 #include <sys/systm.h> 40 #include <sys/callout.h> 41 42 #include <uvm/uvm_extern.h> 43 44 #include <net/if.h> 45 #include <net/if_ether.h> 46 #include <net/if_media.h> 47 48 #if NBPFILTER > 0 49 #include <net/bpf.h> 50 #endif 51 52 #ifdef INET 53 #include <netinet/in.h> 54 #include <netinet/if_inarp.h> 55 #endif 56 57 #include <dev/mii/mii.h> 58 #include <dev/mii/miivar.h> 59 60 #include <dev/pci/pcivar.h> 61 #include <dev/pci/pcireg.h> 62 #include <dev/pci/pcidevs.h> 63 64 #include <dev/ofw/openfirm.h> 65 #include <macppc/dev/if_gmreg.h> 66 #include <machine/pio.h> 67 68 #define NTXBUF 4 69 #define NRXBUF 32 70 71 struct gmac_softc { 72 struct device sc_dev; 73 struct ethercom sc_ethercom; 74 vaddr_t sc_reg; 75 struct gmac_dma *sc_txlist; 76 struct gmac_dma *sc_rxlist; 77 int sc_txnext; 78 int sc_rxlast; 79 caddr_t sc_txbuf[NTXBUF]; 80 caddr_t sc_rxbuf[NRXBUF]; 81 struct mii_data sc_mii; 82 struct callout sc_tick_ch; 83 char sc_laddr[6]; 84 }; 85 86 #define sc_if sc_ethercom.ec_if 87 88 int gmac_match __P((struct device *, struct cfdata *, void *)); 89 void gmac_attach __P((struct device *, struct device *, void *)); 90 91 static __inline u_int gmac_read_reg __P((struct gmac_softc *, int)); 92 static __inline void gmac_write_reg __P((struct gmac_softc *, int, u_int)); 93 94 static __inline void gmac_start_txdma __P((struct gmac_softc *)); 95 static __inline void gmac_start_rxdma __P((struct gmac_softc *)); 96 static __inline void gmac_stop_txdma __P((struct gmac_softc *)); 97 static __inline void gmac_stop_rxdma __P((struct gmac_softc *)); 98 99 int gmac_intr __P((void *)); 100 void gmac_tint __P((struct gmac_softc *)); 101 void gmac_rint __P((struct gmac_softc *)); 102 struct mbuf * gmac_get __P((struct gmac_softc *, caddr_t, int)); 103 void gmac_start __P((struct ifnet *)); 104 int gmac_put __P((struct gmac_softc *, caddr_t, struct mbuf *)); 105 106 void gmac_stop __P((struct gmac_softc *)); 107 void gmac_reset __P((struct gmac_softc *)); 108 void gmac_init __P((struct gmac_softc *)); 109 void gmac_init_mac __P((struct gmac_softc *)); 110 void gmac_setladrf __P((struct gmac_softc *)); 111 112 int gmac_ioctl __P((struct ifnet *, u_long, caddr_t)); 113 void gmac_watchdog __P((struct ifnet *)); 114 115 int gmac_mediachange __P((struct ifnet *)); 116 void gmac_mediastatus __P((struct ifnet *, struct ifmediareq *)); 117 int gmac_mii_readreg __P((struct device *, int, int)); 118 void gmac_mii_writereg __P((struct device *, int, int, int)); 119 void gmac_mii_statchg __P((struct device *)); 120 void gmac_mii_tick __P((void *)); 121 122 struct cfattach gm_ca = { 123 sizeof(struct gmac_softc), gmac_match, gmac_attach 124 }; 125 126 int 127 gmac_match(parent, match, aux) 128 struct device *parent; 129 struct cfdata *match; 130 void *aux; 131 { 132 struct pci_attach_args *pa = aux; 133 134 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE && 135 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC || 136 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC2)) 137 return 1; 138 139 return 0; 140 } 141 142 void 143 gmac_attach(parent, self, aux) 144 struct device *parent, *self; 145 void *aux; 146 { 147 struct gmac_softc *sc = (void *)self; 148 struct pci_attach_args *pa = aux; 149 struct ifnet *ifp = &sc->sc_if; 150 struct mii_data *mii = &sc->sc_mii; 151 pci_intr_handle_t ih; 152 const char *intrstr = NULL; 153 int node, i; 154 char *p; 155 struct gmac_dma *dp; 156 u_int32_t reg[10]; 157 u_char laddr[6]; 158 159 node = pcidev_to_ofdev(pa->pa_pc, pa->pa_tag); 160 if (node == 0) { 161 printf(": cannot find gmac node\n"); 162 return; 163 } 164 165 OF_getprop(node, "local-mac-address", laddr, sizeof laddr); 166 OF_getprop(node, "assigned-addresses", reg, sizeof reg); 167 168 memcpy(sc->sc_laddr, laddr, sizeof laddr); 169 sc->sc_reg = reg[2]; 170 171 if (pci_intr_map(pa, &ih)) { 172 printf(": unable to map interrupt\n"); 173 return; 174 } 175 intrstr = pci_intr_string(pa->pa_pc, ih); 176 177 if (pci_intr_establish(pa->pa_pc, ih, IPL_NET, gmac_intr, sc) == NULL) { 178 printf(": unable to establish interrupt"); 179 if (intrstr) 180 printf(" at %s", intrstr); 181 printf("\n"); 182 return; 183 } 184 185 /* Setup packet buffers and dma descriptors. */ 186 p = malloc((NRXBUF + NTXBUF) * 2048 + 3 * 0x800, M_DEVBUF, M_NOWAIT); 187 if (p == NULL) { 188 printf(": cannot malloc buffers\n"); 189 return; 190 } 191 p = (void *)roundup((vaddr_t)p, 0x800); 192 memset(p, 0, 2048 * (NRXBUF + NTXBUF) + 2 * 0x800); 193 194 sc->sc_rxlist = (void *)p; 195 p += 0x800; 196 sc->sc_txlist = (void *)p; 197 p += 0x800; 198 199 dp = sc->sc_rxlist; 200 for (i = 0; i < NRXBUF; i++) { 201 sc->sc_rxbuf[i] = p; 202 dp->address = htole32(vtophys((vaddr_t)p)); 203 dp->cmd = htole32(GMAC_OWN); 204 dp++; 205 p += 2048; 206 } 207 208 dp = sc->sc_txlist; 209 for (i = 0; i < NTXBUF; i++) { 210 sc->sc_txbuf[i] = p; 211 dp->address = htole32(vtophys((vaddr_t)p)); 212 dp++; 213 p += 2048; 214 } 215 216 printf(": Ethernet address %s\n", ether_sprintf(laddr)); 217 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 218 219 callout_init(&sc->sc_tick_ch); 220 221 gmac_reset(sc); 222 gmac_init_mac(sc); 223 224 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 225 ifp->if_softc = sc; 226 ifp->if_ioctl = gmac_ioctl; 227 ifp->if_start = gmac_start; 228 ifp->if_watchdog = gmac_watchdog; 229 ifp->if_flags = 230 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 231 232 mii->mii_ifp = ifp; 233 mii->mii_readreg = gmac_mii_readreg; 234 mii->mii_writereg = gmac_mii_writereg; 235 mii->mii_statchg = gmac_mii_statchg; 236 237 ifmedia_init(&mii->mii_media, 0, gmac_mediachange, gmac_mediastatus); 238 mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0); 239 240 /* Choose a default media. */ 241 if (LIST_FIRST(&mii->mii_phys) == NULL) { 242 ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 243 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_NONE); 244 } else 245 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO); 246 247 if_attach(ifp); 248 ether_ifattach(ifp, laddr); 249 } 250 251 u_int 252 gmac_read_reg(sc, reg) 253 struct gmac_softc *sc; 254 int reg; 255 { 256 return in32rb(sc->sc_reg + reg); 257 } 258 259 void 260 gmac_write_reg(sc, reg, val) 261 struct gmac_softc *sc; 262 int reg; 263 u_int val; 264 { 265 out32rb(sc->sc_reg + reg, val); 266 } 267 268 void 269 gmac_start_txdma(sc) 270 struct gmac_softc *sc; 271 { 272 u_int x; 273 274 x = gmac_read_reg(sc, GMAC_TXDMACONFIG); 275 x |= 1; 276 gmac_write_reg(sc, GMAC_TXDMACONFIG, x); 277 x = gmac_read_reg(sc, GMAC_TXMACCONFIG); 278 x |= 1; 279 gmac_write_reg(sc, GMAC_TXMACCONFIG, x); 280 } 281 282 void 283 gmac_start_rxdma(sc) 284 struct gmac_softc *sc; 285 { 286 u_int x; 287 288 x = gmac_read_reg(sc, GMAC_RXDMACONFIG); 289 x |= 1; 290 gmac_write_reg(sc, GMAC_RXDMACONFIG, x); 291 x = gmac_read_reg(sc, GMAC_RXMACCONFIG); 292 x |= 1; 293 gmac_write_reg(sc, GMAC_RXMACCONFIG, x); 294 } 295 296 void 297 gmac_stop_txdma(sc) 298 struct gmac_softc *sc; 299 { 300 u_int x; 301 302 x = gmac_read_reg(sc, GMAC_TXDMACONFIG); 303 x &= ~1; 304 gmac_write_reg(sc, GMAC_TXDMACONFIG, x); 305 x = gmac_read_reg(sc, GMAC_TXMACCONFIG); 306 x &= ~1; 307 gmac_write_reg(sc, GMAC_TXMACCONFIG, x); 308 } 309 310 void 311 gmac_stop_rxdma(sc) 312 struct gmac_softc *sc; 313 { 314 u_int x; 315 316 x = gmac_read_reg(sc, GMAC_RXDMACONFIG); 317 x &= ~1; 318 gmac_write_reg(sc, GMAC_RXDMACONFIG, x); 319 x = gmac_read_reg(sc, GMAC_RXMACCONFIG); 320 x &= ~1; 321 gmac_write_reg(sc, GMAC_RXMACCONFIG, x); 322 } 323 324 int 325 gmac_intr(v) 326 void *v; 327 { 328 struct gmac_softc *sc = v; 329 u_int status; 330 331 status = gmac_read_reg(sc, GMAC_STATUS) & 0xff; 332 if (status == 0) 333 return 0; 334 335 if (status & GMAC_INT_RXDONE) 336 gmac_rint(sc); 337 338 if (status & GMAC_INT_TXEMPTY) 339 gmac_tint(sc); 340 341 return 1; 342 } 343 344 void 345 gmac_tint(sc) 346 struct gmac_softc *sc; 347 { 348 struct ifnet *ifp = &sc->sc_if; 349 350 ifp->if_flags &= ~IFF_OACTIVE; 351 ifp->if_timer = 0; 352 gmac_start(ifp); 353 } 354 355 void 356 gmac_rint(sc) 357 struct gmac_softc *sc; 358 { 359 struct ifnet *ifp = &sc->sc_if; 360 volatile struct gmac_dma *dp; 361 struct mbuf *m; 362 int i, j, len; 363 u_int cmd; 364 365 for (i = sc->sc_rxlast;; i++) { 366 if (i == NRXBUF) 367 i = 0; 368 369 dp = &sc->sc_rxlist[i]; 370 cmd = le32toh(dp->cmd); 371 if (cmd & GMAC_OWN) 372 break; 373 len = (cmd >> 16) & GMAC_LEN_MASK; 374 len -= 4; /* CRC */ 375 376 if (le32toh(dp->cmd_hi) & 0x40000000) { 377 ifp->if_ierrors++; 378 goto next; 379 } 380 381 m = gmac_get(sc, sc->sc_rxbuf[i], len); 382 if (m == NULL) { 383 ifp->if_ierrors++; 384 goto next; 385 } 386 387 #if NBPFILTER > 0 388 /* 389 * Check if there's a BPF listener on this interface. 390 * If so, hand off the raw packet to BPF. 391 */ 392 if (ifp->if_bpf) 393 bpf_tap(ifp->if_bpf, sc->sc_rxbuf[i], len); 394 #endif 395 (*ifp->if_input)(ifp, m); 396 ifp->if_ipackets++; 397 398 next: 399 dp->cmd_hi = 0; 400 __asm __volatile ("sync"); 401 dp->cmd = htole32(GMAC_OWN); 402 } 403 sc->sc_rxlast = i; 404 405 /* XXX Make sure free buffers have GMAC_OWN. */ 406 i++; 407 for (j = 1; j < NRXBUF; j++) { 408 if (i == NRXBUF) 409 i = 0; 410 dp = &sc->sc_rxlist[i++]; 411 dp->cmd = htole32(GMAC_OWN); 412 } 413 } 414 415 struct mbuf * 416 gmac_get(sc, pkt, totlen) 417 struct gmac_softc *sc; 418 caddr_t pkt; 419 int totlen; 420 { 421 struct mbuf *m; 422 struct mbuf *top, **mp; 423 int len; 424 425 MGETHDR(m, M_DONTWAIT, MT_DATA); 426 if (m == 0) 427 return 0; 428 m->m_pkthdr.rcvif = &sc->sc_if; 429 m->m_pkthdr.len = totlen; 430 len = MHLEN; 431 top = 0; 432 mp = ⊤ 433 434 while (totlen > 0) { 435 if (top) { 436 MGET(m, M_DONTWAIT, MT_DATA); 437 if (m == 0) { 438 m_freem(top); 439 return 0; 440 } 441 len = MLEN; 442 } 443 if (totlen >= MINCLSIZE) { 444 MCLGET(m, M_DONTWAIT); 445 if ((m->m_flags & M_EXT) == 0) { 446 m_free(m); 447 m_freem(top); 448 return 0; 449 } 450 len = MCLBYTES; 451 } 452 m->m_len = len = min(totlen, len); 453 memcpy(mtod(m, caddr_t), pkt, len); 454 pkt += len; 455 totlen -= len; 456 *mp = m; 457 mp = &m->m_next; 458 } 459 460 return top; 461 } 462 463 void 464 gmac_start(ifp) 465 struct ifnet *ifp; 466 { 467 struct gmac_softc *sc = ifp->if_softc; 468 struct mbuf *m; 469 caddr_t buff; 470 int i, tlen; 471 volatile struct gmac_dma *dp; 472 473 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 474 return; 475 476 for (;;) { 477 if (ifp->if_flags & IFF_OACTIVE) 478 break; 479 480 IF_DEQUEUE(&ifp->if_snd, m); 481 if (m == 0) 482 break; 483 484 /* 5 seconds to watch for failing to transmit */ 485 ifp->if_timer = 5; 486 ifp->if_opackets++; /* # of pkts */ 487 488 i = sc->sc_txnext; 489 buff = sc->sc_txbuf[i]; 490 tlen = gmac_put(sc, buff, m); 491 492 dp = &sc->sc_txlist[i]; 493 dp->cmd_hi = 0; 494 dp->address_hi = 0; 495 dp->cmd = htole32(tlen | GMAC_OWN | GMAC_SOP); 496 497 i++; 498 if (i == NTXBUF) 499 i = 0; 500 __asm __volatile ("sync"); 501 502 gmac_write_reg(sc, GMAC_TXDMAKICK, i); 503 sc->sc_txnext = i; 504 505 #if NBPFILTER > 0 506 /* 507 * If BPF is listening on this interface, let it see the 508 * packet before we commit it to the wire. 509 */ 510 if (ifp->if_bpf) 511 bpf_tap(ifp->if_bpf, buff, tlen); 512 #endif 513 514 i++; 515 if (i == NTXBUF) 516 i = 0; 517 if (i == gmac_read_reg(sc, GMAC_TXDMACOMPLETE)) { 518 ifp->if_flags |= IFF_OACTIVE; 519 break; 520 } 521 } 522 } 523 524 int 525 gmac_put(sc, buff, m) 526 struct gmac_softc *sc; 527 caddr_t buff; 528 struct mbuf *m; 529 { 530 struct mbuf *n; 531 int len, tlen = 0; 532 533 for (; m; m = n) { 534 len = m->m_len; 535 if (len == 0) { 536 MFREE(m, n); 537 continue; 538 } 539 memcpy(buff, mtod(m, caddr_t), len); 540 buff += len; 541 tlen += len; 542 MFREE(m, n); 543 } 544 if (tlen > 2048) 545 panic("%s: gmac_put packet overflow", sc->sc_dev.dv_xname); 546 547 return tlen; 548 } 549 550 void 551 gmac_reset(sc) 552 struct gmac_softc *sc; 553 { 554 int i, s; 555 556 s = splnet(); 557 558 gmac_stop_txdma(sc); 559 gmac_stop_rxdma(sc); 560 561 gmac_write_reg(sc, GMAC_SOFTWARERESET, 3); 562 for (i = 10; i > 0; i--) { 563 delay(300000); /* XXX long delay */ 564 if ((gmac_read_reg(sc, GMAC_SOFTWARERESET) & 3) == 0) 565 break; 566 } 567 if (i == 0) 568 printf("%s: reset timeout\n", sc->sc_dev.dv_xname); 569 570 sc->sc_txnext = 0; 571 sc->sc_rxlast = 0; 572 for (i = 0; i < NRXBUF; i++) 573 sc->sc_rxlist[i].cmd = htole32(GMAC_OWN); 574 __asm __volatile ("sync"); 575 576 gmac_write_reg(sc, GMAC_TXDMADESCBASEHI, 0); 577 gmac_write_reg(sc, GMAC_TXDMADESCBASELO, 578 vtophys((vaddr_t)sc->sc_txlist)); 579 gmac_write_reg(sc, GMAC_RXDMADESCBASEHI, 0); 580 gmac_write_reg(sc, GMAC_RXDMADESCBASELO, 581 vtophys((vaddr_t)sc->sc_rxlist)); 582 gmac_write_reg(sc, GMAC_RXDMAKICK, NRXBUF); 583 584 splx(s); 585 } 586 587 void 588 gmac_stop(sc) 589 struct gmac_softc *sc; 590 { 591 struct ifnet *ifp = &sc->sc_if; 592 int s; 593 594 s = splnet(); 595 596 callout_stop(&sc->sc_tick_ch); 597 mii_down(&sc->sc_mii); 598 599 gmac_stop_txdma(sc); 600 gmac_stop_rxdma(sc); 601 602 gmac_write_reg(sc, GMAC_INTMASK, 0xffffffff); 603 604 ifp->if_flags &= ~(IFF_UP | IFF_RUNNING); 605 ifp->if_timer = 0; 606 607 splx(s); 608 } 609 610 void 611 gmac_init_mac(sc) 612 struct gmac_softc *sc; 613 { 614 int i, tb; 615 char *laddr = sc->sc_laddr; 616 617 __asm ("mftb %0" : "=r"(tb)); 618 gmac_write_reg(sc, GMAC_RANDOMSEED, tb); 619 620 /* init-mii */ 621 gmac_write_reg(sc, GMAC_DATAPATHMODE, 4); 622 gmac_mii_writereg(&sc->sc_dev, 0, 0, 0x1000); 623 624 gmac_write_reg(sc, GMAC_TXDMACONFIG, 0xffc00); 625 gmac_write_reg(sc, GMAC_RXDMACONFIG, 0); 626 gmac_write_reg(sc, GMAC_MACPAUSE, 0x1bf0); 627 gmac_write_reg(sc, GMAC_INTERPACKETGAP0, 0); 628 gmac_write_reg(sc, GMAC_INTERPACKETGAP1, 8); 629 gmac_write_reg(sc, GMAC_INTERPACKETGAP2, 4); 630 gmac_write_reg(sc, GMAC_MINFRAMESIZE, ETHER_MIN_LEN); 631 gmac_write_reg(sc, GMAC_MAXFRAMESIZE, ETHER_MAX_LEN); 632 gmac_write_reg(sc, GMAC_PASIZE, 7); 633 gmac_write_reg(sc, GMAC_JAMSIZE, 4); 634 gmac_write_reg(sc, GMAC_ATTEMPTLIMIT,0x10); 635 gmac_write_reg(sc, GMAC_MACCNTLTYPE, 0x8808); 636 637 gmac_write_reg(sc, GMAC_MACADDRESS0, (laddr[4] << 8) | laddr[5]); 638 gmac_write_reg(sc, GMAC_MACADDRESS1, (laddr[2] << 8) | laddr[3]); 639 gmac_write_reg(sc, GMAC_MACADDRESS2, (laddr[0] << 8) | laddr[1]); 640 gmac_write_reg(sc, GMAC_MACADDRESS3, 0); 641 gmac_write_reg(sc, GMAC_MACADDRESS4, 0); 642 gmac_write_reg(sc, GMAC_MACADDRESS5, 0); 643 gmac_write_reg(sc, GMAC_MACADDRESS6, 1); 644 gmac_write_reg(sc, GMAC_MACADDRESS7, 0xc200); 645 gmac_write_reg(sc, GMAC_MACADDRESS8, 0x0180); 646 gmac_write_reg(sc, GMAC_MACADDRFILT0, 0); 647 gmac_write_reg(sc, GMAC_MACADDRFILT1, 0); 648 gmac_write_reg(sc, GMAC_MACADDRFILT2, 0); 649 gmac_write_reg(sc, GMAC_MACADDRFILT2_1MASK, 0); 650 gmac_write_reg(sc, GMAC_MACADDRFILT0MASK, 0); 651 652 for (i = 0; i < 0x6c; i += 4) 653 gmac_write_reg(sc, GMAC_HASHTABLE0 + i, 0); 654 655 gmac_write_reg(sc, GMAC_SLOTTIME, 0x40); 656 657 if (IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) { 658 gmac_write_reg(sc, GMAC_TXMACCONFIG, 6); 659 gmac_write_reg(sc, GMAC_XIFCONFIG, 1); 660 } else { 661 gmac_write_reg(sc, GMAC_TXMACCONFIG, 0); 662 gmac_write_reg(sc, GMAC_XIFCONFIG, 5); 663 } 664 665 if (0) /* g-bit? */ 666 gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 3); 667 else 668 gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 0); 669 } 670 671 void 672 gmac_setladrf(sc) 673 struct gmac_softc *sc; 674 { 675 struct ifnet *ifp = &sc->sc_if; 676 struct ether_multi *enm; 677 struct ether_multistep step; 678 struct ethercom *ec = &sc->sc_ethercom; 679 u_int32_t crc; 680 u_int32_t hash[16]; 681 u_int v; 682 int i; 683 684 /* Clear hash table */ 685 for (i = 0; i < 16; i++) 686 hash[i] = 0; 687 688 /* Get current RX configuration */ 689 v = gmac_read_reg(sc, GMAC_RXMACCONFIG); 690 691 if ((ifp->if_flags & IFF_PROMISC) != 0) { 692 /* Turn on promiscuous mode; turn off the hash filter */ 693 v |= GMAC_RXMAC_PR; 694 v &= ~GMAC_RXMAC_HEN; 695 ifp->if_flags |= IFF_ALLMULTI; 696 goto chipit; 697 } 698 699 /* Turn off promiscuous mode; turn on the hash filter */ 700 v &= ~GMAC_RXMAC_PR; 701 v |= GMAC_RXMAC_HEN; 702 703 /* 704 * Set up multicast address filter by passing all multicast addresses 705 * through a crc generator, and then using the high order 8 bits as an 706 * index into the 256 bit logical address filter. The high order bit 707 * selects the word, while the rest of the bits select the bit within 708 * the word. 709 */ 710 711 ETHER_FIRST_MULTI(step, ec, enm); 712 while (enm != NULL) { 713 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6)) { 714 /* 715 * We must listen to a range of multicast addresses. 716 * For now, just accept all multicasts, rather than 717 * trying to set only those filter bits needed to match 718 * the range. (At this time, the only use of address 719 * ranges is for IP multicast routing, for which the 720 * range is big enough to require all bits set.) 721 */ 722 for (i = 0; i < 16; i++) 723 hash[i] = 0xffff; 724 ifp->if_flags |= IFF_ALLMULTI; 725 goto chipit; 726 } 727 728 crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN); 729 730 /* Just want the 8 most significant bits. */ 731 crc >>= 24; 732 733 /* Set the corresponding bit in the filter. */ 734 hash[crc >> 4] |= 1 << (crc & 0xf); 735 736 ETHER_NEXT_MULTI(step, enm); 737 } 738 739 ifp->if_flags &= ~IFF_ALLMULTI; 740 741 chipit: 742 /* Now load the hash table into the chip */ 743 for (i = 0; i < 16; i++) 744 gmac_write_reg(sc, GMAC_HASHTABLE0 + i * 4, hash[i]); 745 746 gmac_write_reg(sc, GMAC_RXMACCONFIG, v); 747 } 748 749 void 750 gmac_init(sc) 751 struct gmac_softc *sc; 752 { 753 struct ifnet *ifp = &sc->sc_if; 754 755 gmac_stop_txdma(sc); 756 gmac_stop_rxdma(sc); 757 758 gmac_init_mac(sc); 759 gmac_setladrf(sc); 760 761 gmac_start_txdma(sc); 762 gmac_start_rxdma(sc); 763 764 gmac_write_reg(sc, GMAC_INTMASK, ~(GMAC_INT_TXEMPTY | GMAC_INT_RXDONE)); 765 766 ifp->if_flags |= IFF_RUNNING; 767 ifp->if_flags &= ~IFF_OACTIVE; 768 ifp->if_timer = 0; 769 770 callout_reset(&sc->sc_tick_ch, 1, gmac_mii_tick, sc); 771 772 gmac_start(ifp); 773 } 774 775 int 776 gmac_ioctl(ifp, cmd, data) 777 struct ifnet *ifp; 778 u_long cmd; 779 caddr_t data; 780 { 781 struct gmac_softc *sc = ifp->if_softc; 782 struct ifaddr *ifa = (struct ifaddr *)data; 783 struct ifreq *ifr = (struct ifreq *)data; 784 int s, error = 0; 785 786 s = splnet(); 787 788 switch (cmd) { 789 790 case SIOCSIFADDR: 791 ifp->if_flags |= IFF_UP; 792 793 switch (ifa->ifa_addr->sa_family) { 794 #ifdef INET 795 case AF_INET: 796 gmac_init(sc); 797 arp_ifinit(ifp, ifa); 798 break; 799 #endif 800 #ifdef NS 801 case AF_NS: 802 { 803 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 804 805 if (ns_nullhost(*ina)) 806 ina->x_host = 807 *(union ns_host *)LLADDR(ifp->if_sadl); 808 else { 809 memcpy(LLADDR(ifp->if_sadl), 810 ina->x_host.c_host, 811 sizeof(sc->sc_enaddr)); 812 } 813 /* Set new address. */ 814 gmac_init(sc); 815 break; 816 } 817 #endif 818 default: 819 gmac_init(sc); 820 break; 821 } 822 break; 823 824 case SIOCSIFFLAGS: 825 if ((ifp->if_flags & IFF_UP) == 0 && 826 (ifp->if_flags & IFF_RUNNING) != 0) { 827 /* 828 * If interface is marked down and it is running, then 829 * stop it. 830 */ 831 gmac_stop(sc); 832 ifp->if_flags &= ~IFF_RUNNING; 833 } else if ((ifp->if_flags & IFF_UP) != 0 && 834 (ifp->if_flags & IFF_RUNNING) == 0) { 835 /* 836 * If interface is marked up and it is stopped, then 837 * start it. 838 */ 839 gmac_init(sc); 840 } else { 841 /* 842 * Reset the interface to pick up changes in any other 843 * flags that affect hardware registers. 844 */ 845 gmac_reset(sc); 846 gmac_init(sc); 847 } 848 #ifdef GMAC_DEBUG 849 if (ifp->if_flags & IFF_DEBUG) 850 sc->sc_flags |= GMAC_DEBUGFLAG; 851 #endif 852 break; 853 854 case SIOCADDMULTI: 855 case SIOCDELMULTI: 856 error = (cmd == SIOCADDMULTI) ? 857 ether_addmulti(ifr, &sc->sc_ethercom) : 858 ether_delmulti(ifr, &sc->sc_ethercom); 859 860 if (error == ENETRESET) { 861 /* 862 * Multicast list has changed; set the hardware filter 863 * accordingly. 864 */ 865 gmac_init(sc); 866 /* gmac_setladrf(sc); */ 867 error = 0; 868 } 869 break; 870 871 case SIOCGIFMEDIA: 872 case SIOCSIFMEDIA: 873 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 874 break; 875 876 default: 877 error = EINVAL; 878 } 879 880 splx(s); 881 return error; 882 } 883 884 void 885 gmac_watchdog(ifp) 886 struct ifnet *ifp; 887 { 888 struct gmac_softc *sc = ifp->if_softc; 889 890 printf("%s: device timeout\n", ifp->if_xname); 891 ifp->if_oerrors++; 892 893 gmac_reset(sc); 894 gmac_init(sc); 895 } 896 897 int 898 gmac_mediachange(ifp) 899 struct ifnet *ifp; 900 { 901 struct gmac_softc *sc = ifp->if_softc; 902 903 return mii_mediachg(&sc->sc_mii); 904 } 905 906 void 907 gmac_mediastatus(ifp, ifmr) 908 struct ifnet *ifp; 909 struct ifmediareq *ifmr; 910 { 911 struct gmac_softc *sc = ifp->if_softc; 912 913 mii_pollstat(&sc->sc_mii); 914 915 ifmr->ifm_status = sc->sc_mii.mii_media_status; 916 ifmr->ifm_active = sc->sc_mii.mii_media_active; 917 } 918 919 int 920 gmac_mii_readreg(dev, phy, reg) 921 struct device *dev; 922 int phy, reg; 923 { 924 struct gmac_softc *sc = (void *)dev; 925 int i; 926 927 gmac_write_reg(sc, GMAC_MIFFRAMEOUTPUT, 928 0x60020000 | (phy << 23) | (reg << 18)); 929 930 for (i = 1000; i >= 0; i -= 10) { 931 if (gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0x10000) 932 break; 933 delay(10); 934 } 935 if (i < 0) { 936 printf("%s: gmac_mii_readreg: timeout\n", sc->sc_dev.dv_xname); 937 return 0; 938 } 939 940 return gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0xffff; 941 } 942 943 void 944 gmac_mii_writereg(dev, phy, reg, val) 945 struct device *dev; 946 int phy, reg, val; 947 { 948 struct gmac_softc *sc = (void *)dev; 949 int i; 950 951 gmac_write_reg(sc, GMAC_MIFFRAMEOUTPUT, 952 0x50020000 | (phy << 23) | (reg << 18) | (val & 0xffff)); 953 954 for (i = 1000; i >= 0; i -= 10) { 955 if (gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0x10000) 956 break; 957 delay(10); 958 } 959 if (i < 0) 960 printf("%s: gmac_mii_writereg: timeout\n", sc->sc_dev.dv_xname); 961 } 962 963 void 964 gmac_mii_statchg(dev) 965 struct device *dev; 966 { 967 struct gmac_softc *sc = (void *)dev; 968 969 gmac_stop_txdma(sc); 970 gmac_stop_rxdma(sc); 971 972 if (IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) { 973 gmac_write_reg(sc, GMAC_TXMACCONFIG, 6); 974 gmac_write_reg(sc, GMAC_XIFCONFIG, 1); 975 } else { 976 gmac_write_reg(sc, GMAC_TXMACCONFIG, 0); 977 gmac_write_reg(sc, GMAC_XIFCONFIG, 5); 978 } 979 980 if (0) /* g-bit? */ 981 gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 3); 982 else 983 gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 0); 984 985 gmac_start_txdma(sc); 986 gmac_start_rxdma(sc); 987 } 988 989 void 990 gmac_mii_tick(v) 991 void *v; 992 { 993 struct gmac_softc *sc = v; 994 int s; 995 996 s = splnet(); 997 mii_tick(&sc->sc_mii); 998 splx(s); 999 1000 callout_reset(&sc->sc_tick_ch, hz, gmac_mii_tick, sc); 1001 } 1002
Indexes created Tue Sep 30 20:09:53 GMT 2025